From patchwork Sun Dec 31 05:33:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 13507102 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 119B2C3DA6E for ; Sun, 31 Dec 2023 05:34:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: MIME-Version:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=aCqCtIjlYP24BAd7AVhglUxLhUTFRchQlRKCy2VFPlk=; b=B3hLXRhI9PjumA TaaPlMHFmfxoBg6tWVJ+6P5m1pe4NDHP88AMngG5cjB90RqnJnbtPUNyhHUs7mo+K/72LjSHKSMbj 4S3DQOrsN+S6zUn87szqI3nV9SbKkc9X1fd4FYmpBZ7Ad6sC/fE7Uz/4YblPjOMRm14l1e7TRfHk7 i5N/Wsdzanx9ZZyIS3aU005dkPZZ56obf+VRg4jUWKgHTzO/8b3muXqN1YgrLG+EXwRnrI0qNGVv2 5NNsYBEhh9I8GJNUQB0WrlQa32ICiJO2WaSY+iuTISDq+1m4zzqum2If4AUSndsPdFDpnFyWLpjvA uwT1bSKHnjvFRWi19ZUg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rJoSU-0040bt-0P; Sun, 31 Dec 2023 05:33:58 +0000 Received: from mail-il1-x12d.google.com ([2607:f8b0:4864:20::12d]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rJoSQ-0040ar-0I for linux-riscv@lists.infradead.org; Sun, 31 Dec 2023 05:33:56 +0000 Received: by mail-il1-x12d.google.com with SMTP id e9e14a558f8ab-35fb96f3404so45040825ab.2 for ; Sat, 30 Dec 2023 21:33:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brainfault-org.20230601.gappssmtp.com; s=20230601; t=1704000832; x=1704605632; darn=lists.infradead.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=AYOj0zMDCoqSqL2SogFY0FvJoNBa1dfvwCNFWFJHm2I=; b=0YS5e8jBpkt8HsEI/NsXuHPhYynRdR5309NPNOyDpMtWO5LCYfGjrpsPVgj4hUs18/ cma8VZ0UyHHc23CdZG0v44iN1O5PPt3pGQJ+vLh3uc0CprDHARow0vlDWAz+jIAiM8v/ zANI9jl2nCJlWAeZoevYDonUMACU1UiWACmHJjFxKsebfNKZgN9WXdzB3MzHyQhCJzgA WKonl4QUWSuKe6WnqSW7rHKakmzXWENFlatB0YOKn4WmV/qGzTdbCSEedaWYDmgUWRLT SgScsbNty4e5ytxFXCs19kfuPw5JQhTp0I5hRLcSMMOKiN5egUcjv9PZIifhAwWzG3+/ /i1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704000832; x=1704605632; h=content-transfer-encoding:cc:to:subject:message-id:date:from :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=AYOj0zMDCoqSqL2SogFY0FvJoNBa1dfvwCNFWFJHm2I=; b=sjt+Wz4AVlHrzIvXSg5PzLaXOdeMf8yD+uCaQBrNhckWHo0RIhqLZUefUM6yKlRDVF /70FNcrZqCot+BF8yMULzfLYX0tlCeogsdmwGIE5pXDAIcaMu6Msa6/JETOA+Fmb+0hg KO3dp1KJun1FxzbA5nQ8E9meLHIjLt1TLnswd22h8WVkAwASkoZaHoO2qu2kxb91Kc6/ jjZBSc+Mshx4k2VtXOJlbtIpAJFHjd2kewC5Q3/4gALRKDmeAWzrUktdQd85b4vHCsLP sEFXBon0tyrbnuxWyZfBpdJq769XWplx2py47UeAZ3T0N0LIxBDFbBemFREyCD9s9Dns fmXQ== X-Gm-Message-State: AOJu0YySqs5xBcPLYY0fFkQKwaIvGpDMRx5nv1JTInO/Go6oL58Jh9oV 2JdYlAdMBThq3N6+xVmdaIWxXRgMswr76WOSI/Vg1cjqgRA2ng== X-Google-Smtp-Source: AGHT+IGADCclY2p323xug2yA4KRTE8gqRECPoGx4dnY0cdPc9tr7UVakowIStDz9s11jYb+mg4x6EX2YdybivHBhpjI= X-Received: by 2002:a05:6e02:20e6:b0:360:173a:b2da with SMTP id q6-20020a056e0220e600b00360173ab2damr12581608ilv.12.1704000832362; Sat, 30 Dec 2023 21:33:52 -0800 (PST) MIME-Version: 1.0 From: Anup Patel Date: Sun, 31 Dec 2023 11:03:41 +0530 Message-ID: Subject: [GIT PULL] KVM/riscv changes for 6.8 part #1 To: Paolo Bonzini Cc: Palmer Dabbelt , Palmer Dabbelt , Andrew Jones , Atish Patra , Atish Patra , KVM General , "open list:KERNEL VIRTUAL MACHINE FOR RISC-V (KVM/riscv)" , linux-riscv X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231230_213354_486292_366A0F4F X-CRM114-Status: GOOD ( 10.24 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Hi Paolo, We have the following KVM RISC-V changes for 6.8: 1) KVM_GET_REG_LIST improvement for vector registers 2) Generate ISA extension reg_list using macros in get-reg-list selftest 3) Steal time account support along with selftest Please pull. Please note that I will be sending another PR for 6.8 which will include two more changes: 1) KVM RISC-V report more ISA extensions through ONE_REG 2) RISC-V SBI v2.0 PMU improvements and Perf sampling in KVM guest Two separate PRs are because #1 (above) depends on a series merged by Palmer for 6.8 and #2 (above) requires little more testing. I hope you are okay with two separate PRs for 6.8. Regards, Anup The following changes since commit 861deac3b092f37b2c5e6871732f3e11486f7082: Linux 6.7-rc7 (2023-12-23 16:25:56 -0800) are available in the Git repository at: https://github.com/kvm-riscv/linux.git tags/kvm-riscv-6.8-1 for you to fetch changes up to aad86da229bc9d0390dc2c02eb0db9ab1f50d059: RISC-V: KVM: selftests: Add get-reg-list test for STA registers (2023-12-30 11:26:47 +0530) ---------------------------------------------------------------- KVM/riscv changes for 6.8 part #1 - KVM_GET_REG_LIST improvement for vector registers - Generate ISA extension reg_list using macros in get-reg-list selftest - Steal time account support along with selftest ---------------------------------------------------------------- Andrew Jones (19): RISC-V: KVM: Don't add SBI multi regs in get-reg-list KVM: riscv: selftests: Drop SBI multi registers RISC-V: KVM: Make SBI uapi consistent with ISA uapi KVM: riscv: selftests: Add RISCV_SBI_EXT_REG KVM: riscv: selftests: Use register subtypes RISC-V: KVM: selftests: Treat SBI ext regs like ISA ext regs RISC-V: paravirt: Add skeleton for pv-time support RISC-V: Add SBI STA extension definitions RISC-V: paravirt: Implement steal-time support RISC-V: KVM: Add SBI STA extension skeleton RISC-V: KVM: Add steal-update vcpu request RISC-V: KVM: Add SBI STA info to vcpu_arch RISC-V: KVM: Add support for SBI extension registers RISC-V: KVM: Add support for SBI STA registers RISC-V: KVM: Implement SBI STA extension RISC-V: KVM: selftests: Move sbi_ecall to processor.c RISC-V: KVM: selftests: Add guest_sbi_probe_extension RISC-V: KVM: selftests: Add steal_time test support RISC-V: KVM: selftests: Add get-reg-list test for STA registers Anup Patel (2): KVM: riscv: selftests: Generate ISA extension reg_list using macros RISC-V: KVM: Fix indentation in kvm_riscv_vcpu_set_reg_csr() Chao Du (1): RISC-V: KVM: remove a redundant condition in kvm_arch_vcpu_ioctl_run() Clément Léger (2): riscv: kvm: Use SYM_*() assembly macros instead of deprecated ones riscv: kvm: use ".L" local labels in assembly when applicable Daniel Henrique Barboza (3): RISC-V: KVM: set 'vlenb' in kvm_riscv_vcpu_alloc_vector_context() RISC-V: KVM: add 'vlenb' Vector CSR RISC-V: KVM: add vector registers and CSRs in KVM_GET_REG_LIST Documentation/admin-guide/kernel-parameters.txt | 6 +- arch/riscv/Kconfig | 19 + arch/riscv/include/asm/kvm_host.h | 10 + arch/riscv/include/asm/kvm_vcpu_sbi.h | 20 +- arch/riscv/include/asm/paravirt.h | 28 + arch/riscv/include/asm/paravirt_api_clock.h | 1 + arch/riscv/include/asm/sbi.h | 17 + arch/riscv/include/uapi/asm/kvm.h | 13 + arch/riscv/kernel/Makefile | 1 + arch/riscv/kernel/paravirt.c | 135 +++++ arch/riscv/kernel/time.c | 3 + arch/riscv/kvm/Kconfig | 1 + arch/riscv/kvm/Makefile | 1 + arch/riscv/kvm/vcpu.c | 10 +- arch/riscv/kvm/vcpu_onereg.c | 135 +++-- arch/riscv/kvm/vcpu_sbi.c | 142 +++-- arch/riscv/kvm/vcpu_sbi_replace.c | 2 +- arch/riscv/kvm/vcpu_sbi_sta.c | 208 ++++++++ arch/riscv/kvm/vcpu_switch.S | 32 +- arch/riscv/kvm/vcpu_vector.c | 16 + tools/testing/selftests/kvm/Makefile | 5 +- .../testing/selftests/kvm/include/kvm_util_base.h | 1 + .../selftests/kvm/include/riscv/processor.h | 62 ++- tools/testing/selftests/kvm/lib/riscv/processor.c | 49 +- tools/testing/selftests/kvm/lib/riscv/ucall.c | 26 - tools/testing/selftests/kvm/riscv/get-reg-list.c | 588 ++++++++++----------- tools/testing/selftests/kvm/steal_time.c | 99 ++++ 27 files changed, 1184 insertions(+), 446 deletions(-) create mode 100644 arch/riscv/include/asm/paravirt.h create mode 100644 arch/riscv/include/asm/paravirt_api_clock.h create mode 100644 arch/riscv/kernel/paravirt.c create mode 100644 arch/riscv/kvm/vcpu_sbi_sta.c