From patchwork Sun Dec 31 17:38:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13507288 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0FAC8C3DA6E for ; Sun, 31 Dec 2023 17:39:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2lWlRepK4HGCvEqVeX9UzcZGzOxTxvWgI8uefy+nPl4=; b=mmtUYK7+X+k9cx 9pBIh5Y7VOvTs/8XDeaxJSXyovaDw2GSQIfp+Mcj2Vhv33HRrgvwZQvfbCtcSaY9olUNMUosF1M67 kLXAPmds+F6JocawqWsuI5pqvTia+cd/Dwh9grYmIBy5FMelk4D9voyhmXdEJxguqUNMA0AUXvmyk jyBPcv2C5LXR6jjTloMzcWPLc9KBS1FWN3DBvbB0pLEjVM6iGMlzX+0RbAcgKoaZng/w5OhTLVl+S KTsM9P3zln0qO30k5gldNFIZDu383rxqkuRtD0yiXOjmea3f+MdAJ3UrdcXdwhwb+8NINd8aVT7qT OCoveA4IlseubM3K0r9w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rJzmF-004vfR-1M; Sun, 31 Dec 2023 17:39:07 +0000 Received: from mail-lf1-x134.google.com ([2a00:1450:4864:20::134]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rJzmC-004veQ-0Q for linux-arm-kernel@lists.infradead.org; Sun, 31 Dec 2023 17:39:05 +0000 Received: by mail-lf1-x134.google.com with SMTP id 2adb3069b0e04-50e8ca6c76dso2866138e87.3 for ; Sun, 31 Dec 2023 09:39:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1704044341; x=1704649141; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=5dsfoDrDqhFi2M0qRhXB0Rpx7fbnSThvVod9k+rsj1w=; b=RKYrqcb3Ao9JX/Xi4Yw96JlHvwkt3L6N9jl7/pS+QbpaGJiIrvo/KAt09TgV0ulJLB ulDRD81GSddZYTetp/+7DkkSf4VGWFEZ1UT1oBf8T4MVDaThrR7OQ58ZOEUzRm9EtSO/ eKQMbyZfmzO3k032DjNUeRGoPAsa5UmejN504ONlIXciJmvOtvkasUNtb0ja16jWyTIB VMLsFqtxFg6v7mpOgAgWelmMwiA490paquazyNwm16FBrvCT+jTbXYVA0np+ltWb02bU lD+zqJvjS/S51MSUinBJTYJnlFyyVzWA+yZpzi+m37TKGiZOjf+3o7XmKu/8J3fbrclG JvRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704044341; x=1704649141; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5dsfoDrDqhFi2M0qRhXB0Rpx7fbnSThvVod9k+rsj1w=; b=k+Q2l41AB7fnuGXOcZMSmd56RVvCns5vBTJgZqbgEfKGee23133XZUU8DdURznRH+i dHEro8+CNBqpd/aSWd4uUAyIUKm2AL4o2KItWMBs0orR8ly7HmRP6M9RqTBMm33wPShi EzGQqN/mYI31YJXFF1QLRhC9NjeQCInVniRq9G76r5w09ha0pz8IDQ9FmgXkZZbEZKyt xHov3ITqz1nN44SyhmiwPbBKXTW5F2lYIKH+o9FpwgFOSKLuCB8+JvL+xg+Hl82bJZl4 +Ckh5Qm4d1RyD8StsQBZj+cLo8qjd8GWTJZgVJM1DC1792MT3V6aXWLYkltp2DvZsle2 Eu1Q== X-Gm-Message-State: AOJu0YwR11AZPJPCXGsGgeWo+CsooVVqlsEDlw8zjM7W4nO6zq++JQbA PIjlgPmSqG7JCy/2GzMKTPRuxvdMX/E48a3xICh1mEgVO9krQg== X-Google-Smtp-Source: AGHT+IHdyuFseGAB/3R0LnFoRbrdJQuMSd8IMRz+obw9EM5eNufHv6X1VrfVpsujn/vrHdDi1MOobA== X-Received: by 2002:a05:6512:2089:b0:50e:7add:9864 with SMTP id t9-20020a056512208900b0050e7add9864mr4044786lfr.136.1704044341188; Sun, 31 Dec 2023 09:39:01 -0800 (PST) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id t27-20020ac243bb000000b0050e798243a7sm2233233lfl.177.2023.12.31.09.39.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 31 Dec 2023 09:39:00 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 31 Dec 2023 19:38:57 +0200 Subject: [PATCH 1/2] ARM: add CLIDR accessor functions MIME-Version: 1.0 Message-Id: <20231231-armv7-cacheinfo-v1-1-9e8d440b59d9@linaro.org> References: <20231231-armv7-cacheinfo-v1-0-9e8d440b59d9@linaro.org> In-Reply-To: <20231231-armv7-cacheinfo-v1-0-9e8d440b59d9@linaro.org> To: Russell King Cc: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1067; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=t8WE1+fA8j81+AJkUCcorxLRWwscCfXSF46thI/6wwA=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlkacz1VRVujh2jeGLFI2bFDRFeAL+Qf8WsbLin YZGe4LHn62JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZZGnMwAKCRCLPIo+Aiko 1Z6MB/961yERcv+6Qiq7sBMKCeFlc760UR919fahlwsE28S78pSCge1cZZtBpnfeHKVr2NgjsnR NNDc5YCEQ+R32kFgyX1CiyzWjiFWzSoX9dLjLN1pa58XrDyjgLLNl9uSxbuBaC2OyDALkEKCFyC cPjmsKPq6gVL0MeoYKHJodo4UDqimRmx70ZeJ5mzD1BKpENPoLBh9hsRvO7hoWxP3ZLAtnOu5GH R56FHgeqadtv2tDnOuLJlhopblr4t4tYiw2Sn88jEC5aqvvtMVLi7cxHSnmhQaw3ll/aDtYkki2 VgSDXSX37wyj9i7fDi1uhxUSG7byDefhhjSAzqka2Z4uRFat X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231231_093904_167691_6B6C52D3 X-CRM114-Status: UNSURE ( 9.67 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add functions to read the CLIDR, Cache Level ID Register. Signed-off-by: Dmitry Baryshkov --- arch/arm/include/asm/cachetype.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/include/asm/cachetype.h b/arch/arm/include/asm/cachetype.h index e8c30430be33..90203a6d7270 100644 --- a/arch/arm/include/asm/cachetype.h +++ b/arch/arm/include/asm/cachetype.h @@ -81,6 +81,14 @@ static inline unsigned int read_ccsidr(void) asm volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (val)); return val; } + +static inline unsigned int read_clidr(void) +{ + unsigned int val; + + asm volatile("mrc p15, 1, %0, c0, c0, 1" : "=r" (val)); + return val; +} #else /* CONFIG_CPU_V7M */ #include #include "asm/v7m.h" @@ -94,6 +102,11 @@ static inline unsigned int read_ccsidr(void) { return readl(BASEADDR_V7M_SCB + V7M_SCB_CCSIDR); } + +static inline unsigned int read_clidr(void) +{ + return readl(BASEADDR_V7M_SCB + V7M_SCB_CLIDR); +} #endif #endif From patchwork Sun Dec 31 17:38:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13507290 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 17023C3DA6E for ; Sun, 31 Dec 2023 17:39:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Y4NQvbb+dyupmIOa663OatpdbfcOKL2fx2704DLT55o=; b=MOP02XrJCAO6vf 21A6dp9+1g8p+jFD+JrI8nrKJ+TIg3v72Lm6OJCmk/sNQ+IsBzXLupPT4Ea+aKvuFgpoC/eQNGOgP s+P8WIsuWV4D9ZpwMoy0ZD9nilSOmJIaxFg/c0VPWpTVgKGqLpy5KyAC3ttHcggdTXes43NJx2QxM virc88cYc4wt6m/PJ8YuYl0QR0IydJ+m5H8F/L1s5GfHfK87CDsNlsH9KnF1XJWIBFKCi8kOKV8Vt 5aLMe2DzOXdL6yqNIDn2FFJ5GhBZm/1yylep2E9/EU7Sd6uSTSYSBKWPKZ+MxEx+6I8HB5YWpRAVh z1z23ucSU2ZSzhi12pjw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rJzmU-004vgm-1o; Sun, 31 Dec 2023 17:39:22 +0000 Received: from mail-lf1-x12b.google.com ([2a00:1450:4864:20::12b]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rJzmC-004veR-0P for linux-arm-kernel@lists.infradead.org; Sun, 31 Dec 2023 17:39:06 +0000 Received: by mail-lf1-x12b.google.com with SMTP id 2adb3069b0e04-50e7e6283bdso5029013e87.1 for ; Sun, 31 Dec 2023 09:39:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1704044342; x=1704649142; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=AycSOZZElt80+nGkUPVSHZn5jQIyWVlzHRqHfSaFet8=; b=ZqxtU4VgAZkKT18mDpB5UNZsaFjWnj2HIsM/qbburNRn+bIbLvGIppUIndWYKl5xkG 7GcpliF633pozMm+IKRKRiHm0gqSwK1BFI5VakCVUVJOHsZNAHUEnAksXQeoXQIM/r2Y zn9t2S957SNlT0Ew70vsR9uyQV4cjc0zSDWPo8KEJb7K0h7miQTvvQamMMx9im2W7KVa +GKQm4kjn6y6b2XBPWS7+bV/Fx8p73rjAZrBo6Xk1v+gCDA/Mwu8YMbxsAJCa9ry9tna p5w5J5Amle6xD4rdSHReMt4PefWaM7fF9XdMh9CynQrC9ZqkvmGHAZ0CaFflHz5RdJ0X m1tg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704044342; x=1704649142; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AycSOZZElt80+nGkUPVSHZn5jQIyWVlzHRqHfSaFet8=; b=wE7WNYbce1WTMIvUkEzHptAgN0L8+pQ4nOlgR+QBo8jw75EF3Cwla3y/EXRlOjimPC yzhoior2GfBMStjVv6vPDdy8hJgGHwgkT5XI3ifxWUv0jTeR1Qt3qa5CN30iLRT6+OdA zm6oh4/EVOqtQnxBSHKbDbMMYafaeTAiFlOIq6aRT0kVPl73+jvKv2l3ENdYKuRJpRNn pOGOfdC8yqwJLhOKYrgabP4JyyOX70uWu0sd4zHOn10fyJ/zUVLMCOZDDhO3kX5RJ7y+ 6Tmx9NEtTwcH0AMPr+Bd+ZE50cjT+Rq1tjn9/CeiTs0PSbxNcrUDlMRDitdaSVtaaXXO ZmmA== X-Gm-Message-State: AOJu0Yw3YlmVSR3dQ/kvEbE7VPRzsxNCvHv7slvW65FOAGv/fmRVkux2 p7eWjy5LLLqshBQ1B0SO/CqYUWtPk6Pg3Q== X-Google-Smtp-Source: AGHT+IEIWk1Ymhg6hGPa1amZYgO1GBEKyEgNOVjTvtmT2I4amYEwX6JeDEplAOdz+pjDdAnRzzw0oQ== X-Received: by 2002:a19:f719:0:b0:50e:76f7:3ea9 with SMTP id z25-20020a19f719000000b0050e76f73ea9mr1725034lfe.149.1704044342286; Sun, 31 Dec 2023 09:39:02 -0800 (PST) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id t27-20020ac243bb000000b0050e798243a7sm2233233lfl.177.2023.12.31.09.39.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 31 Dec 2023 09:39:01 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 31 Dec 2023 19:38:58 +0200 Subject: [PATCH 2/2] ARM: implement cacheinfo support MIME-Version: 1.0 Message-Id: <20231231-armv7-cacheinfo-v1-2-9e8d440b59d9@linaro.org> References: <20231231-armv7-cacheinfo-v1-0-9e8d440b59d9@linaro.org> In-Reply-To: <20231231-armv7-cacheinfo-v1-0-9e8d440b59d9@linaro.org> To: Russell King Cc: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=6946; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=znYqH4KKX5PqF5T6XnwgCw2bHRlbEzXsyiPDt8vHcKg=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlkaczlx5tG+RUChGY+eqb3IbQ/ffoxhH8znrks 2MGDI3oci6JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZZGnMwAKCRCLPIo+Aiko 1ZYNB/9FxFzCRNF+iDY5k3x/oG6PPTzt/25auzNnsOdSoE1xl6i8/Qnh7Hl75u6errHSlZpxGbB oM4eGX6EtgPnmAaSZ9s3LJVVqlbfcAReeROmsCsj+hTKzqPXjGGUcBvI7qNwKofwboEVeio41mq b3KosmzwVimHRLLhcOFY8pDfpOEfxFStHsKV0oPwvik6Y5nPyVk/SPLkfb0n+VRq7U0CP10J0vI OyrHpIub6YnqAflemjwFcvZlYGFYIKrfcsFtAk31/vBa0ReODDBGfrtql+qET534jORib6LfVBW 2PwH1rKFRXzSIpDAlplszldE3+/qTAS27MH0mPLS3TZ2/I47 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231231_093904_170009_EF4035F7 X-CRM114-Status: GOOD ( 21.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On ARMv7 / v7m machines read CTR and CLIDR registers to provide information regarding the cache topology. Earlier machines should describe full cache topology in the device tree. Note, this follows the ARM64 cacheinfo support and provides only minimal support required to bootstrap cache info. All useful properties should be decribed in Device Tree. Signed-off-by: Dmitry Baryshkov --- arch/arm/Kconfig | 1 + arch/arm/include/asm/cache.h | 6 ++ arch/arm/kernel/Makefile | 1 + arch/arm/kernel/cacheinfo.c | 164 +++++++++++++++++++++++++++++++++++++++++++ include/linux/cacheinfo.h | 2 +- 5 files changed, 173 insertions(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 8f47d6762ea4..cb293ddae6bb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -5,6 +5,7 @@ config ARM select ARCH_32BIT_OFF_T select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE if HAVE_KRETPROBES && FRAME_POINTER && !ARM_UNWIND select ARCH_HAS_BINFMT_FLAT + select ARCH_HAS_CACHE_LINE_SIZE if OF select ARCH_HAS_CPU_FINALIZE_INIT if MMU select ARCH_HAS_CURRENT_STACK_POINTER select ARCH_HAS_DEBUG_VIRTUAL if MMU diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h index e3ea34558ada..ecbc100d22a5 100644 --- a/arch/arm/include/asm/cache.h +++ b/arch/arm/include/asm/cache.h @@ -26,4 +26,10 @@ #define __read_mostly __section(".data..read_mostly") +#ifndef __ASSEMBLY__ +#ifdef CONFIG_ARCH_HAS_CACHE_LINE_SIZE +int cache_line_size(void); +#endif +#endif + #endif diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 771264d4726a..b39c38ee9fdb 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -40,6 +40,7 @@ obj-y += entry-armv.o endif obj-$(CONFIG_MMU) += bugs.o +obj-$(CONFIG_OF) += cacheinfo.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_ISA_DMA_API) += dma.o obj-$(CONFIG_FIQ) += fiq.o fiqasm.o diff --git a/arch/arm/kernel/cacheinfo.c b/arch/arm/kernel/cacheinfo.c new file mode 100644 index 000000000000..878ff4d10139 --- /dev/null +++ b/arch/arm/kernel/cacheinfo.c @@ -0,0 +1,164 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * ARM cacheinfo support + * + * Copyright (C) 2023 Linaro Ltd. + * Copyright (C) 2015 ARM Ltd. + * All Rights Reserved + */ + +#include +#include +#include + +#include +#include +#include + +/* Ctypen, bits[3(n - 1) + 2 : 3(n - 1)], for n = 1 to 7 */ +#define CLIDR_CTYPE_SHIFT(level) (3 * (level - 1)) +#define CLIDR_CTYPE_MASK(level) (7 << CLIDR_CTYPE_SHIFT(level)) +#define CLIDR_CTYPE(clidr, level) \ + (((clidr) & CLIDR_CTYPE_MASK(level)) >> CLIDR_CTYPE_SHIFT(level)) + +#define MAX_CACHE_LEVEL 7 /* Max 7 level supported */ + +#define CTR_FORMAT_MASK GENMASK(27, 24) +#define CTR_CWG_MASK GENMASK(27, 24) +#define CTR_DSIZE_LEN_MASK GENMASK(13, 12) +#define CTR_ISIZE_LEN_MASK GENMASK(1, 0) + +/* Also valid for v7m */ +static inline int cache_line_size_cp15(void) +{ + u32 ctr = read_cpuid_cachetype(); + u32 format = FIELD_GET(CTR_FORMAT_MASK, ctr); + + if (format == 4) { + u32 cwg = FIELD_GET(CTR_CWG_MASK, ctr); + + return cwg ? 4 << cwg : ARCH_DMA_MINALIGN; + } else if (WARN_ON_ONCE(format != 0)) { + return ARCH_DMA_MINALIGN; + } + + return 8 << max(FIELD_GET(CTR_ISIZE_LEN_MASK, ctr), + FIELD_GET(CTR_DSIZE_LEN_MASK, ctr)); +} + +int cache_line_size(void) +{ + if (coherency_max_size != 0) + return coherency_max_size; + + /* CP15 is optional / implementation defined before ARMv6 */ + if (cpu_architecture() < CPU_ARCH_ARMv6) + return ARCH_DMA_MINALIGN; + + return cache_line_size_cp15(); +} +EXPORT_SYMBOL_GPL(cache_line_size); + +static inline enum cache_type get_cache_type(int level) +{ + u32 clidr; + + if (level > MAX_CACHE_LEVEL) + return CACHE_TYPE_NOCACHE; + + clidr = read_clidr(); + + return CLIDR_CTYPE(clidr, level); +} + +static void ci_leaf_init(struct cacheinfo *this_leaf, + enum cache_type type, unsigned int level) +{ + this_leaf->level = level; + this_leaf->type = type; +} + +static int detect_cache_level(unsigned int *level_p, unsigned int *leaves_p) +{ + unsigned int ctype, level, leaves; + + /* CLIDR is not present before ARMv7/v7m */ + if (cpu_architecture() < CPU_ARCH_ARMv7) + return -EOPNOTSUPP; + + for (level = 1, leaves = 0; level <= MAX_CACHE_LEVEL; level++) { + ctype = get_cache_type(level); + if (ctype == CACHE_TYPE_NOCACHE) { + level--; + break; + } + /* Separate instruction and data caches */ + leaves += (ctype == CACHE_TYPE_SEPARATE) ? 2 : 1; + } + + *level_p = level; + *leaves_p = leaves; + + return 0; +} + +int early_cache_level(unsigned int cpu) +{ + struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); + + return detect_cache_level(&this_cpu_ci->num_levels, &this_cpu_ci->num_leaves); +} + +int init_cache_level(unsigned int cpu) +{ + unsigned int level, leaves; + struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); + int fw_level; + int ret; + + ret = detect_cache_level(&level, &leaves); + if (ret) + return ret; + + fw_level = of_find_last_cache_level(cpu); + + if (level < fw_level) { + /* + * some external caches not specified in CLIDR_EL1 + * the information may be available in the device tree + * only unified external caches are considered here + */ + leaves += (fw_level - level); + level = fw_level; + } + + this_cpu_ci->num_levels = level; + this_cpu_ci->num_leaves = leaves; + return 0; +} + +int populate_cache_leaves(unsigned int cpu) +{ + unsigned int level, idx; + enum cache_type type; + struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); + struct cacheinfo *this_leaf = this_cpu_ci->info_list; + unsigned int arch = cpu_architecture(); + + /* CLIDR is not present before ARMv7/v7m */ + if (arch < CPU_ARCH_ARMv7) + return -EOPNOTSUPP; + + for (idx = 0, level = 1; level <= this_cpu_ci->num_levels && + idx < this_cpu_ci->num_leaves; idx++, level++) { + type = get_cache_type(level); + if (type == CACHE_TYPE_SEPARATE) { + ci_leaf_init(this_leaf++, CACHE_TYPE_DATA, level); + ci_leaf_init(this_leaf++, CACHE_TYPE_INST, level); + } else { + ci_leaf_init(this_leaf++, type, level); + } + } + + return 0; +} diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h index d504eb4b49ab..cb1222b8bbc8 100644 --- a/include/linux/cacheinfo.h +++ b/include/linux/cacheinfo.h @@ -132,7 +132,7 @@ static inline int get_cpu_cacheinfo_id(int cpu, int level) return -1; } -#ifdef CONFIG_ARM64 +#if defined(CONFIG_ARM64) || defined(CONFIG_ARM) #define use_arch_cache_info() (true) #else #define use_arch_cache_info() (false)