From patchwork Mon Jan 8 08:18:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pin-yen Lin X-Patchwork-Id: 13513125 Received: from mail-pl1-f170.google.com (mail-pl1-f170.google.com [209.85.214.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5064DB65E for ; Mon, 8 Jan 2024 08:18:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="FndB4o7Z" Received: by mail-pl1-f170.google.com with SMTP id d9443c01a7336-1d3f2985425so2625705ad.3 for ; Mon, 08 Jan 2024 00:18:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704701920; x=1705306720; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=xNB8eseBc6is+G1DowRroY47UdkWdAr6xj971vFYoJE=; b=FndB4o7ZuxG/C0uqLE3o6CFfYSHJd3myJpCrSCU1PxzFB0CLR7UauvbOsjZ1fKusEw 4lbZXn5nGRjNT5x0/P2sOfOlERYYg7yik6PHV+3W51QUS4nUNOUiX5LiH8rud1noDK61 I4iZZHhcW5UkB7wONwtHUwF+5HJ6hfWTFyMy8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704701920; x=1705306720; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=xNB8eseBc6is+G1DowRroY47UdkWdAr6xj971vFYoJE=; b=TUSPCPj8iH/xhPpDhZqcsxLjpu5UHxXXU5ABsGxqzTAKExXTJN4CeMwKs1A0nlHbWx 1D3kCEjq6mHEA7jaHWJbl0J9zHxCDk3q6WllP8mgcXtP9p6R4f75Y0V3/WjGAP2fHish yYr/pBKfCX+FPYiH2+SB4p5TUg7KLhTOEUGcxOlnfP5PiYmdszq28GjkD945CdUVAjyF 19nA4tNmZ+k8d/CFjwdLPqp4ThYz8apjyq4mvBZatEvoa5FPIt34LmdEjxZrPraR59qz WVa9Qkw8mw9yZMYmC7qXU+uSj7l7xKuZU4OaDBA6nTnvXUt43m7yG/XpmHZt6wDsCngN foDA== X-Gm-Message-State: AOJu0YzAdxa2Stx3OylyIknipUZ17a8d1gaiOlgA2+BripTE+0AUD6BD +Bt+vy9uucZKXtDeTPHrct3ATJW2H6Kx X-Google-Smtp-Source: AGHT+IE0thN83ywdJrPNf/EGvsxE+uqGedDoJv4f+6m5lRBkmlTLbuqE5qHl18jLTcqMCayCTdhYxQ== X-Received: by 2002:a17:902:8a88:b0:1d4:be64:263f with SMTP id p8-20020a1709028a8800b001d4be64263fmr1076115plo.120.1704701920600; Mon, 08 Jan 2024 00:18:40 -0800 (PST) Received: from treapking.tpe.corp.google.com ([2401:fa00:1:10:6859:f8da:3370:7a74]) by smtp.gmail.com with ESMTPSA id jj4-20020a170903048400b001d078445059sm5672513plb.143.2024.01.08.00.18.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jan 2024 00:18:40 -0800 (PST) From: Pin-yen Lin To: Michael Turquette , Stephen Boyd , Matthias Brugger , AngeloGioacchino Del Regno Cc: Pin-yen Lin , Chen-Yu Tsai , Weiyi Lu , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 1/2] clk: mediatek: Introduce need_pm_runtime to mtk_clk_desc Date: Mon, 8 Jan 2024 16:18:15 +0800 Message-ID: <20240108081834.408403-1-treapking@chromium.org> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Introduce a new need_pm_runtime variable to mtk_clk_desc to indicate this clock controller needs runtime PM for its operations. Also do a runtime PM get on the clock controller during the probing stage to workaround a possible deadlock. Signed-off-by: Pin-yen Lin Reviewed-by: Chen-Yu Tsai --- Changes in v3: - Update the commit message and the comments before runtime PM call Changes in v2: - Fix the order of error handling - Update the commit message and add a comment before the runtime PM call drivers/clk/mediatek/clk-mtk.c | 19 +++++++++++++++++++ drivers/clk/mediatek/clk-mtk.h | 2 ++ 2 files changed, 21 insertions(+) diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index 2e55368dc4d8..ba1d1c495bc2 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include "clk-mtk.h" @@ -494,6 +495,18 @@ static int __mtk_clk_simple_probe(struct platform_device *pdev, return IS_ERR(base) ? PTR_ERR(base) : -ENOMEM; } + + if (mcd->need_runtime_pm) { + devm_pm_runtime_enable(&pdev->dev); + /* + * Do a pm_runtime_resume_and_get() to workaround a possible + * deadlock between clk_register() and the genpd framework. + */ + r = pm_runtime_resume_and_get(&pdev->dev); + if (r) + return r; + } + /* Calculate how many clk_hw_onecell_data entries to allocate */ num_clks = mcd->num_clks + mcd->num_composite_clks; num_clks += mcd->num_fixed_clks + mcd->num_factor_clks; @@ -574,6 +587,9 @@ static int __mtk_clk_simple_probe(struct platform_device *pdev, goto unregister_clks; } + if (mcd->need_runtime_pm) + pm_runtime_put(&pdev->dev); + return r; unregister_clks: @@ -604,6 +620,9 @@ static int __mtk_clk_simple_probe(struct platform_device *pdev, free_base: if (mcd->shared_io && base) iounmap(base); + + if (mcd->need_runtime_pm) + pm_runtime_put(&pdev->dev); return r; } diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h index 22096501a60a..c17fe1c2d732 100644 --- a/drivers/clk/mediatek/clk-mtk.h +++ b/drivers/clk/mediatek/clk-mtk.h @@ -237,6 +237,8 @@ struct mtk_clk_desc { int (*clk_notifier_func)(struct device *dev, struct clk *clk); unsigned int mfg_clk_idx; + + bool need_runtime_pm; }; int mtk_clk_pdev_probe(struct platform_device *pdev); From patchwork Mon Jan 8 08:18:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pin-yen Lin X-Patchwork-Id: 13513126 Received: from mail-pl1-f182.google.com (mail-pl1-f182.google.com [209.85.214.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 90C4AB65E for ; Mon, 8 Jan 2024 08:18:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="eSIDp8pI" Received: by mail-pl1-f182.google.com with SMTP id d9443c01a7336-1d3ea5cc137so13461765ad.0 for ; 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Mon, 08 Jan 2024 00:18:43 -0800 (PST) Received: from treapking.tpe.corp.google.com ([2401:fa00:1:10:6859:f8da:3370:7a74]) by smtp.gmail.com with ESMTPSA id jj4-20020a170903048400b001d078445059sm5672513plb.143.2024.01.08.00.18.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jan 2024 00:18:42 -0800 (PST) From: Pin-yen Lin To: Michael Turquette , Stephen Boyd , Matthias Brugger , AngeloGioacchino Del Regno Cc: Pin-yen Lin , Chen-Yu Tsai , Weiyi Lu , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 2/2] clk: mediatek: mt8183: Enable need_runtime_pm on mt8183-mfgcfg Date: Mon, 8 Jan 2024 16:18:16 +0800 Message-ID: <20240108081834.408403-2-treapking@chromium.org> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20240108081834.408403-1-treapking@chromium.org> References: <20240108081834.408403-1-treapking@chromium.org> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 mt8183-mfgcfg has a mutual dependency with genpd during the probing stage, so enable need_runtim_pm to prevent a deadlock in the following call stack: CPU0: genpd_lock --> clk_prepare_lock genpd_power_off_work_fn() genpd_lock() generic_pm_domain::power_off() clk_unprepare() clk_prepare_lock() CPU1: clk_prepare_lock --> genpd_lock clk_register() __clk_core_init() clk_prepare_lock() clk_pm_runtime_get() genpd_lock() Do a runtime PM get at the probe function to make sure clk_register() won't acquire the genpd lock. Fixes: acddfc2c261b ("clk: mediatek: Add MT8183 clock support") Signed-off-by: Pin-yen Lin Reviewed-by: Chen-Yu Tsai --- (no changes since v1) drivers/clk/mediatek/clk-mt8183-mfgcfg.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/mediatek/clk-mt8183-mfgcfg.c b/drivers/clk/mediatek/clk-mt8183-mfgcfg.c index ba504e19d420..62d876e150e1 100644 --- a/drivers/clk/mediatek/clk-mt8183-mfgcfg.c +++ b/drivers/clk/mediatek/clk-mt8183-mfgcfg.c @@ -29,6 +29,7 @@ static const struct mtk_gate mfg_clks[] = { static const struct mtk_clk_desc mfg_desc = { .clks = mfg_clks, .num_clks = ARRAY_SIZE(mfg_clks), + .need_runtime_pm = true, }; static const struct of_device_id of_match_clk_mt8183_mfg[] = {