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Mon, 8 Jan 2024 10:48:10 +0000 Received: from ZQ0PR01MB0981.CHNPR01.prod.partner.outlook.cn ([fe80::936f:9f2f:6715:e402]) by ZQ0PR01MB0981.CHNPR01.prod.partner.outlook.cn ([fe80::936f:9f2f:6715:e402%6]) with mapi id 15.20.7159.015; Mon, 8 Jan 2024 10:48:10 +0000 From: Kevin Xie To: =?unknown-8bit?q?Kevin_Hilman_=3Ckhilman=40baylibre=2Ecom=3E=2C_Minda_Ch?= =?unknown-8bit?q?en_=3Cminda=2Echen=40starfivetech=2Ecom=3E=2C_Conor_Dooley?= =?unknown-8bit?q?_=3Cconor=40kernel=2Eorg=3E=2C_Krzysztof_Wilczy=A8=BDski__?= =?unknown-8bit?q?=3Ckw=40linux=2Ecom=3E=2C_Rob_Herring_=3Crobh+dt=40kernel?= =?unknown-8bit?q?=2Eorg=3E=2C_Bjorn_Helgaas_=3Cbhelgaas=40google=2Ecom=3E?= =?unknown-8bit?q?=2C_Lorenzo_Pieralisi_=3Clpieralisi=40kernel=2Eorg=3E=2C_D?= =?unknown-8bit?q?aire_McNamara_=3Cdaire=2Emcnamara=40microchip=2Ecom=3E=2C_?= =?unknown-8bit?q?Emil_Renner_Berthing_=3Cemil=2Erenner=2Eberthing=40canonic?= =?unknown-8bit?q?al=2Ecom=3E=2C_Krzysztof_Kozlowski_=3Ckrzysztof=2Ekozlowsk?= =?unknown-8bit?q?i+dt=40linaro=2Eorg=3E?= CC: "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-riscv@lists.infradead.org" , "linux-pci@vger.kernel.org" , Paul Walmsley , Palmer Dabbelt , Albert Ou , Philipp Zabel , Mason Huo , Leyfoon Tan , Minda Chen Subject: =?eucgb2312_cn?b?u9i4tDogu9i4tDogW1BBVENIIHYxMyAwLzIxXSBSZWZhY3RvcmluZyBN?= =?eucgb2312_cn?b?aWNyb2NoaXAgUENJZSBkcml2ZXIgYW5kIGFkZCBTdGFyRml2ZSBQQ0ll?= Thread-Topic: =?eucgb2312_cn?b?u9i4tDogW1BBVENIIHYxMyAwLzIxXSBSZWZhY3RvcmluZyBN?= =?eucgb2312_cn?b?aWNyb2NoaXAgUENJZSBkcml2ZXIgYW5kIGFkZCBTdGFyRml2ZSBQQ0ll?= Thread-Index: AQHaPpXiMe+t6/O8C0OnZGJ4Y32LtrDKgdAQgAD6TACABDOkUA== Date: Mon, 8 Jan 2024 10:48:10 +0000 Message-ID: References: <20231214072839.2367-1-minda.chen@starfivetech.com> <7hfrzeavmj.fsf@baylibre.com> <7h34vbbsfj.fsf@baylibre.com> In-Reply-To: <7h34vbbsfj.fsf@baylibre.com> Accept-Language: zh-CN, en-US Content-Language: zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=starfivetech.com; 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Microchip PolarFire Using the > >> > same IP and have commit their codes, which are mixed with PLDA > >> > controller codes and Microchip platform codes. > >> > >> Thank you for this series. > >> > >> I tested this on a VisionFive v2 board, and it seems to probe and > >> find my > >> M.2 NVMe SSD, but then gets timeouts when trying to use the NVMe (e.g. > >> 'blkid' command) > >> > > > > Hi, Kevin: > > Could you please provide the manufacturer and model of the M.2 NVMe > > SSD you tested? > > I have a 256 Gb Silicon Power P34A60 M.2 NVMe SSD (part number: > sp256gbp34a60m28) > Thanks, Kevin, we will buy one to test. Before doing this refactoring, we encountered the same bug with Kingston M.2 SSD, and we workaround the problem with the below patch, please have a try: > Also for reference, I tested the same SSD on another arm platform (Khadas > VIM3) and it works fine. > > Kevin Hi, Bjorn: Do you have any idea about the late CQE phase update condition as mentioned in the patch comments above? This is an issue that occurs with a small probability on individual devices in our platform. Thus, I suggest the refactoring patch set should go forward. Later we will try to find a more formal solution instead, and send a new patch. diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index 507bc149046d..5be37f1ee150 100644 --- a/drivers/nvme/host/pci.c +++ b/drivers/nvme/host/pci.c @@ -1059,6 +1059,16 @@ static inline int nvme_poll_cq(struct nvme_queue *nvmeq, { int found = 0; + /* + * In some cases, such as JH7110 SoC working with Kingston SSD, + * the CQE status may update a little bit later than the MSI, + * which cause an IRQ handle missing. + * As a workaround, here we will check the status first, and wait + * 1us if we get nothing. + */ + if (!nvme_cqe_pending(nvmeq)) + udelay(1); + while (nvme_cqe_pending(nvmeq)) { found++; /*