From patchwork Mon Jan 8 23:05:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sripada, Radhakrishna" X-Patchwork-Id: 13514133 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A446DC3DA6E for ; Mon, 8 Jan 2024 23:07:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E6FA210E2CB; Mon, 8 Jan 2024 23:07:02 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id F32BF10E326 for ; Mon, 8 Jan 2024 23:07:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704755221; x=1736291221; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jBjTuyBxgNqsV/PBzefFHJnrlhYNm1eMmfqF5pzDAs4=; b=ntLRnqoinj6YPMtzD0KLzj1Jh8fdJfaNexqhRIikPl9UZQXn7MWyCPbd 0qpQCmXgW89o/EjsvtcC4prwPlpY/cYscBMvcouKEXw4G+NZ36d4Uvy/G X0mzaYDLLG6q8dW4ezgdJuSPWgyDiKBB9OpHSp4JnsTdSmJyzeLlmfesa U9Ci6OqXGru0SWRYXVfICRD9Cs6jXezpE7soffLfciP9x/XlTY7OkVoen kSZ9nI1TkF4fGQOQv1KWgUzK/+Mr+4byA8eVVQr/o0Br3F4V9kY/k7sQ/ LU7oQJoAKoJGKMMywJnSF8C4/QJGLyS5tr8dhTI3Hg2EfKnA/WFh/uESu g==; X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="11514116" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="11514116" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="774647074" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="774647074" Received: from invictus.jf.intel.com ([10.165.21.201]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:06:59 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Subject: [RFC 01/15] drm/i915: Extract display->vbt_data to a new vbt structure Date: Mon, 8 Jan 2024 15:05:03 -0800 Message-Id: <20240108230517.1497504-2-radhakrishna.sripada@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> References: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Vbt data is scattered to multiple places like vbt_data and opregion vbt fields. Introduce a new structure intel_vbt to collate various vbt fields into one simple structure. This will be used to cache the vbt read from spi flash/oprom as well as the vbt read from opregion and firmware. Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_bios.c | 195 +++++++++--------- drivers/gpu/drm/i915/display/intel_crt.c | 2 +- drivers/gpu/drm/i915/display/intel_display.c | 10 +- .../gpu/drm/i915/display/intel_display_core.h | 6 +- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- drivers/gpu/drm/i915/display/intel_dpll.c | 16 +- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 19 +- drivers/gpu/drm/i915/display/intel_dsi.c | 2 +- drivers/gpu/drm/i915/display/intel_lvds.c | 4 +- drivers/gpu/drm/i915/display/intel_panel.c | 2 +- .../gpu/drm/i915/display/intel_pch_refclk.c | 2 +- drivers/gpu/drm/i915/display/intel_sdvo.c | 18 +- drivers/gpu/drm/i915/intel_clock_gating.c | 2 +- 13 files changed, 144 insertions(+), 136 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index 0e61e424802e..b9120eb1321d 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -146,7 +146,7 @@ bdb_find_section(struct drm_i915_private *i915, { struct bdb_block_entry *entry; - list_for_each_entry(entry, &i915->display.vbt.bdb_blocks, node) { + list_for_each_entry(entry, &i915->display.vbt.data.bdb_blocks, node) { if (entry->section_id == section_id) return entry->data + 3; } @@ -370,7 +370,7 @@ static void *generate_lfp_data_ptrs(struct drm_i915_private *i915, * include block 41 and thus we don't need to * generate one. */ - if (i915->display.vbt.version < 155) + if (i915->display.vbt.data.version < 155) return NULL; fp_timing_size = 38; @@ -501,7 +501,7 @@ init_bdb_block(struct drm_i915_private *i915, return; } - list_add_tail(&entry->node, &i915->display.vbt.bdb_blocks); + list_add_tail(&entry->node, &i915->display.vbt.data.bdb_blocks); } static void init_bdb_blocks(struct drm_i915_private *i915, @@ -910,7 +910,7 @@ parse_lfp_data(struct drm_i915_private *i915, (int)sizeof(tail->panel_name[0].name), tail->panel_name[panel_type].name); - if (i915->display.vbt.version >= 188) { + if (i915->display.vbt.data.version >= 188) { panel->vbt.seamless_drrs_min_refresh_rate = tail->seamless_drrs_min_refresh_rate[panel_type]; drm_dbg_kms(&i915->drm, @@ -936,7 +936,7 @@ parse_generic_dtd(struct drm_i915_private *i915, * first on VBT >= 229, but still fall back to trying the old LFP * block if that fails. */ - if (i915->display.vbt.version < 229) + if (i915->display.vbt.data.version < 229) return; generic_dtd = bdb_find_section(i915, BDB_GENERIC_DTD); @@ -1041,12 +1041,12 @@ parse_lfp_backlight(struct drm_i915_private *i915, panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; panel->vbt.backlight.controller = 0; - if (i915->display.vbt.version >= 191) { + if (i915->display.vbt.data.version >= 191) { size_t exp_size; - if (i915->display.vbt.version >= 236) + if (i915->display.vbt.data.version >= 236) exp_size = sizeof(struct bdb_lfp_backlight_data); - else if (i915->display.vbt.version >= 234) + else if (i915->display.vbt.data.version >= 234) exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234; else exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191; @@ -1063,14 +1063,14 @@ parse_lfp_backlight(struct drm_i915_private *i915, panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; panel->vbt.backlight.active_low_pwm = entry->active_low_pwm; - if (i915->display.vbt.version >= 234) { + if (i915->display.vbt.data.version >= 234) { u16 min_level; bool scale; level = backlight_data->brightness_level[panel_type].level; min_level = backlight_data->brightness_min_level[panel_type].level; - if (i915->display.vbt.version >= 236) + if (i915->display.vbt.data.version >= 236) scale = backlight_data->brightness_precision_bits[panel_type] == 16; else scale = level > 255; @@ -1091,7 +1091,7 @@ parse_lfp_backlight(struct drm_i915_private *i915, panel->vbt.backlight.min_brightness = entry->min_brightness; } - if (i915->display.vbt.version >= 239) + if (i915->display.vbt.data.version >= 239) panel->vbt.backlight.hdr_dpcd_refresh_timeout = DIV_ROUND_UP(backlight_data->hdr_dpcd_refresh_timeout[panel_type], 100); else @@ -1168,42 +1168,44 @@ static void parse_general_features(struct drm_i915_private *i915) { const struct bdb_general_features *general; + struct intel_vbt_data *data = &i915->display.vbt.data; general = bdb_find_section(i915, BDB_GENERAL_FEATURES); if (!general) return; - i915->display.vbt.int_tv_support = general->int_tv_support; + data->int_tv_support = general->int_tv_support; /* int_crt_support can't be trusted on earlier platforms */ - if (i915->display.vbt.version >= 155 && + if (data->version >= 155 && (HAS_DDI(i915) || IS_VALLEYVIEW(i915))) - i915->display.vbt.int_crt_support = general->int_crt_support; - i915->display.vbt.lvds_use_ssc = general->enable_ssc; - i915->display.vbt.lvds_ssc_freq = + data->int_crt_support = general->int_crt_support; + data->lvds_use_ssc = general->enable_ssc; + data->lvds_ssc_freq = intel_bios_ssc_frequency(i915, general->ssc_freq); - i915->display.vbt.display_clock_mode = general->display_clock_mode; - i915->display.vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; - if (i915->display.vbt.version >= 181) { - i915->display.vbt.orientation = general->rotate_180 ? + data->display_clock_mode = general->display_clock_mode; + data->fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; + if (data->version >= 181) { + data->orientation = general->rotate_180 ? DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : DRM_MODE_PANEL_ORIENTATION_NORMAL; } else { - i915->display.vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; + data->orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; } - if (i915->display.vbt.version >= 249 && general->afc_startup_config) { - i915->display.vbt.override_afc_startup = true; - i915->display.vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7; + if (data->version >= 249 && general->afc_startup_config) { + data->override_afc_startup = true; + data->override_afc_startup_val = + general->afc_startup_config == 0x1 ? 0x0 : 0x7; } drm_dbg_kms(&i915->drm, "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", - i915->display.vbt.int_tv_support, - i915->display.vbt.int_crt_support, - i915->display.vbt.lvds_use_ssc, - i915->display.vbt.lvds_ssc_freq, - i915->display.vbt.display_clock_mode, - i915->display.vbt.fdi_rx_polarity_inverted); + data->int_tv_support, + data->int_crt_support, + data->lvds_use_ssc, + data->lvds_ssc_freq, + data->display_clock_mode, + data->fdi_rx_polarity_inverted); } static const struct child_device_config * @@ -1227,7 +1229,7 @@ parse_sdvo_device_mapping(struct drm_i915_private *i915) return; } - list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { + list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) { const struct child_device_config *child = &devdata->child; struct sdvo_device_mapping *mapping; @@ -1252,7 +1254,7 @@ parse_sdvo_device_mapping(struct drm_i915_private *i915) child->slave_addr, (child->dvo_port == DEVICE_PORT_DVOB) ? "SDVOB" : "SDVOC"); - mapping = &i915->display.vbt.sdvo_mappings[child->dvo_port - 1]; + mapping = &i915->display.vbt.data.sdvo_mappings[child->dvo_port - 1]; if (!mapping->initialized) { mapping->dvo_port = child->dvo_port; mapping->slave_addr = child->slave_addr; @@ -1303,7 +1305,7 @@ parse_driver_features(struct drm_i915_private *i915) * interpretation, but real world VBTs seem to. */ if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) - i915->display.vbt.int_lvds_support = 0; + i915->display.vbt.data.int_lvds_support = 0; } else { /* * FIXME it's not clear which BDB version has the LVDS config @@ -1316,10 +1318,10 @@ parse_driver_features(struct drm_i915_private *i915) * in the wild with the bits correctly populated. Version * 108 (on i85x) does not have the bits correctly populated. */ - if (i915->display.vbt.version >= 134 && + if (i915->display.vbt.data.version >= 134 && driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) - i915->display.vbt.int_lvds_support = 0; + i915->display.vbt.data.int_lvds_support = 0; } } @@ -1333,7 +1335,7 @@ parse_panel_driver_features(struct drm_i915_private *i915, if (!driver) return; - if (i915->display.vbt.version < 228) { + if (i915->display.vbt.data.version < 228) { drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n", driver->drrs_enabled); /* @@ -1366,7 +1368,7 @@ parse_power_conservation_features(struct drm_i915_private *i915, panel->vbt.vrr = true; /* matches Windows behaviour */ - if (i915->display.vbt.version < 228) + if (i915->display.vbt.data.version < 228) return; power = bdb_find_section(i915, BDB_LFP_POWER); @@ -1392,10 +1394,10 @@ parse_power_conservation_features(struct drm_i915_private *i915, panel->vbt.drrs_type = DRRS_TYPE_NONE; } - if (i915->display.vbt.version >= 232) + if (i915->display.vbt.data.version >= 232) panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type); - if (i915->display.vbt.version >= 233) + if (i915->display.vbt.data.version >= 233) panel->vbt.vrr = panel_bool(power->vrr_feature_enabled, panel_type); } @@ -1431,7 +1433,7 @@ parse_edp(struct drm_i915_private *i915, panel->vbt.edp.pps = *edp_pps; - if (i915->display.vbt.version >= 224) { + if (i915->display.vbt.data.version >= 224) { panel->vbt.edp.rate = edp->edp_fast_link_training_rate[panel_type] * 20; } else { @@ -1510,7 +1512,7 @@ parse_edp(struct drm_i915_private *i915, break; } - if (i915->display.vbt.version >= 173) { + if (i915->display.vbt.data.version >= 173) { u8 vswing; /* Don't read from VBT if module parameter has valid value*/ @@ -1526,7 +1528,7 @@ parse_edp(struct drm_i915_private *i915, panel->vbt.edp.drrs_msa_timing_delay = panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2); - if (i915->display.vbt.version >= 244) + if (i915->display.vbt.data.version >= 244) panel->vbt.edp.max_link_rate = edp->edp_max_port_link_rate[panel_type] * 20; } @@ -1558,7 +1560,7 @@ parse_psr(struct drm_i915_private *i915, * New psr options 0=500us, 1=100us, 2=2500us, 3=0us * Old decimal value is wake up time in multiples of 100 us. */ - if (i915->display.vbt.version >= 205 && + if (i915->display.vbt.data.version >= 205 && (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) { switch (psr_table->tp1_wakeup_time) { case 0: @@ -1604,7 +1606,7 @@ parse_psr(struct drm_i915_private *i915, panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; } - if (i915->display.vbt.version >= 226) { + if (i915->display.vbt.data.version >= 226) { u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; wakeup_time = panel_bits(wakeup_time, panel_type, 2); @@ -1636,7 +1638,7 @@ static void parse_dsi_backlight_ports(struct drm_i915_private *i915, { enum port port_bc = DISPLAY_VER(i915) >= 11 ? PORT_B : PORT_C; - if (!panel->vbt.dsi.config->dual_link || i915->display.vbt.version < 197) { + if (!panel->vbt.dsi.config->dual_link || i915->display.vbt.data.version < 197) { panel->vbt.dsi.bl_ports = BIT(port); if (panel->vbt.dsi.config->cabc_supported) panel->vbt.dsi.cabc_ports = BIT(port); @@ -2090,7 +2092,7 @@ parse_compression_parameters(struct drm_i915_private *i915) u16 block_size; int index; - if (i915->display.vbt.version < 198) + if (i915->display.vbt.data.version < 198) return; params = bdb_find_section(i915, BDB_COMPRESSION_PARAMETERS); @@ -2110,7 +2112,7 @@ parse_compression_parameters(struct drm_i915_private *i915) } } - list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { + list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) { const struct child_device_config *child = &devdata->child; if (!child->compression_enable) @@ -2435,10 +2437,10 @@ static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate) int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata) { - if (!devdata || devdata->i915->display.vbt.version < 216) + if (!devdata || devdata->i915->display.vbt.data.version < 216) return 0; - if (devdata->i915->display.vbt.version >= 230) + if (devdata->i915->display.vbt.data.version >= 230) return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate); else return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate); @@ -2446,7 +2448,7 @@ int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata) int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata) { - if (!devdata || devdata->i915->display.vbt.version < 244) + if (!devdata || devdata->i915->display.vbt.data.version < 244) return 0; return devdata->child.dp_max_lane_count + 1; @@ -2541,7 +2543,7 @@ intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata) /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */ int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata) { - if (!devdata || devdata->i915->display.vbt.version < 158 || + if (!devdata || devdata->i915->display.vbt.data.version < 158 || DISPLAY_VER(devdata->i915) >= 14) return -1; @@ -2550,7 +2552,7 @@ int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata) int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata) { - if (!devdata || devdata->i915->display.vbt.version < 204) + if (!devdata || devdata->i915->display.vbt.data.version < 204) return 0; switch (devdata->child.hdmi_max_data_rate) { @@ -2688,10 +2690,10 @@ static void parse_ddi_ports(struct drm_i915_private *i915) if (!has_ddi_port_info(i915)) return; - list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) + list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) parse_ddi_port(devdata); - list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) + list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) print_ddi_port(devdata); } @@ -2724,33 +2726,33 @@ parse_general_definitions(struct drm_i915_private *i915) bus_pin = defs->crt_ddc_gmbus_pin; drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin); if (intel_gmbus_is_valid_pin(i915, bus_pin)) - i915->display.vbt.crt_ddc_pin = bus_pin; + i915->display.vbt.data.crt_ddc_pin = bus_pin; - if (i915->display.vbt.version < 106) { + if (i915->display.vbt.data.version < 106) { expected_size = 22; - } else if (i915->display.vbt.version < 111) { + } else if (i915->display.vbt.data.version < 111) { expected_size = 27; - } else if (i915->display.vbt.version < 195) { + } else if (i915->display.vbt.data.version < 195) { expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; - } else if (i915->display.vbt.version == 195) { + } else if (i915->display.vbt.data.version == 195) { expected_size = 37; - } else if (i915->display.vbt.version <= 215) { + } else if (i915->display.vbt.data.version <= 215) { expected_size = 38; - } else if (i915->display.vbt.version <= 250) { + } else if (i915->display.vbt.data.version <= 250) { expected_size = 39; } else { expected_size = sizeof(*child); BUILD_BUG_ON(sizeof(*child) < 39); drm_dbg(&i915->drm, "Expected child device config size for VBT version %u not known; assuming %u\n", - i915->display.vbt.version, expected_size); + i915->display.vbt.data.version, expected_size); } /* Flag an error for unexpected size, but continue anyway. */ if (defs->child_dev_size != expected_size) drm_err(&i915->drm, "Unexpected child device config size %u (expected %u for VBT version %u)\n", - defs->child_dev_size, expected_size, i915->display.vbt.version); + defs->child_dev_size, expected_size, i915->display.vbt.data.version); /* The legacy sized child device config is the minimum we need. */ if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { @@ -2786,10 +2788,10 @@ parse_general_definitions(struct drm_i915_private *i915) memcpy(&devdata->child, child, min_t(size_t, defs->child_dev_size, sizeof(*child))); - list_add_tail(&devdata->node, &i915->display.vbt.display_devices); + list_add_tail(&devdata->node, &i915->display.vbt.data.display_devices); } - if (list_empty(&i915->display.vbt.display_devices)) + if (list_empty(&i915->display.vbt.data.display_devices)) drm_dbg_kms(&i915->drm, "no child dev is parsed from VBT\n"); } @@ -2798,25 +2800,25 @@ parse_general_definitions(struct drm_i915_private *i915) static void init_vbt_defaults(struct drm_i915_private *i915) { - i915->display.vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; + i915->display.vbt.data.crt_ddc_pin = GMBUS_PIN_VGADDC; /* general features */ - i915->display.vbt.int_tv_support = 1; - i915->display.vbt.int_crt_support = 1; + i915->display.vbt.data.int_tv_support = 1; + i915->display.vbt.data.int_crt_support = 1; /* driver features */ - i915->display.vbt.int_lvds_support = 1; + i915->display.vbt.data.int_lvds_support = 1; /* Default to using SSC */ - i915->display.vbt.lvds_use_ssc = 1; + i915->display.vbt.data.lvds_use_ssc = 1; /* * Core/SandyBridge/IvyBridge use alternative (120MHz) reference * clock for LVDS. */ - i915->display.vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915, - !HAS_PCH_SPLIT(i915)); + i915->display.vbt.data.lvds_ssc_freq = intel_bios_ssc_frequency(i915, + !HAS_PCH_SPLIT(i915)); drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n", - i915->display.vbt.lvds_ssc_freq); + i915->display.vbt.data.lvds_ssc_freq); } /* Common defaults which may be overridden by VBT. */ @@ -2877,7 +2879,7 @@ init_vbt_missing_defaults(struct drm_i915_private *i915) if (port == PORT_A) child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR; - list_add_tail(&devdata->node, &i915->display.vbt.display_devices); + list_add_tail(&devdata->node, &i915->display.vbt.data.display_devices); drm_dbg_kms(&i915->drm, "Generating default VBT child device with type 0x04%x on port %c\n", @@ -2885,7 +2887,7 @@ init_vbt_missing_defaults(struct drm_i915_private *i915) } /* Bypass some minimum baseline VBT version checks */ - i915->display.vbt.version = 155; + i915->display.vbt.data.version = 155; } static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) @@ -3077,8 +3079,8 @@ void intel_bios_init(struct drm_i915_private *i915) struct vbt_header *oprom_vbt = NULL; const struct bdb_header *bdb; - INIT_LIST_HEAD(&i915->display.vbt.display_devices); - INIT_LIST_HEAD(&i915->display.vbt.bdb_blocks); + INIT_LIST_HEAD(&i915->display.vbt.data.display_devices); + INIT_LIST_HEAD(&i915->display.vbt.data.bdb_blocks); if (!HAS_DISPLAY(i915)) { drm_dbg_kms(&i915->drm, @@ -3106,11 +3108,11 @@ void intel_bios_init(struct drm_i915_private *i915) goto out; bdb = get_bdb_header(vbt); - i915->display.vbt.version = bdb->version; + i915->display.vbt.data.version = bdb->version; drm_dbg_kms(&i915->drm, "VBT signature \"%.*s\", BDB version %d\n", - (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.version); + (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.data.version); init_bdb_blocks(i915, bdb); @@ -3192,15 +3194,16 @@ void intel_bios_init_panel_late(struct drm_i915_private *i915, void intel_bios_driver_remove(struct drm_i915_private *i915) { struct intel_bios_encoder_data *devdata, *nd; + struct intel_vbt *vbt = &i915->display.vbt; struct bdb_block_entry *entry, *ne; - list_for_each_entry_safe(devdata, nd, &i915->display.vbt.display_devices, node) { + list_for_each_entry_safe(devdata, nd, &vbt->data.display_devices, node) { list_del(&devdata->node); kfree(devdata->dsc); kfree(devdata); } - list_for_each_entry_safe(entry, ne, &i915->display.vbt.bdb_blocks, node) { + list_for_each_entry_safe(entry, ne, &vbt->data.bdb_blocks, node) { list_del(&entry->node); kfree(entry); } @@ -3233,13 +3236,13 @@ bool intel_bios_is_tv_present(struct drm_i915_private *i915) { const struct intel_bios_encoder_data *devdata; - if (!i915->display.vbt.int_tv_support) + if (!i915->display.vbt.data.int_tv_support) return false; - if (list_empty(&i915->display.vbt.display_devices)) + if (list_empty(&i915->display.vbt.data.display_devices)) return true; - list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { + list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) { const struct child_device_config *child = &devdata->child; /* @@ -3275,10 +3278,10 @@ bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin) { const struct intel_bios_encoder_data *devdata; - if (list_empty(&i915->display.vbt.display_devices)) + if (list_empty(&i915->display.vbt.data.display_devices)) return true; - list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { + list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) { const struct child_device_config *child = &devdata->child; /* If the device type is not LFP, continue. @@ -3329,7 +3332,7 @@ bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port) if (!is_port_valid(i915, port)) return false; - list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { + list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) { const struct child_device_config *child = &devdata->child; if (dvo_port_to_port(i915, child->dvo_port) == port) @@ -3370,7 +3373,7 @@ bool intel_bios_is_dsi_present(struct drm_i915_private *i915, { const struct intel_bios_encoder_data *devdata; - list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { + list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) { const struct child_device_config *child = &devdata->child; u8 dvo_port = child->dvo_port; @@ -3464,7 +3467,7 @@ bool intel_bios_get_dsc_params(struct intel_encoder *encoder, struct drm_i915_private *i915 = to_i915(encoder->base.dev); const struct intel_bios_encoder_data *devdata; - list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { + list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) { const struct child_device_config *child = &devdata->child; if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) @@ -3581,7 +3584,7 @@ bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devda i915 = devdata->i915; aux_channel = devdata->child.aux_channel; - list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { + list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) { if (intel_bios_encoder_supports_dp(devdata) && aux_channel == devdata->child.aux_channel) count++; @@ -3592,7 +3595,7 @@ bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devda int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata) { - if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost) + if (!devdata || devdata->i915->display.vbt.data.version < 196 || !devdata->child.iboost) return 0; return translate_iboost(devdata->child.dp_iboost_level); @@ -3600,7 +3603,7 @@ int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata) int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata) { - if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost) + if (!devdata || devdata->i915->display.vbt.data.version < 196 || !devdata->child.iboost) return 0; return translate_iboost(devdata->child.hdmi_iboost_level); @@ -3616,12 +3619,12 @@ int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata) bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata) { - return devdata->i915->display.vbt.version >= 195 && devdata->child.dp_usb_type_c; + return devdata->i915->display.vbt.data.version >= 195 && devdata->child.dp_usb_type_c; } bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata) { - return devdata->i915->display.vbt.version >= 209 && devdata->child.tbt; + return devdata->i915->display.vbt.data.version >= 209 && devdata->child.tbt; } bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata) @@ -3639,7 +3642,7 @@ intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port) { struct intel_bios_encoder_data *devdata; - list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { + list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) { if (intel_bios_encoder_port(devdata) == port) return devdata; } @@ -3653,6 +3656,6 @@ void intel_bios_for_each_encoder(struct drm_i915_private *i915, { struct intel_bios_encoder_data *devdata; - list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) + list_for_each_entry(devdata, &i915->display.vbt.data.display_devices, node) func(i915, devdata); } diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c index abaacea5c2cc..b1953a447f20 100644 --- a/drivers/gpu/drm/i915/display/intel_crt.c +++ b/drivers/gpu/drm/i915/display/intel_crt.c @@ -1033,7 +1033,7 @@ void intel_crt_init(struct drm_i915_private *dev_priv) return; } - ddc_pin = dev_priv->display.vbt.crt_ddc_pin; + ddc_pin = dev_priv->display.vbt.data.crt_ddc_pin; connector = &intel_connector->base; crt->connector = intel_connector; diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 927d124457b6..f559c089b038 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2509,12 +2509,12 @@ void intel_panel_sanitize_ssc(struct drm_i915_private *dev_priv) PCH_DREF_CONTROL) & DREF_SSC1_ENABLE; - if (dev_priv->display.vbt.lvds_use_ssc != bios_lvds_use_ssc) { + if (dev_priv->display.vbt.data.lvds_use_ssc != bios_lvds_use_ssc) { drm_dbg_kms(&dev_priv->drm, "SSC %s by BIOS, overriding VBT which says %s\n", str_enabled_disabled(bios_lvds_use_ssc), - str_enabled_disabled(dev_priv->display.vbt.lvds_use_ssc)); - dev_priv->display.vbt.lvds_use_ssc = bios_lvds_use_ssc; + str_enabled_disabled(dev_priv->display.vbt.data.lvds_use_ssc)); + dev_priv->display.vbt.data.lvds_use_ssc = bios_lvds_use_ssc; } } } @@ -7465,7 +7465,7 @@ static bool intel_ddi_crt_present(struct drm_i915_private *dev_priv) if (intel_de_read(dev_priv, DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) return false; - if (!dev_priv->display.vbt.int_crt_support) + if (!dev_priv->display.vbt.data.int_crt_support) return false; return true; @@ -7534,7 +7534,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv) } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { bool has_edp, has_port; - if (IS_VALLEYVIEW(dev_priv) && dev_priv->display.vbt.int_crt_support) + if (IS_VALLEYVIEW(dev_priv) && dev_priv->display.vbt.data.int_crt_support) intel_crt_init(dev_priv); /* diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h index 47297ed85822..6e1aa58aad61 100644 --- a/drivers/gpu/drm/i915/display/intel_display_core.h +++ b/drivers/gpu/drm/i915/display/intel_display_core.h @@ -232,6 +232,10 @@ struct intel_vbt_data { } sdvo_mappings[2]; }; +struct intel_vbt { + struct intel_vbt_data data; +}; + struct intel_wm { /* * Raw watermark latency values: @@ -516,7 +520,7 @@ struct intel_display { struct intel_opregion opregion; struct intel_overlay *overlay; struct intel_display_params params; - struct intel_vbt_data vbt; + struct intel_vbt vbt; struct intel_wm wm; }; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 9ff0cbd9c0df..c3ef87d1107b 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -6182,7 +6182,7 @@ intel_edp_add_properties(struct intel_dp *intel_dp) intel_attach_scaling_mode_property(&connector->base); drm_connector_set_panel_orientation_with_quirk(&connector->base, - i915->display.vbt.orientation, + i915->display.vbt.data.orientation, fixed_mode->hdisplay, fixed_mode->vdisplay); } diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c index 3038655377ea..c5efd665bc6f 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll.c +++ b/drivers/gpu/drm/i915/display/intel_dpll.c @@ -376,7 +376,7 @@ static int i9xx_pll_refclk(struct drm_device *dev, u32 dpll = pipe_config->dpll_hw_state.dpll; if ((dpll & PLL_REF_INPUT_MASK) == PLLB_REF_INPUT_SPREADSPECTRUMIN) - return dev_priv->display.vbt.lvds_ssc_freq; + return dev_priv->display.vbt.data.lvds_ssc_freq; else if (HAS_PCH_SPLIT(dev_priv)) return 120000; else if (DISPLAY_VER(dev_priv) != 2) @@ -1210,7 +1210,7 @@ static void ilk_update_pll_dividers(struct intel_crtc_state *crtc_state, factor = 21; if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) { if ((intel_panel_use_ssc(dev_priv) && - dev_priv->display.vbt.lvds_ssc_freq == 100000) || + dev_priv->display.vbt.data.lvds_ssc_freq == 100000) || (HAS_PCH_IBX(dev_priv) && intel_is_dual_link_lvds(dev_priv))) factor = 25; @@ -1325,8 +1325,8 @@ static int ilk_crtc_compute_clock(struct intel_atomic_state *state, if (intel_panel_use_ssc(dev_priv)) { drm_dbg_kms(&dev_priv->drm, "using SSC reference clock of %d kHz\n", - dev_priv->display.vbt.lvds_ssc_freq); - refclk = dev_priv->display.vbt.lvds_ssc_freq; + dev_priv->display.vbt.data.lvds_ssc_freq); + refclk = dev_priv->display.vbt.data.lvds_ssc_freq; } if (intel_is_dual_link_lvds(dev_priv)) { @@ -1477,7 +1477,7 @@ static int g4x_crtc_compute_clock(struct intel_atomic_state *state, if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) { if (intel_panel_use_ssc(dev_priv)) { - refclk = dev_priv->display.vbt.lvds_ssc_freq; + refclk = dev_priv->display.vbt.data.lvds_ssc_freq; drm_dbg_kms(&dev_priv->drm, "using SSC reference clock of %d kHz\n", refclk); @@ -1526,7 +1526,7 @@ static int pnv_crtc_compute_clock(struct intel_atomic_state *state, if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) { if (intel_panel_use_ssc(dev_priv)) { - refclk = dev_priv->display.vbt.lvds_ssc_freq; + refclk = dev_priv->display.vbt.data.lvds_ssc_freq; drm_dbg_kms(&dev_priv->drm, "using SSC reference clock of %d kHz\n", refclk); @@ -1564,7 +1564,7 @@ static int i9xx_crtc_compute_clock(struct intel_atomic_state *state, if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) { if (intel_panel_use_ssc(dev_priv)) { - refclk = dev_priv->display.vbt.lvds_ssc_freq; + refclk = dev_priv->display.vbt.data.lvds_ssc_freq; drm_dbg_kms(&dev_priv->drm, "using SSC reference clock of %d kHz\n", refclk); @@ -1604,7 +1604,7 @@ static int i8xx_crtc_compute_clock(struct intel_atomic_state *state, if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) { if (intel_panel_use_ssc(dev_priv)) { - refclk = dev_priv->display.vbt.lvds_ssc_freq; + refclk = dev_priv->display.vbt.data.lvds_ssc_freq; drm_dbg_kms(&dev_priv->drm, "using SSC reference clock of %d kHz\n", refclk); diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index ef57dad1a9cb..4b6c57f89bef 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -2796,6 +2796,7 @@ static void icl_calc_dpll_state(struct drm_i915_private *i915, struct intel_dpll_hw_state *pll_state) { u32 dco_fraction = pll_params->dco_fraction; + struct intel_vbt_data *data = &i915->display.vbt.data; if (ehl_combo_pll_div_frac_wa_needed(i915)) dco_fraction = DIV_ROUND_CLOSEST(dco_fraction, 2); @@ -2813,8 +2814,8 @@ static void icl_calc_dpll_state(struct drm_i915_private *i915, else pll_state->cfgcr1 |= DPLL_CFGCR1_CENTRAL_FREQ_8400; - if (i915->display.vbt.override_afc_startup) - pll_state->div0 = TGL_DPLL0_DIV0_AFC_STARTUP(i915->display.vbt.override_afc_startup_val); + if (data->override_afc_startup) + pll_state->div0 = TGL_DPLL0_DIV0_AFC_STARTUP(data->override_afc_startup_val); } static int icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc, @@ -3009,8 +3010,8 @@ static int icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state, DKL_PLL_DIV0_PROP_COEFF(prop_coeff) | DKL_PLL_DIV0_FBPREDIV(m1div) | DKL_PLL_DIV0_FBDIV_INT(m2div_int); - if (i915->display.vbt.override_afc_startup) { - u8 val = i915->display.vbt.override_afc_startup_val; + if (i915->display.vbt.data.override_afc_startup) { + u8 val = i915->display.vbt.data.override_afc_startup_val; pll_state->mg_pll_div0 |= DKL_PLL_DIV0_AFC_STARTUP(val); } @@ -3548,7 +3549,7 @@ static bool dkl_pll_get_hw_state(struct drm_i915_private *i915, hw_state->mg_pll_div0 = intel_dkl_phy_read(i915, DKL_PLL_DIV0(tc_port)); val = DKL_PLL_DIV0_MASK; - if (i915->display.vbt.override_afc_startup) + if (i915->display.vbt.data.override_afc_startup) val |= DKL_PLL_DIV0_AFC_STARTUP_MASK; hw_state->mg_pll_div0 &= val; @@ -3612,7 +3613,7 @@ static bool icl_pll_get_hw_state(struct drm_i915_private *i915, TGL_DPLL_CFGCR0(id)); hw_state->cfgcr1 = intel_de_read(i915, TGL_DPLL_CFGCR1(id)); - if (i915->display.vbt.override_afc_startup) { + if (i915->display.vbt.data.override_afc_startup) { hw_state->div0 = intel_de_read(i915, TGL_DPLL0_DIV0(id)); hw_state->div0 &= TGL_DPLL0_DIV0_AFC_STARTUP_MASK; } @@ -3686,9 +3687,9 @@ static void icl_dpll_write(struct drm_i915_private *i915, intel_de_write(i915, cfgcr0_reg, hw_state->cfgcr0); intel_de_write(i915, cfgcr1_reg, hw_state->cfgcr1); - drm_WARN_ON_ONCE(&i915->drm, i915->display.vbt.override_afc_startup && + drm_WARN_ON_ONCE(&i915->drm, i915->display.vbt.data.override_afc_startup && !i915_mmio_reg_valid(div0_reg)); - if (i915->display.vbt.override_afc_startup && + if (i915->display.vbt.data.override_afc_startup && i915_mmio_reg_valid(div0_reg)) intel_de_rmw(i915, div0_reg, TGL_DPLL0_DIV0_AFC_STARTUP_MASK, hw_state->div0); @@ -3769,7 +3770,7 @@ static void dkl_pll_write(struct drm_i915_private *i915, intel_dkl_phy_write(i915, DKL_CLKTOP2_HSCLKCTL(tc_port), val); val = DKL_PLL_DIV0_MASK; - if (i915->display.vbt.override_afc_startup) + if (i915->display.vbt.data.override_afc_startup) val |= DKL_PLL_DIV0_AFC_STARTUP_MASK; intel_dkl_phy_rmw(i915, DKL_PLL_DIV0(tc_port), val, hw_state->mg_pll_div0); diff --git a/drivers/gpu/drm/i915/display/intel_dsi.c b/drivers/gpu/drm/i915/display/intel_dsi.c index d3cf6a652221..aa44c1effa54 100644 --- a/drivers/gpu/drm/i915/display/intel_dsi.c +++ b/drivers/gpu/drm/i915/display/intel_dsi.c @@ -126,7 +126,7 @@ intel_dsi_get_panel_orientation(struct intel_connector *connector) if (orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN) return orientation; - orientation = dev_priv->display.vbt.orientation; + orientation = dev_priv->display.vbt.data.orientation; if (orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN) return orientation; diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c index 221f5c6c871b..64dd4717122f 100644 --- a/drivers/gpu/drm/i915/display/intel_lvds.c +++ b/drivers/gpu/drm/i915/display/intel_lvds.c @@ -850,12 +850,12 @@ void intel_lvds_init(struct drm_i915_private *i915) /* Skip init on machines we know falsely report LVDS */ if (dmi_check_system(intel_no_lvds)) { - drm_WARN(&i915->drm, !i915->display.vbt.int_lvds_support, + drm_WARN(&i915->drm, !i915->display.vbt.data.int_lvds_support, "Useless DMI match. Internal LVDS support disabled by VBT\n"); return; } - if (!i915->display.vbt.int_lvds_support) { + if (!i915->display.vbt.data.int_lvds_support) { drm_dbg_kms(&i915->drm, "Internal LVDS support disabled by VBT\n"); return; diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c index 0d8e5320a4f8..5e76e366d4d1 100644 --- a/drivers/gpu/drm/i915/display/intel_panel.c +++ b/drivers/gpu/drm/i915/display/intel_panel.c @@ -48,7 +48,7 @@ bool intel_panel_use_ssc(struct drm_i915_private *i915) { if (i915->display.params.panel_use_ssc >= 0) return i915->display.params.panel_use_ssc != 0; - return i915->display.vbt.lvds_use_ssc && + return i915->display.vbt.data.lvds_use_ssc && !intel_has_quirk(i915, QUIRK_LVDS_SSC_DISABLE); } diff --git a/drivers/gpu/drm/i915/display/intel_pch_refclk.c b/drivers/gpu/drm/i915/display/intel_pch_refclk.c index 713cfba71475..f37fce257fbd 100644 --- a/drivers/gpu/drm/i915/display/intel_pch_refclk.c +++ b/drivers/gpu/drm/i915/display/intel_pch_refclk.c @@ -520,7 +520,7 @@ static void ilk_init_pch_refclk(struct drm_i915_private *dev_priv) } if (HAS_PCH_IBX(dev_priv)) { - has_ck505 = dev_priv->display.vbt.display_clock_mode; + has_ck505 = dev_priv->display.vbt.data.display_clock_mode; can_ssc = has_ck505; } else { has_ck505 = false; diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c index 9218047495fb..632d0f0daa32 100644 --- a/drivers/gpu/drm/i915/display/intel_sdvo.c +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c @@ -2078,7 +2078,7 @@ intel_sdvo_get_analog_edid(struct drm_connector *connector) struct drm_i915_private *i915 = to_i915(connector->dev); struct i2c_adapter *ddc; - ddc = intel_gmbus_get_adapter(i915, i915->display.vbt.crt_ddc_pin); + ddc = intel_gmbus_get_adapter(i915, i915->display.vbt.data.crt_ddc_pin); if (!ddc) return NULL; @@ -2601,9 +2601,9 @@ intel_sdvo_select_ddc_bus(struct intel_sdvo *sdvo, int ddc_bus; if (sdvo->base.port == PORT_B) - mapping = &dev_priv->display.vbt.sdvo_mappings[0]; + mapping = &dev_priv->display.vbt.data.sdvo_mappings[0]; else - mapping = &dev_priv->display.vbt.sdvo_mappings[1]; + mapping = &dev_priv->display.vbt.data.sdvo_mappings[1]; if (mapping->initialized) ddc_bus = (mapping->ddc_pin & 0xf0) >> 4; @@ -2624,9 +2624,9 @@ intel_sdvo_select_i2c_bus(struct intel_sdvo *sdvo) u8 pin; if (sdvo->base.port == PORT_B) - mapping = &dev_priv->display.vbt.sdvo_mappings[0]; + mapping = &dev_priv->display.vbt.data.sdvo_mappings[0]; else - mapping = &dev_priv->display.vbt.sdvo_mappings[1]; + mapping = &dev_priv->display.vbt.data.sdvo_mappings[1]; if (mapping->initialized && intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin)) @@ -2668,11 +2668,11 @@ intel_sdvo_get_slave_addr(struct intel_sdvo *sdvo) const struct sdvo_device_mapping *my_mapping, *other_mapping; if (sdvo->base.port == PORT_B) { - my_mapping = &dev_priv->display.vbt.sdvo_mappings[0]; - other_mapping = &dev_priv->display.vbt.sdvo_mappings[1]; + my_mapping = &dev_priv->display.vbt.data.sdvo_mappings[0]; + other_mapping = &dev_priv->display.vbt.data.sdvo_mappings[1]; } else { - my_mapping = &dev_priv->display.vbt.sdvo_mappings[1]; - other_mapping = &dev_priv->display.vbt.sdvo_mappings[0]; + my_mapping = &dev_priv->display.vbt.data.sdvo_mappings[1]; + other_mapping = &dev_priv->display.vbt.data.sdvo_mappings[0]; } /* If the BIOS described our SDVO device, take advantage of it. */ diff --git a/drivers/gpu/drm/i915/intel_clock_gating.c b/drivers/gpu/drm/i915/intel_clock_gating.c index 9c21ce69bd98..8b6991db369e 100644 --- a/drivers/gpu/drm/i915/intel_clock_gating.c +++ b/drivers/gpu/drm/i915/intel_clock_gating.c @@ -225,7 +225,7 @@ static void cpt_init_clock_gating(struct drm_i915_private *i915) val = intel_uncore_read(&i915->uncore, TRANS_CHICKEN2(pipe)); val |= TRANS_CHICKEN2_TIMING_OVERRIDE; val &= ~TRANS_CHICKEN2_FDI_POLARITY_REVERSED; - if (i915->display.vbt.fdi_rx_polarity_inverted) + if (i915->display.vbt.data.fdi_rx_polarity_inverted) val |= TRANS_CHICKEN2_FDI_POLARITY_REVERSED; val &= ~TRANS_CHICKEN2_DISABLE_DEEP_COLOR_COUNTER; val &= ~TRANS_CHICKEN2_DISABLE_DEEP_COLOR_MODESWITCH; From patchwork Mon Jan 8 23:05:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sripada, Radhakrishna" X-Patchwork-Id: 13514136 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 65E04C4707C for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="11514118" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="11514118" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="774647077" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="774647077" Received: from invictus.jf.intel.com ([10.165.21.201]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:06:59 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Subject: [RFC 02/15] drm/i915: Move vbt fields from opregion to its own structure Date: Mon, 8 Jan 2024 15:05:04 -0800 Message-Id: <20240108230517.1497504-3-radhakrishna.sripada@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> References: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" For discrete cards, vbt need not exist in opregion as in the case with pre opregion platforms. To handle vbt in such cases, move vbt fields in opregion structure to newly introduced vbt structure. This organizes vbt related fields and processed intel_vbt_data under the same structure. Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_bios.c | 4 +- .../gpu/drm/i915/display/intel_display_core.h | 3 ++ .../drm/i915/display/intel_display_debugfs.c | 6 +-- drivers/gpu/drm/i915/display/intel_opregion.c | 38 +++++++++---------- drivers/gpu/drm/i915/display/intel_opregion.h | 3 -- 5 files changed, 27 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index b9120eb1321d..0e09454ba79c 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -3075,7 +3075,7 @@ static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915) */ void intel_bios_init(struct drm_i915_private *i915) { - const struct vbt_header *vbt = i915->display.opregion.vbt; + const struct vbt_header *vbt = i915->display.vbt.vbt; struct vbt_header *oprom_vbt = NULL; const struct bdb_header *bdb; @@ -3308,7 +3308,7 @@ bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin) * additional data. Trust that if the VBT was written into * the OpRegion then they have validated the LVDS's existence. */ - if (i915->display.opregion.vbt) + if (i915->display.vbt.vbt) return true; } diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h index 6e1aa58aad61..9e134b08aea0 100644 --- a/drivers/gpu/drm/i915/display/intel_display_core.h +++ b/drivers/gpu/drm/i915/display/intel_display_core.h @@ -233,6 +233,9 @@ struct intel_vbt_data { }; struct intel_vbt { + void *vbt_firmware; + const void *vbt; + u32 vbt_size; struct intel_vbt_data data; }; diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index d951edb36687..c01e04a0142a 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -100,10 +100,10 @@ static int i915_opregion(struct seq_file *m, void *unused) static int i915_vbt(struct seq_file *m, void *unused) { struct drm_i915_private *i915 = node_to_i915(m->private); - struct intel_opregion *opregion = &i915->display.opregion; + struct intel_vbt *vbt = &i915->display.vbt; - if (opregion->vbt) - seq_write(m, opregion->vbt, opregion->vbt_size); + if (vbt->vbt) + seq_write(m, vbt->vbt, vbt->vbt_size); return 0; } diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c index 1ce785db6a5e..fa25007fac3a 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.c +++ b/drivers/gpu/drm/i915/display/intel_opregion.c @@ -839,7 +839,7 @@ static const struct dmi_system_id intel_no_opregion_vbt[] = { static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv) { - struct intel_opregion *opregion = &dev_priv->display.opregion; + struct intel_vbt *vbt = &dev_priv->display.vbt; const struct firmware *fw = NULL; const char *name = dev_priv->display.params.vbt_firmware; int ret; @@ -856,12 +856,12 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv) } if (intel_bios_is_valid_vbt(fw->data, fw->size)) { - opregion->vbt_firmware = kmemdup(fw->data, fw->size, GFP_KERNEL); - if (opregion->vbt_firmware) { + vbt->vbt_firmware = kmemdup(fw->data, fw->size, GFP_KERNEL); + if (vbt->vbt_firmware) { drm_dbg_kms(&dev_priv->drm, "Found valid VBT firmware \"%s\"\n", name); - opregion->vbt = opregion->vbt_firmware; - opregion->vbt_size = fw->size; + vbt->vbt = vbt->vbt_firmware; + vbt->vbt_size = fw->size; ret = 0; } else { ret = -ENOMEM; @@ -880,12 +880,13 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv) int intel_opregion_setup(struct drm_i915_private *dev_priv) { struct intel_opregion *opregion = &dev_priv->display.opregion; + struct intel_vbt *vbt = &dev_priv->display.vbt; struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); u32 asls, mboxes; char buf[sizeof(OPREGION_SIGNATURE)]; int err = 0; void *base; - const void *vbt; + const void *vbt_data; u32 vbt_size; BUILD_BUG_ON(sizeof(struct opregion_header) != 0x100); @@ -992,13 +993,13 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv) opregion->rvda = memremap(rvda, opregion->asle->rvds, MEMREMAP_WB); - vbt = opregion->rvda; + vbt_data = opregion->rvda; vbt_size = opregion->asle->rvds; - if (intel_bios_is_valid_vbt(vbt, vbt_size)) { + if (intel_bios_is_valid_vbt(vbt_data, vbt_size)) { drm_dbg_kms(&dev_priv->drm, "Found valid VBT in ACPI OpRegion (RVDA)\n"); - opregion->vbt = vbt; - opregion->vbt_size = vbt_size; + vbt->vbt = vbt_data; + vbt->vbt_size = vbt_size; goto out; } else { drm_dbg_kms(&dev_priv->drm, @@ -1008,7 +1009,7 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv) } } - vbt = base + OPREGION_VBT_OFFSET; + vbt_data = base + OPREGION_VBT_OFFSET; /* * The VBT specification says that if the ASLE ext mailbox is not used * its area is reserved, but on some CHT boards the VBT extends into the @@ -1019,11 +1020,11 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv) vbt_size = (mboxes & MBOX_ASLE_EXT) ? OPREGION_ASLE_EXT_OFFSET : OPREGION_SIZE; vbt_size -= OPREGION_VBT_OFFSET; - if (intel_bios_is_valid_vbt(vbt, vbt_size)) { + if (intel_bios_is_valid_vbt(vbt_data, vbt_size)) { drm_dbg_kms(&dev_priv->drm, "Found valid VBT in ACPI OpRegion (Mailbox #4)\n"); - opregion->vbt = vbt; - opregion->vbt_size = vbt_size; + vbt->vbt = vbt_data; + vbt->vbt_size = vbt_size; } else { drm_dbg_kms(&dev_priv->drm, "Invalid VBT in ACPI OpRegion (Mailbox #4)\n"); @@ -1243,6 +1244,7 @@ void intel_opregion_unregister(struct drm_i915_private *i915) void intel_opregion_cleanup(struct drm_i915_private *i915) { struct intel_opregion *opregion = &i915->display.opregion; + struct intel_vbt *vbt = &i915->display.vbt; if (!opregion->header) return; @@ -1253,15 +1255,13 @@ void intel_opregion_cleanup(struct drm_i915_private *i915) memunmap(opregion->rvda); opregion->rvda = NULL; } - if (opregion->vbt_firmware) { - kfree(opregion->vbt_firmware); - opregion->vbt_firmware = NULL; - } + kfree(vbt->vbt_firmware); + vbt->vbt_firmware = NULL; opregion->header = NULL; opregion->acpi = NULL; opregion->swsci = NULL; opregion->asle = NULL; opregion->asle_ext = NULL; - opregion->vbt = NULL; + vbt->vbt = NULL; opregion->lid_state = NULL; } diff --git a/drivers/gpu/drm/i915/display/intel_opregion.h b/drivers/gpu/drm/i915/display/intel_opregion.h index fd2ea8ef0fa2..7e1c8f1c2da5 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.h +++ b/drivers/gpu/drm/i915/display/intel_opregion.h @@ -47,9 +47,6 @@ struct intel_opregion { struct opregion_asle *asle; struct opregion_asle_ext *asle_ext; void *rvda; - void *vbt_firmware; - const void *vbt; - u32 vbt_size; u32 *lid_state; struct work_struct asle_work; struct notifier_block acpi_notifier; From patchwork Mon Jan 8 23:05:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sripada, Radhakrishna" X-Patchwork-Id: 13514144 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3B333C4725D for ; Mon, 8 Jan 2024 23:07:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 07B9B10E342; Mon, 8 Jan 2024 23:07:05 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5736210E326 for ; Mon, 8 Jan 2024 23:07:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704755222; x=1736291222; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WNEuB+srrZ1uco+Gd4vFdYbLesrC+INYl2oJP05gcX8=; b=fLqdpBaMO2Qze9LNJS0O+RSG8nAZyQ7pbCyz5aiU2dIlAig/asBzH/k0 C+Z1czaUSZaQi7yMv0sTwWtClY1QhhZXzT8rKG0kgi3ox36s1BDO491UJ W/2GkUp+x/2hJDWFBTE6xT/feaS8Qj5o5SoIE+sxvvZx66qX6pE5DVytX deB/Wk5QkWtrpDmCYkH22oKkrH7t8Y+yostyRrwYOiHX4j8zn1LMV+QoM NAQNUp5MUYez1TjLVh75JhgI2Ymk9n7pJSZCdyQIr2dLRle8b1/lDNT3t j3lZoumSaBJAT5libAuy8iNVAPBdtyBNgIR1RlzYS9I2Ekv9aY4tbkte5 g==; X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="11514119" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="11514119" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="774647083" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="774647083" Received: from invictus.jf.intel.com ([10.165.21.201]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:06:59 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Subject: [RFC 03/15] drm/i915: Cache opregion asls pointer Date: Mon, 8 Jan 2024 15:05:05 -0800 Message-Id: <20240108230517.1497504-4-radhakrishna.sripada@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> References: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Asls offset is used to calculate the relative offset of vbt in ASLE mailbox. Cache the address read from PCI config space to use later during vbt extraction. Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_opregion.c | 4 +++- drivers/gpu/drm/i915/display/intel_opregion.h | 1 + 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c index fa25007fac3a..bd654d773ca7 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.c +++ b/drivers/gpu/drm/i915/display/intel_opregion.c @@ -903,6 +903,7 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv) return -ENOTSUPP; } + opregion->asls = asls; INIT_WORK(&opregion->asle_work, asle_work); base = memremap(asls, OPREGION_SIZE, MEMREMAP_WB); @@ -987,7 +988,7 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv) opregion->header->over.minor >= 1) { drm_WARN_ON(&dev_priv->drm, rvda < OPREGION_SIZE); - rvda += asls; + rvda += opregion->asls; } opregion->rvda = memremap(rvda, opregion->asle->rvds, @@ -1262,6 +1263,7 @@ void intel_opregion_cleanup(struct drm_i915_private *i915) opregion->swsci = NULL; opregion->asle = NULL; opregion->asle_ext = NULL; + opregion->asls = 0; vbt->vbt = NULL; opregion->lid_state = NULL; } diff --git a/drivers/gpu/drm/i915/display/intel_opregion.h b/drivers/gpu/drm/i915/display/intel_opregion.h index 7e1c8f1c2da5..03838fa39d0d 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.h +++ b/drivers/gpu/drm/i915/display/intel_opregion.h @@ -48,6 +48,7 @@ struct intel_opregion { struct opregion_asle_ext *asle_ext; void *rvda; u32 *lid_state; + u32 asls; struct work_struct asle_work; struct notifier_block acpi_notifier; }; From patchwork Mon Jan 8 23:05:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sripada, Radhakrishna" X-Patchwork-Id: 13514141 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E33E4C47DA6 for ; Mon, 8 Jan 2024 23:07:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E147910E33F; Mon, 8 Jan 2024 23:07:04 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 78F8310E2CB for ; Mon, 8 Jan 2024 23:07:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704755222; x=1736291222; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dbw/vOTz0AX/mZx2R2B9kmzOg6YtTCpVFUE/iQRSjaA=; b=k4D2IMVgDlCO0gtj+MqGrQ8rMDtpKlGhSCtZ9GoVW+1FH2gnUDcdvMxp fh5dWIhiUikdpX7jzU3Ao9hn0Swi0acnI9E2ru7AwgB2+eGycHDxdYdgu QpTqtmPXJuewvnip/VGesNjgcbJeuyl2zVpL3UKCibFRZEXwwoYEYZyTy lL100IkdREwCttZVEOIM9LFdB16iWqnfTSkSLt3CciPmBR40YZ+Zjt0gU rJDLmbED+2Ccj9TxknHvPt56mJ1zTuf9MlVbWEMsvsIUUu7b6dbN69Hrx Qg8W3forea1gpp8y9gMOUF8Vvv4zK0uXqNnDXFFScOnVa7R/27B/RYqo/ A==; X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="11514121" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="11514121" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="774647085" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="774647085" Received: from invictus.jf.intel.com ([10.165.21.201]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:06:59 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Subject: [RFC 04/15] drm/i915: Extract opregion vbt capture to its own function Date: Mon, 8 Jan 2024 15:05:06 -0800 Message-Id: <20240108230517.1497504-5-radhakrishna.sripada@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> References: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" As part of opregion setup, vbt is extracted from the opregion. Move the vbt parts of opregion setup into its own function. Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_opregion.c | 143 ++++++++++-------- 1 file changed, 76 insertions(+), 67 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c index bd654d773ca7..cf7312cfd94a 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.c +++ b/drivers/gpu/drm/i915/display/intel_opregion.c @@ -877,6 +877,81 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv) return ret; } +static int intel_load_opregion_vbt(struct drm_i915_private *i915, + struct intel_opregion *opregion, + struct intel_vbt *vbt) +{ + const void *vbt_data; + u32 vbt_size; + void *base = opregion->header; + + if (intel_load_vbt_firmware(i915) == 0) + goto out; + + if (dmi_check_system(intel_no_opregion_vbt)) + goto out; + + if (opregion->header->over.major >= 2 && opregion->asle && + opregion->asle->rvda && opregion->asle->rvds) { + resource_size_t rvda = opregion->asle->rvda; + + /* + * opregion 2.0: rvda is the physical VBT address. + * + * opregion 2.1+: rvda is unsigned, relative offset from + * opregion base, and should never point within opregion. + */ + if (opregion->header->over.major > 2 || + opregion->header->over.minor >= 1) { + drm_WARN_ON(&i915->drm, rvda < OPREGION_SIZE); + + rvda += opregion->asls; + } + + opregion->rvda = memremap(rvda, opregion->asle->rvds, + MEMREMAP_WB); + + vbt_data = opregion->rvda; + vbt_size = opregion->asle->rvds; + if (intel_bios_is_valid_vbt(vbt_data, vbt_size)) { + drm_dbg_kms(&i915->drm, + "Found valid VBT in ACPI OpRegion (RVDA)\n"); + vbt->vbt = vbt_data; + vbt->vbt_size = vbt_size; + goto out; + } else { + drm_dbg_kms(&i915->drm, + "Invalid VBT in ACPI OpRegion (RVDA)\n"); + memunmap(opregion->rvda); + opregion->rvda = NULL; + } + } + + vbt_data = base + OPREGION_VBT_OFFSET; + /* + * The VBT specification says that if the ASLE ext mailbox is not used + * its area is reserved, but on some CHT boards the VBT extends into the + * ASLE ext area. Allow this even though it is against the spec, so we + * do not end up rejecting the VBT on those boards (and end up not + * finding the LCD panel because of this). + */ + vbt_size = (opregion->header->mboxes & MBOX_ASLE_EXT) ? + OPREGION_ASLE_EXT_OFFSET : OPREGION_SIZE; + vbt_size -= OPREGION_VBT_OFFSET; + if (intel_bios_is_valid_vbt(vbt_data, vbt_size)) { + drm_dbg_kms(&i915->drm, + "Found valid VBT in ACPI OpRegion (Mailbox #4)\n"); + vbt->vbt = vbt_data; + vbt->vbt_size = vbt_size; + } else { + drm_dbg_kms(&i915->drm, + "Invalid VBT in ACPI OpRegion (Mailbox #4)\n"); + } + +out: + return 0; +} + int intel_opregion_setup(struct drm_i915_private *dev_priv) { struct intel_opregion *opregion = &dev_priv->display.opregion; @@ -886,8 +961,6 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv) char buf[sizeof(OPREGION_SIGNATURE)]; int err = 0; void *base; - const void *vbt_data; - u32 vbt_size; BUILD_BUG_ON(sizeof(struct opregion_header) != 0x100); BUILD_BUG_ON(sizeof(struct opregion_acpi) != 0x100); @@ -968,71 +1041,7 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv) drm_dbg(&dev_priv->drm, "Mailbox #2 for backlight present\n"); } - if (intel_load_vbt_firmware(dev_priv) == 0) - goto out; - - if (dmi_check_system(intel_no_opregion_vbt)) - goto out; - - if (opregion->header->over.major >= 2 && opregion->asle && - opregion->asle->rvda && opregion->asle->rvds) { - resource_size_t rvda = opregion->asle->rvda; - - /* - * opregion 2.0: rvda is the physical VBT address. - * - * opregion 2.1+: rvda is unsigned, relative offset from - * opregion base, and should never point within opregion. - */ - if (opregion->header->over.major > 2 || - opregion->header->over.minor >= 1) { - drm_WARN_ON(&dev_priv->drm, rvda < OPREGION_SIZE); - - rvda += opregion->asls; - } - - opregion->rvda = memremap(rvda, opregion->asle->rvds, - MEMREMAP_WB); - - vbt_data = opregion->rvda; - vbt_size = opregion->asle->rvds; - if (intel_bios_is_valid_vbt(vbt_data, vbt_size)) { - drm_dbg_kms(&dev_priv->drm, - "Found valid VBT in ACPI OpRegion (RVDA)\n"); - vbt->vbt = vbt_data; - vbt->vbt_size = vbt_size; - goto out; - } else { - drm_dbg_kms(&dev_priv->drm, - "Invalid VBT in ACPI OpRegion (RVDA)\n"); - memunmap(opregion->rvda); - opregion->rvda = NULL; - } - } - - vbt_data = base + OPREGION_VBT_OFFSET; - /* - * The VBT specification says that if the ASLE ext mailbox is not used - * its area is reserved, but on some CHT boards the VBT extends into the - * ASLE ext area. Allow this even though it is against the spec, so we - * do not end up rejecting the VBT on those boards (and end up not - * finding the LCD panel because of this). - */ - vbt_size = (mboxes & MBOX_ASLE_EXT) ? - OPREGION_ASLE_EXT_OFFSET : OPREGION_SIZE; - vbt_size -= OPREGION_VBT_OFFSET; - if (intel_bios_is_valid_vbt(vbt_data, vbt_size)) { - drm_dbg_kms(&dev_priv->drm, - "Found valid VBT in ACPI OpRegion (Mailbox #4)\n"); - vbt->vbt = vbt_data; - vbt->vbt_size = vbt_size; - } else { - drm_dbg_kms(&dev_priv->drm, - "Invalid VBT in ACPI OpRegion (Mailbox #4)\n"); - } - -out: - return 0; + return intel_load_opregion_vbt(dev_priv, opregion, vbt); err_out: memunmap(base); From patchwork Mon Jan 8 23:05:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sripada, Radhakrishna" X-Patchwork-Id: 13514137 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1B01FC47077 for ; Mon, 8 Jan 2024 23:07:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7DAA810E33B; Mon, 8 Jan 2024 23:07:03 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8933010E332 for ; Mon, 8 Jan 2024 23:07:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704755222; x=1736291222; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YpyaSVcJasafGxU3ZWnce6FGKzMmIX7ZEjVpt2zsgxw=; b=bdJTGf5bNEE8vl3HML2XiabL1S2OIzo/a9BjPiCT17QSLpdjhRDRk0f8 hGEp9x0pkqNtIW22ltO11bbsFfH0p2jYCt3AyCyyPcUBSCZ3Fo6e+rjBR 49ditZzjXZT6uTC4mpplEIuy18z4vXS4KBVAOSljmOqjTg8bQdCPe3/4d X4uD1JW3kd4JEUdnMYVuLSPAyx2t82svQU8EAqv+36x9rT5LY6bIgLCT8 5VB2z6GUg+r6TbizHzB764cvxWjd0AWCqQIx07hydR2v9HX+uRC+sb8yV 7CfA/zibR81Akc6SDn4eMo1uCCbJnZO2lBZ/j8F4Tjw2dO5yE1Bkn+pV/ A==; X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="11514123" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="11514123" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="774647088" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="774647088" Received: from invictus.jf.intel.com ([10.165.21.201]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:06:59 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Subject: [RFC 05/15] drm/i915: Init vbt fields when read from oprom/spi Date: Mon, 8 Jan 2024 15:05:07 -0800 Message-Id: <20240108230517.1497504-6-radhakrishna.sripada@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> References: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" For some platforms where vbt does not reside in opregion, vbt needs to be cached for debug purposes. Cache them for future usage. Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_bios.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index 0e09454ba79c..0944802ecbd5 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -2994,6 +2994,8 @@ static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915) if (!intel_bios_is_valid_vbt(vbt, vbt_size)) goto err_free_vbt; + i915->display.vbt.vbt = vbt; + i915->display.vbt.vbt_size = vbt_size; drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n"); return (struct vbt_header *)vbt; @@ -3053,6 +3055,8 @@ static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915) pci_unmap_rom(pdev, oprom); + i915->display.vbt.vbt = vbt; + i915->display.vbt.vbt_size = vbt_size; drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n"); return vbt; @@ -3134,8 +3138,6 @@ void intel_bios_init(struct drm_i915_private *i915) /* Further processing on pre-parsed or generated child device data */ parse_sdvo_device_mapping(i915); parse_ddi_ports(i915); - - kfree(oprom_vbt); } static void intel_bios_init_panel(struct drm_i915_private *i915, @@ -3207,6 +3209,9 @@ void intel_bios_driver_remove(struct drm_i915_private *i915) list_del(&entry->node); kfree(entry); } + + /* FIXME: Handle vbt free in opregion case. */ + kfree(vbt->vbt); } void intel_bios_fini_panel(struct intel_panel *panel) From patchwork Mon Jan 8 23:05:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sripada, Radhakrishna" X-Patchwork-Id: 13514139 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 34C9FC3DA6E for ; Mon, 8 Jan 2024 23:07:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 87C4510E33E; Mon, 8 Jan 2024 23:07:04 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9AE6C10E326 for ; Mon, 8 Jan 2024 23:07:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704755222; x=1736291222; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Sw6aFjrA9QVlZp5eiez0PbsrRzgn4xjiy52r0KVGdHg=; b=bOJHxflVjvzOV1xb9P7wdPqEqItAv3uf0cDW2m6CJzKv26a7ZxtppwKc GZOkgAHVxW/t6Oxmwaoi3fqd504NlBL9gooAa5kW4hdQxa7+1yk3eJjpp +ILh9aiwNUxgM6xG9KAhEYaJx4E9WGvJdGB2SfolHzKGJrKbTQyCV2YE6 jIbQ+MWBDAeHs+jIbLgjWw0cgaiKQd95Lvw7Xd9bLN1S0p51v9fIur4Jw /rdaQFHsGdPObU/Y9QHu4vEJaoczfF7onxPsfkQ5vBrZNHIzsNBEKnlh8 eMpKZT29j+jdj5FrFvL7fCGaIUX2zCbliIGcpY0bVUIng5Xl2Alf0bEt4 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="11514124" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="11514124" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="774647091" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="774647091" Received: from invictus.jf.intel.com ([10.165.21.201]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:06:59 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Subject: [RFC 06/15] drm/i915: Classify vbt type based on its residence Date: Mon, 8 Jan 2024 15:05:08 -0800 Message-Id: <20240108230517.1497504-7-radhakrishna.sripada@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> References: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Vbt can be read from different sources viz. firmware, opregion, oprom or spi. This will be useful for us to handle the vbt cleanup during bios remove phase. Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_bios.c | 15 ++++++++++++--- drivers/gpu/drm/i915/display/intel_display_core.h | 8 ++++++++ drivers/gpu/drm/i915/display/intel_opregion.c | 3 +++ 3 files changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index 0944802ecbd5..bd46a14a04f5 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -2996,6 +2996,7 @@ static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915) i915->display.vbt.vbt = vbt; i915->display.vbt.vbt_size = vbt_size; + i915->display.vbt.type = I915_VBT_SPI; drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n"); return (struct vbt_header *)vbt; @@ -3057,6 +3058,7 @@ static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915) i915->display.vbt.vbt = vbt; i915->display.vbt.vbt_size = vbt_size; + i915->display.vbt.type = I915_VBT_OPROM; drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n"); return vbt; @@ -3082,6 +3084,13 @@ void intel_bios_init(struct drm_i915_private *i915) const struct vbt_header *vbt = i915->display.vbt.vbt; struct vbt_header *oprom_vbt = NULL; const struct bdb_header *bdb; + const char * const vbt_type[] = { + [I915_VBT_NONE] = "None", + [I915_VBT_FIRMWARE] = "Firmware", + [I915_VBT_OPREGION] = "Opregion", + [I915_VBT_OPROM] = "Oprom", + [I915_VBT_SPI] = "SPI", + }; INIT_LIST_HEAD(&i915->display.vbt.data.display_devices); INIT_LIST_HEAD(&i915->display.vbt.data.bdb_blocks); @@ -3114,9 +3123,9 @@ void intel_bios_init(struct drm_i915_private *i915) bdb = get_bdb_header(vbt); i915->display.vbt.data.version = bdb->version; - drm_dbg_kms(&i915->drm, - "VBT signature \"%.*s\", BDB version %d\n", - (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.data.version); + drm_dbg_kms(&i915->drm, "%s VBT signature \"%.*s\", BDB version %d\n", + vbt_type[i915->display.vbt.type], (int)sizeof(vbt->signature), + vbt->signature, i915->display.vbt.data.version); init_bdb_blocks(i915, bdb); diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h index 9e134b08aea0..4807edc88f81 100644 --- a/drivers/gpu/drm/i915/display/intel_display_core.h +++ b/drivers/gpu/drm/i915/display/intel_display_core.h @@ -236,6 +236,14 @@ struct intel_vbt { void *vbt_firmware; const void *vbt; u32 vbt_size; + enum { + I915_VBT_NONE = 0, + I915_VBT_FIRMWARE, + I915_VBT_OPREGION, + I915_VBT_OPROM, + I915_VBT_SPI + } type; + struct intel_vbt_data data; }; diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c index cf7312cfd94a..5c4a5ddba01d 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.c +++ b/drivers/gpu/drm/i915/display/intel_opregion.c @@ -862,6 +862,7 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv) "Found valid VBT firmware \"%s\"\n", name); vbt->vbt = vbt->vbt_firmware; vbt->vbt_size = fw->size; + vbt->type = I915_VBT_FIRMWARE; ret = 0; } else { ret = -ENOMEM; @@ -918,6 +919,7 @@ static int intel_load_opregion_vbt(struct drm_i915_private *i915, "Found valid VBT in ACPI OpRegion (RVDA)\n"); vbt->vbt = vbt_data; vbt->vbt_size = vbt_size; + vbt->type = I915_VBT_OPREGION; goto out; } else { drm_dbg_kms(&i915->drm, @@ -943,6 +945,7 @@ static int intel_load_opregion_vbt(struct drm_i915_private *i915, "Found valid VBT in ACPI OpRegion (Mailbox #4)\n"); vbt->vbt = vbt_data; vbt->vbt_size = vbt_size; + vbt->type = I915_VBT_OPREGION; } else { drm_dbg_kms(&i915->drm, "Invalid VBT in ACPI OpRegion (Mailbox #4)\n"); From patchwork Mon Jan 8 23:05:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sripada, Radhakrishna" X-Patchwork-Id: 13514145 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D77BEC4707C for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="11514125" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="11514125" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="774647094" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="774647094" Received: from invictus.jf.intel.com ([10.165.21.201]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:06:59 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Subject: [RFC 07/15] drm/i915: Collate vbt cleanup for different types Date: Mon, 8 Jan 2024 15:05:09 -0800 Message-Id: <20240108230517.1497504-8-radhakrishna.sripada@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> References: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" VBT not read from opregion needs to be freed. Vbt read from opregion is simply remapped and hence need to point to NULL. While at it assign the type to NONE VBT type. Free the vbt in other cases. Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_bios.c | 20 +++++++++++++++++-- drivers/gpu/drm/i915/display/intel_opregion.c | 4 ---- 2 files changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index bd46a14a04f5..ccfc4a4e4c98 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -3219,8 +3219,24 @@ void intel_bios_driver_remove(struct drm_i915_private *i915) kfree(entry); } - /* FIXME: Handle vbt free in opregion case. */ - kfree(vbt->vbt); + switch (vbt->type) { + case I915_VBT_SPI: + case I915_VBT_OPROM: + kfree(vbt->vbt); + vbt->type = I915_VBT_NONE; + break; + case I915_VBT_FIRMWARE: + kfree(vbt->vbt_firmware); + fallthrough; + case I915_VBT_OPREGION: + vbt->vbt = NULL; + vbt->type = I915_VBT_NONE; + break; + case I915_VBT_NONE: + break; + default: + MISSING_CASE(vbt->type); + } } void intel_bios_fini_panel(struct intel_panel *panel) diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c index 5c4a5ddba01d..b879e89d0fb6 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.c +++ b/drivers/gpu/drm/i915/display/intel_opregion.c @@ -1257,7 +1257,6 @@ void intel_opregion_unregister(struct drm_i915_private *i915) void intel_opregion_cleanup(struct drm_i915_private *i915) { struct intel_opregion *opregion = &i915->display.opregion; - struct intel_vbt *vbt = &i915->display.vbt; if (!opregion->header) return; @@ -1268,14 +1267,11 @@ void intel_opregion_cleanup(struct drm_i915_private *i915) memunmap(opregion->rvda); opregion->rvda = NULL; } - kfree(vbt->vbt_firmware); - vbt->vbt_firmware = NULL; opregion->header = NULL; opregion->acpi = NULL; opregion->swsci = NULL; opregion->asle = NULL; opregion->asle_ext = NULL; opregion->asls = 0; - vbt->vbt = NULL; opregion->lid_state = NULL; } From patchwork Mon Jan 8 23:05:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sripada, Radhakrishna" X-Patchwork-Id: 13514131 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C41A7C4707B for ; Mon, 8 Jan 2024 23:07:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F062810E332; Mon, 8 Jan 2024 23:07:02 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id BCCEC10E332 for ; Mon, 8 Jan 2024 23:07:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704755222; x=1736291222; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YVh3D/7n4Z+AFfe5d+eF/QiRdMGZBnm3Uou8YA9mWZA=; b=UGiIzgtRd+7eNGhfKep4wt17SHnwZWSsLZCH4/E5sDXrRJ51VmX5zaT9 +sD7esu6vWL6LqBHFk526alROCmeWc9kkGE/VtpiaqOJUTZ9JSgZQpxEg LHy+3AIMzkabwp8R2GV1yC69RetCT/sHoTS0qD664q6rp0y1D1EXRwfyG Z4LIAWk8jhxIX9s8ACB8cuIkoyJHa/PD9L61wAn6qLUy3dWsiHJvGxa1m qQbG8qpZATH6ve6hczyru5r/H6dgHXKqQlUSJYN7MKoUD64MFq/GnpxNe RHKbBlXU9fGXJ8k/M4wm0W601OLe3WXs/G5Bxit88r3ByAs6ufp2R+SCT w==; X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="11514126" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="11514126" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="774647098" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="774647098" Received: from invictus.jf.intel.com ([10.165.21.201]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:00 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Subject: [RFC 08/15] drm/i915: Make intel_bios_init operate on intel_vbt Date: Mon, 8 Jan 2024 15:05:10 -0800 Message-Id: <20240108230517.1497504-9-radhakrishna.sripada@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> References: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" intel_bios_init previously operated on vbt_header. Make use of the newly introduced intel_vbt to be later streamline different vbt reading methods. Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_bios.c | 28 ++++++++++++----------- 1 file changed, 15 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index ccfc4a4e4c98..bde58a1ceadb 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -3081,8 +3081,9 @@ static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915) */ void intel_bios_init(struct drm_i915_private *i915) { - const struct vbt_header *vbt = i915->display.vbt.vbt; + struct intel_vbt *vbt = &i915->display.vbt; struct vbt_header *oprom_vbt = NULL; + struct vbt_header *header = NULL; const struct bdb_header *bdb; const char * const vbt_type[] = { [I915_VBT_NONE] = "None", @@ -3092,8 +3093,8 @@ void intel_bios_init(struct drm_i915_private *i915) [I915_VBT_SPI] = "SPI", }; - INIT_LIST_HEAD(&i915->display.vbt.data.display_devices); - INIT_LIST_HEAD(&i915->display.vbt.data.bdb_blocks); + INIT_LIST_HEAD(&vbt->data.display_devices); + INIT_LIST_HEAD(&vbt->data.bdb_blocks); if (!HAS_DISPLAY(i915)) { drm_dbg_kms(&i915->drm, @@ -3107,25 +3108,26 @@ void intel_bios_init(struct drm_i915_private *i915) * If the OpRegion does not have VBT, look in SPI flash through MMIO or * PCI mapping */ - if (!vbt && IS_DGFX(i915)) { + if (!vbt->vbt && IS_DGFX(i915)) { oprom_vbt = spi_oprom_get_vbt(i915); - vbt = oprom_vbt; + vbt->vbt = oprom_vbt; } - if (!vbt) { + if (!vbt->vbt) { oprom_vbt = oprom_get_vbt(i915); - vbt = oprom_vbt; + vbt->vbt = oprom_vbt; } - if (!vbt) + if (!vbt->vbt) goto out; - bdb = get_bdb_header(vbt); - i915->display.vbt.data.version = bdb->version; + header = (struct vbt_header *)vbt->vbt; + bdb = get_bdb_header(header); + vbt->data.version = bdb->version; drm_dbg_kms(&i915->drm, "%s VBT signature \"%.*s\", BDB version %d\n", - vbt_type[i915->display.vbt.type], (int)sizeof(vbt->signature), - vbt->signature, i915->display.vbt.data.version); + vbt_type[vbt->type], (int)sizeof(header->signature), + header->signature, vbt->data.version); init_bdb_blocks(i915, bdb); @@ -3138,7 +3140,7 @@ void intel_bios_init(struct drm_i915_private *i915) parse_compression_parameters(i915); out: - if (!vbt) { + if (!vbt->vbt) { drm_info(&i915->drm, "Failed to find VBIOS tables (VBT)\n"); init_vbt_missing_defaults(i915); From patchwork Mon Jan 8 23:05:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sripada, Radhakrishna" X-Patchwork-Id: 13514140 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8BF2BC47258 for ; Mon, 8 Jan 2024 23:07:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 01EC410E33D; Mon, 8 Jan 2024 23:07:04 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id DB4E810E335 for ; Mon, 8 Jan 2024 23:07:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704755222; x=1736291222; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2wvkHG290jK/MvWeNh01aW0ou74azwyXwrdykMO+k6A=; b=LES2/Mvyc23uJCNW9ZsOhrciXLFdt3woQk5tUwJj/9uKZpq37L2GCdzj NUrL+naCnkyToTvbEdFnmkrZEnGSL/CfZdC5Ec9+5P0a3IhGKoa+e7W1n 06k33+8pd1+6Jc75XSZs3M7cGY8WLHdoTlO8C24hCq8pwYV8SePY3CQHe 9u9Qc+4mKVo10JLyDfB4HDkCrXj36iU6R4JcARjciwJUx3l7sfWrmuBR7 x6mpQSh2F2guIh+PSkzoMxqhFcOlf9OzENDCdAIXXS61/DC41UBME/HAh a6zUoemgh42Cix4WJX+vAfX/TP2x9IzkOTDUBtjXMwM09zum19IruBHdr Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="11514127" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="11514127" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="774647101" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="774647101" Received: from invictus.jf.intel.com ([10.165.21.201]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:00 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Subject: [RFC 09/15] drm/i915: Move vbt load from opregion to bios init Date: Mon, 8 Jan 2024 15:05:11 -0800 Message-Id: <20240108230517.1497504-10-radhakrishna.sripada@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> References: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Opregion is probed early during the driver bring up and if present, vbt is extracted. Move vbt loading to a more appropriate place during bios init where the vbt is parsed. While at it remove the empty return. Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_bios.c | 4 ++++ drivers/gpu/drm/i915/display/intel_opregion.c | 18 +++++++----------- drivers/gpu/drm/i915/display/intel_opregion.h | 9 +++++++++ 3 files changed, 20 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index bde58a1ceadb..5d2a56df029d 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -34,6 +34,7 @@ #include "intel_display.h" #include "intel_display_types.h" #include "intel_gmbus.h" +#include "intel_opregion.h" #define _INTEL_BIOS_PRIVATE #include "intel_vbt_defs.h" @@ -3082,6 +3083,7 @@ static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915) void intel_bios_init(struct drm_i915_private *i915) { struct intel_vbt *vbt = &i915->display.vbt; + struct intel_opregion *opregion = &i915->display.opregion; struct vbt_header *oprom_vbt = NULL; struct vbt_header *header = NULL; const struct bdb_header *bdb; @@ -3104,6 +3106,8 @@ void intel_bios_init(struct drm_i915_private *i915) init_vbt_defaults(i915); + if (opregion->asls) + intel_load_opregion_vbt(i915, opregion, vbt); /* * If the OpRegion does not have VBT, look in SPI flash through MMIO or * PCI mapping diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c index b879e89d0fb6..5ff6466548a3 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.c +++ b/drivers/gpu/drm/i915/display/intel_opregion.c @@ -878,19 +878,19 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv) return ret; } -static int intel_load_opregion_vbt(struct drm_i915_private *i915, - struct intel_opregion *opregion, - struct intel_vbt *vbt) +void intel_load_opregion_vbt(struct drm_i915_private *i915, + struct intel_opregion *opregion, + struct intel_vbt *vbt) { const void *vbt_data; u32 vbt_size; void *base = opregion->header; if (intel_load_vbt_firmware(i915) == 0) - goto out; + return; if (dmi_check_system(intel_no_opregion_vbt)) - goto out; + return; if (opregion->header->over.major >= 2 && opregion->asle && opregion->asle->rvda && opregion->asle->rvds) { @@ -920,7 +920,7 @@ static int intel_load_opregion_vbt(struct drm_i915_private *i915, vbt->vbt = vbt_data; vbt->vbt_size = vbt_size; vbt->type = I915_VBT_OPREGION; - goto out; + return; } else { drm_dbg_kms(&i915->drm, "Invalid VBT in ACPI OpRegion (RVDA)\n"); @@ -950,15 +950,11 @@ static int intel_load_opregion_vbt(struct drm_i915_private *i915, drm_dbg_kms(&i915->drm, "Invalid VBT in ACPI OpRegion (Mailbox #4)\n"); } - -out: - return 0; } int intel_opregion_setup(struct drm_i915_private *dev_priv) { struct intel_opregion *opregion = &dev_priv->display.opregion; - struct intel_vbt *vbt = &dev_priv->display.vbt; struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); u32 asls, mboxes; char buf[sizeof(OPREGION_SIGNATURE)]; @@ -1044,7 +1040,7 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv) drm_dbg(&dev_priv->drm, "Mailbox #2 for backlight present\n"); } - return intel_load_opregion_vbt(dev_priv, opregion, vbt); + return 0; err_out: memunmap(base); diff --git a/drivers/gpu/drm/i915/display/intel_opregion.h b/drivers/gpu/drm/i915/display/intel_opregion.h index 03838fa39d0d..5a46a4b1805a 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.h +++ b/drivers/gpu/drm/i915/display/intel_opregion.h @@ -31,6 +31,7 @@ struct drm_i915_private; struct intel_connector; struct intel_encoder; +struct intel_vbt; struct opregion_header; struct opregion_acpi; @@ -77,6 +78,9 @@ const struct drm_edid *intel_opregion_get_edid(struct intel_connector *connector bool intel_opregion_headless_sku(struct drm_i915_private *i915); +void intel_load_opregion_vbt(struct drm_i915_private *i915, + struct intel_opregion *opregion, + struct intel_vbt *vbt); #else /* CONFIG_ACPI*/ static inline int intel_opregion_setup(struct drm_i915_private *dev_priv) @@ -137,6 +141,11 @@ static inline bool intel_opregion_headless_sku(struct drm_i915_private *i915) return false; } +static inline void intel_load_opregion_vbt(struct drm_i915_private *i915, + struct intel_opregion *opregion, + struct intel_vbt *vbt) +{ +} #endif /* CONFIG_ACPI */ #endif From patchwork Mon Jan 8 23:05:12 2024 Content-Type: text/plain; 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08 Jan 2024 15:07:00 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Subject: [RFC 10/15] drm/i915: Move vbt firmware load into intel_bios_init Date: Mon, 8 Jan 2024 15:05:12 -0800 Message-Id: <20240108230517.1497504-11-radhakrishna.sripada@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> References: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Grouping various vbt load options, move vbt load from firmware option from opregion vbt load function to bios init. Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_bios.c | 47 ++++++++++++++++++- drivers/gpu/drm/i915/display/intel_opregion.c | 45 ------------------ 2 files changed, 46 insertions(+), 46 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index 5d2a56df029d..711ae963ed7a 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -25,6 +25,8 @@ * */ +#include + #include #include #include @@ -2947,6 +2949,47 @@ bool intel_bios_is_valid_vbt(const void *buf, size_t size) return vbt; } +static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv) +{ + struct intel_vbt *vbt = &dev_priv->display.vbt; + const struct firmware *fw = NULL; + const char *name = dev_priv->display.params.vbt_firmware; + int ret; + + if (!name || !*name) + return -ENOENT; + + ret = request_firmware(&fw, name, dev_priv->drm.dev); + if (ret) { + drm_err(&dev_priv->drm, + "Requesting VBT firmware \"%s\" failed (%d)\n", + name, ret); + return ret; + } + + if (intel_bios_is_valid_vbt(fw->data, fw->size)) { + vbt->vbt_firmware = kmemdup(fw->data, fw->size, GFP_KERNEL); + if (vbt->vbt_firmware) { + drm_dbg_kms(&dev_priv->drm, + "Found valid VBT firmware \"%s\"\n", name); + vbt->vbt = vbt->vbt_firmware; + vbt->vbt_size = fw->size; + vbt->type = I915_VBT_FIRMWARE; + ret = 0; + } else { + ret = -ENOMEM; + } + } else { + drm_dbg_kms(&dev_priv->drm, "Invalid VBT firmware \"%s\"\n", + name); + ret = -EINVAL; + } + + release_firmware(fw); + + return ret; +} + static u32 intel_spi_read(struct intel_uncore *uncore, u32 offset) { intel_uncore_write(uncore, PRIMARY_SPI_ADDRESS, offset); @@ -3106,7 +3149,9 @@ void intel_bios_init(struct drm_i915_private *i915) init_vbt_defaults(i915); - if (opregion->asls) + intel_load_vbt_firmware(i915); + + if (!vbt->vbt && opregion->asls) intel_load_opregion_vbt(i915, opregion, vbt); /* * If the OpRegion does not have VBT, look in SPI flash through MMIO or diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c index 5ff6466548a3..32875f0e89bd 100644 --- a/drivers/gpu/drm/i915/display/intel_opregion.c +++ b/drivers/gpu/drm/i915/display/intel_opregion.c @@ -27,7 +27,6 @@ #include #include -#include #include #include @@ -837,47 +836,6 @@ static const struct dmi_system_id intel_no_opregion_vbt[] = { { } }; -static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv) -{ - struct intel_vbt *vbt = &dev_priv->display.vbt; - const struct firmware *fw = NULL; - const char *name = dev_priv->display.params.vbt_firmware; - int ret; - - if (!name || !*name) - return -ENOENT; - - ret = request_firmware(&fw, name, dev_priv->drm.dev); - if (ret) { - drm_err(&dev_priv->drm, - "Requesting VBT firmware \"%s\" failed (%d)\n", - name, ret); - return ret; - } - - if (intel_bios_is_valid_vbt(fw->data, fw->size)) { - vbt->vbt_firmware = kmemdup(fw->data, fw->size, GFP_KERNEL); - if (vbt->vbt_firmware) { - drm_dbg_kms(&dev_priv->drm, - "Found valid VBT firmware \"%s\"\n", name); - vbt->vbt = vbt->vbt_firmware; - vbt->vbt_size = fw->size; - vbt->type = I915_VBT_FIRMWARE; - ret = 0; - } else { - ret = -ENOMEM; - } - } else { - drm_dbg_kms(&dev_priv->drm, "Invalid VBT firmware \"%s\"\n", - name); - ret = -EINVAL; - } - - release_firmware(fw); - - return ret; -} - void intel_load_opregion_vbt(struct drm_i915_private *i915, struct intel_opregion *opregion, struct intel_vbt *vbt) @@ -886,9 +844,6 @@ void intel_load_opregion_vbt(struct drm_i915_private *i915, u32 vbt_size; void *base = opregion->header; - if (intel_load_vbt_firmware(i915) == 0) - return; - if (dmi_check_system(intel_no_opregion_vbt)) return; From patchwork Mon Jan 8 23:05:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sripada, Radhakrishna" X-Patchwork-Id: 13514135 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 811BFC4707B for ; Mon, 8 Jan 2024 23:07:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5E70110E339; Mon, 8 Jan 2024 23:07:03 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 089F710E2CB for ; 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Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_bios.c | 32 +++++++++++------------ 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index 711ae963ed7a..31183ac36c57 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -3051,17 +3051,18 @@ static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915) return NULL; } -static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915) +static void oprom_get_vbt(struct drm_i915_private *i915, + struct intel_vbt *vbt) { struct pci_dev *pdev = to_pci_dev(i915->drm.dev); void __iomem *p = NULL, *oprom; - struct vbt_header *vbt; + struct vbt_header *header; u16 vbt_size; size_t i, size; oprom = pci_map_rom(pdev, &size); if (!oprom) - return NULL; + return; /* Scour memory looking for the VBT signature. */ for (i = 0; i + 4 < size; i += 4) { @@ -3089,30 +3090,31 @@ static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915) } /* The rest will be validated by intel_bios_is_valid_vbt() */ - vbt = kmalloc(vbt_size, GFP_KERNEL); - if (!vbt) + header = kmalloc(vbt_size, GFP_KERNEL); + if (!header) goto err_unmap_oprom; - memcpy_fromio(vbt, p, vbt_size); + memcpy_fromio(header, p, vbt_size); - if (!intel_bios_is_valid_vbt(vbt, vbt_size)) + if (!intel_bios_is_valid_vbt(header, vbt_size)) goto err_free_vbt; pci_unmap_rom(pdev, oprom); - i915->display.vbt.vbt = vbt; - i915->display.vbt.vbt_size = vbt_size; - i915->display.vbt.type = I915_VBT_OPROM; + vbt->vbt = header; + vbt->vbt_size = vbt_size; + vbt->type = I915_VBT_OPROM; drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n"); - return vbt; + return; err_free_vbt: kfree(vbt); err_unmap_oprom: pci_unmap_rom(pdev, oprom); + vbt->vbt = NULL; - return NULL; + return; } /** @@ -3162,10 +3164,8 @@ void intel_bios_init(struct drm_i915_private *i915) vbt->vbt = oprom_vbt; } - if (!vbt->vbt) { - oprom_vbt = oprom_get_vbt(i915); - vbt->vbt = oprom_vbt; - } + if (!vbt->vbt) + oprom_get_vbt(i915, vbt); if (!vbt->vbt) goto out; From patchwork Mon Jan 8 23:05:14 2024 Content-Type: text/plain; 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08 Jan 2024 15:07:00 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Subject: [RFC 12/15] drm/i915: Make spi_oprom_get_vbt operate on intel_vbt Date: Mon, 8 Jan 2024 15:05:14 -0800 Message-Id: <20240108230517.1497504-13-radhakrishna.sripada@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> References: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" intel_vbt newly introduced, should be used to cache in the vbt read from spi. Pass intel_vbt to spi read variant to cache intel_vbt for future reference. Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_bios.c | 32 +++++++++++------------ 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index 31183ac36c57..5a06879d6825 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -2997,13 +2997,14 @@ static u32 intel_spi_read(struct intel_uncore *uncore, u32 offset) return intel_uncore_read(uncore, PRIMARY_SPI_TRIGGER); } -static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915) +static void spi_oprom_get_vbt(struct drm_i915_private *i915, + struct intel_vbt *vbt) { u32 count, data, found, store = 0; u32 static_region, oprom_offset; u32 oprom_size = 0x200000; u16 vbt_size; - u32 *vbt; + u32 *header; static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS); static_region &= OPTIONROM_SPI_REGIONID_MASK; @@ -3028,27 +3029,29 @@ static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915) found + offsetof(struct vbt_header, vbt_size)); vbt_size &= 0xffff; - vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL); - if (!vbt) + header = kzalloc(round_up(vbt_size, 4), GFP_KERNEL); + if (!header) goto err_not_found; for (count = 0; count < vbt_size; count += 4) - *(vbt + store++) = intel_spi_read(&i915->uncore, found + count); + *(header + store++) = intel_spi_read(&i915->uncore, found + count); - if (!intel_bios_is_valid_vbt(vbt, vbt_size)) + if (!intel_bios_is_valid_vbt(header, vbt_size)) goto err_free_vbt; - i915->display.vbt.vbt = vbt; - i915->display.vbt.vbt_size = vbt_size; - i915->display.vbt.type = I915_VBT_SPI; + vbt->vbt = header; + vbt->vbt_size = vbt_size; + vbt->type = I915_VBT_SPI; drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n"); - return (struct vbt_header *)vbt; + return; err_free_vbt: kfree(vbt); err_not_found: - return NULL; + vbt->vbt = NULL; + + return; } static void oprom_get_vbt(struct drm_i915_private *i915, @@ -3129,7 +3132,6 @@ void intel_bios_init(struct drm_i915_private *i915) { struct intel_vbt *vbt = &i915->display.vbt; struct intel_opregion *opregion = &i915->display.opregion; - struct vbt_header *oprom_vbt = NULL; struct vbt_header *header = NULL; const struct bdb_header *bdb; const char * const vbt_type[] = { @@ -3159,10 +3161,8 @@ void intel_bios_init(struct drm_i915_private *i915) * If the OpRegion does not have VBT, look in SPI flash through MMIO or * PCI mapping */ - if (!vbt->vbt && IS_DGFX(i915)) { - oprom_vbt = spi_oprom_get_vbt(i915); - vbt->vbt = oprom_vbt; - } + if (!vbt->vbt && IS_DGFX(i915)) + spi_oprom_get_vbt(i915, vbt); if (!vbt->vbt) oprom_get_vbt(i915, vbt); From patchwork Mon Jan 8 23:05:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sripada, Radhakrishna" X-Patchwork-Id: 13514138 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D84A7C47422 for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="11514131" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="11514131" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="774647112" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="774647112" Received: from invictus.jf.intel.com ([10.165.21.201]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:00 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Subject: [RFC 13/15] drm/i915: Make intel_load_vbt_firmware operate on intel_vbt Date: Mon, 8 Jan 2024 15:05:15 -0800 Message-Id: <20240108230517.1497504-14-radhakrishna.sripada@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> References: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" intel_vbt will be used to cache the vbt read from firmware. Make vbt firmware read variant operate on intel_vbt to cache the fw for future reference. Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_bios.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index 5a06879d6825..1b5cc3416d77 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -2949,9 +2949,9 @@ bool intel_bios_is_valid_vbt(const void *buf, size_t size) return vbt; } -static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv) +static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv, + struct intel_vbt *vbt) { - struct intel_vbt *vbt = &dev_priv->display.vbt; const struct firmware *fw = NULL; const char *name = dev_priv->display.params.vbt_firmware; int ret; @@ -3153,7 +3153,7 @@ void intel_bios_init(struct drm_i915_private *i915) init_vbt_defaults(i915); - intel_load_vbt_firmware(i915); + intel_load_vbt_firmware(i915, vbt); if (!vbt->vbt && opregion->asls) intel_load_opregion_vbt(i915, opregion, vbt); From patchwork Mon Jan 8 23:05:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sripada, Radhakrishna" X-Patchwork-Id: 13514142 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A43A3C4707B for ; Mon, 8 Jan 2024 23:07:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 03FCC10E341; Mon, 8 Jan 2024 23:07:05 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3580D10E335 for ; Mon, 8 Jan 2024 23:07:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704755222; x=1736291222; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=c7+s0godtRrNIZmPeIb1tUPNPqQElZ2p5Wwipux6CnM=; b=RFdM6ukCJxA38FclwKvm00UwhuCym2sekovQeIG6HM+kCM9Bc5w/5rSS cPqbfW3JBxUnTKLneDtYGWA7c6l8Y6DQR8XQbXls+JOInjULgG2XkbW6T ENW22gclKDBMsgLbfV0cbKZiKs+CWFEWGMkawdvy03mozaIJPykqM947D rbLI3l+nUkyjhL94j8/H1cjbYTmZAVl0I5ywlHDUXuVG8kukMPAnbjGpq W47o6lDnjN/qBfvEg3I6jJro8/WjeXqMgJ18xD3q0VZ3WLcuwjjEli4Xa dzgMvKaMqnFSHTm+MbksF+bKcrfTFXYlV128eifzIfrB1vTYehS7C2npU g==; X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="11514132" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="11514132" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="774647115" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="774647115" Received: from invictus.jf.intel.com ([10.165.21.201]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:00 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Subject: [RFC 14/15] drm/i915: Kill reduntant vbt_firmware from intel_vbt Date: Mon, 8 Jan 2024 15:05:16 -0800 Message-Id: <20240108230517.1497504-15-radhakrishna.sripada@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> References: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" vbt_firmware was used to cache the vbt read from firmware. With introduction of intel_vbt, vbt field is used to cache the firmware read from different sources making vbt_firmware field redundant. Kill this field to simplify intel_vbt structure. Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_bios.c | 9 +++------ drivers/gpu/drm/i915/display/intel_display_core.h | 1 - 2 files changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index 1b5cc3416d77..135a2d5d50b8 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -2968,11 +2968,10 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv, } if (intel_bios_is_valid_vbt(fw->data, fw->size)) { - vbt->vbt_firmware = kmemdup(fw->data, fw->size, GFP_KERNEL); - if (vbt->vbt_firmware) { + vbt->vbt = kmemdup(fw->data, fw->size, GFP_KERNEL); + if (vbt->vbt) { drm_dbg_kms(&dev_priv->drm, "Found valid VBT firmware \"%s\"\n", name); - vbt->vbt = vbt->vbt_firmware; vbt->vbt_size = fw->size; vbt->type = I915_VBT_FIRMWARE; ret = 0; @@ -3273,12 +3272,10 @@ void intel_bios_driver_remove(struct drm_i915_private *i915) switch (vbt->type) { case I915_VBT_SPI: case I915_VBT_OPROM: + case I915_VBT_FIRMWARE: kfree(vbt->vbt); vbt->type = I915_VBT_NONE; break; - case I915_VBT_FIRMWARE: - kfree(vbt->vbt_firmware); - fallthrough; case I915_VBT_OPREGION: vbt->vbt = NULL; vbt->type = I915_VBT_NONE; diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h index 4807edc88f81..cdc6e30ba6a6 100644 --- a/drivers/gpu/drm/i915/display/intel_display_core.h +++ b/drivers/gpu/drm/i915/display/intel_display_core.h @@ -233,7 +233,6 @@ struct intel_vbt_data { }; struct intel_vbt { - void *vbt_firmware; const void *vbt; u32 vbt_size; enum { From patchwork Mon Jan 8 23:05:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sripada, Radhakrishna" X-Patchwork-Id: 13514134 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4EF44C4725D for ; Mon, 8 Jan 2024 23:07:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6D14A10E33A; Mon, 8 Jan 2024 23:07:03 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4887E10E33A for ; Mon, 8 Jan 2024 23:07:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704755222; x=1736291222; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=B7v0TjVcPwi5JuREYhIZD9/Hvi+6b30DBMIBHaWGh2g=; b=gc9Q40czZIcm7fxvdelln3Zn3dzI5dbqMaDAPullg0dd0cULcVbUbyW9 6Gv9SxH2boL8pN00DeZryB/0/Ycp/RX70CeC4dDzp0U9XmHw45QpfPDd7 nkh/FosH6EY8bZPurYsd1NeZ32NY/PMx3PgDlU3S9htCItWK4JeQlbJe3 8D3VNi7AXsdlwA3+ICgTpktaHQ+uMyTLijfSlx6DgYe84leqF6IB89jEL UuedvAkUI6pchiZ59C6ny7r/e3R4HyGJBx8/KNnxqRM4GNIGEqZ27Uh/o ELizBfyUYc2jiRwg3g3mEm6wSaHXb5FxOdnM7CIJ2P7y//+4Xar2KhoHz Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="11514133" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="11514133" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="774647118" X-IronPort-AV: E=Sophos;i="6.04,181,1695711600"; d="scan'208";a="774647118" Received: from invictus.jf.intel.com ([10.165.21.201]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2024 15:07:00 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Subject: [RFC 15/15] drm/i915: Use vbt type to determine its validity Date: Mon, 8 Jan 2024 15:05:17 -0800 Message-Id: <20240108230517.1497504-16-radhakrishna.sripada@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> References: <20240108230517.1497504-1-radhakrishna.sripada@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We depend on a non null vbt field in intel_vbt to determine if a vbt is read from its source. This may not be foolproof hence rely on vbt->type to determine if vbt is read from a source. Note that this does not determine the validity of read vbt. Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_bios.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index 135a2d5d50b8..0938c9ec8fbe 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -3119,6 +3119,11 @@ static void oprom_get_vbt(struct drm_i915_private *i915, return; } +static inline bool is_empty_vbt(struct intel_vbt *vbt) +{ + return vbt && vbt->type == I915_VBT_NONE; +} + /** * intel_bios_init - find VBT and initialize settings from the BIOS * @i915: i915 device instance @@ -3154,19 +3159,19 @@ void intel_bios_init(struct drm_i915_private *i915) intel_load_vbt_firmware(i915, vbt); - if (!vbt->vbt && opregion->asls) + if (is_empty_vbt(vbt) && opregion->asls) intel_load_opregion_vbt(i915, opregion, vbt); /* * If the OpRegion does not have VBT, look in SPI flash through MMIO or * PCI mapping */ - if (!vbt->vbt && IS_DGFX(i915)) + if (is_empty_vbt(vbt) && IS_DGFX(i915)) spi_oprom_get_vbt(i915, vbt); - if (!vbt->vbt) + if (is_empty_vbt(vbt)) oprom_get_vbt(i915, vbt); - if (!vbt->vbt) + if (is_empty_vbt(vbt)) goto out; header = (struct vbt_header *)vbt->vbt;