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Wed, 10 Jan 2024 21:28:17 -0800 From: Vidya Sagar To: , , , , CC: , , , , , , , , Subject: [PATCH V3] PCI/MSI: Fix MSI hwirq truncation Date: Thu, 11 Jan 2024 10:58:14 +0530 Message-ID: <20240111052814.713016-1-vidyas@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240108120522.1368240-1-vidyas@nvidia.com> References: <20240108120522.1368240-1-vidyas@nvidia.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00026368:EE_|IA1PR12MB7493:EE_ X-MS-Office365-Filtering-Correlation-Id: 34f80660-673f-4428-4bda-08dc1266248b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: PLSH3Ay39/dXf2qAWRNwE+zExJRA7hOUfZr2c9H2sn/bMSoas9a8w+nu9SMblOTxlsX0QTnmAWafUDSZTdenbcJgEPcLg2cVG0psgsmW2riR7j0g43QUbzPZU/Gvx3tgowx+9JflJWy866tKkkXh2FgAzhCTZx/AKqfCOfTDK2lWInkGdiIHdoLvHGhyVN7A/h09iYkVuP0cfZCGI1xPUD1mZuMUNX+rjaOa1UGYkvQxKCU/ZVK7jmF6k4ATa/rHXyj64ikiPAIce8m20U98ihgdHHX+uMv/yqGxlMh6lpXwCB5TTZyUD4A10luLLpJtxlH1UhnKGkJ0VxoiDrHpX0nI7p/Fpu+DChcvg+qShKZbDhBgQiJSFTqMesywBlZW8z1CPzVuwrgGXNt7KtNummeO5SdwWSTvA9Po0jyzZVZTxkP5VIpHEWQyIJR6SFvKKV+pZHufG3/3L7uzHPkY+xNyfDdjSw85NQJ8/c12Tnjsadp8mGt5EcwX8/ppjzdLENi8lViIRf0uW18V7bDqJN2UrF3ANPFlFyqNukgNpGc88Z3c/LwoQqhQ+lsetbvY+ALiu/bTFGxhzSGTuIZnkbik8bjifGxpDNIRxzJrpaUCHJU6eVdRGHanc7gN/6F3iwjuZ6NjHTf7UnKRz9975W13zUF88mYbyBS6g37NiQ57EKLKAorzAzHdR7l+hDJQHin2whP0b8X7SzhBOp4C8uJDLOxKcCRQJUmnxdzEBLEzBST/rR+GoYZazcNYNiis X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(396003)(136003)(39860400002)(376002)(346002)(230922051799003)(451199024)(1800799012)(186009)(82310400011)(64100799003)(36840700001)(46966006)(40470700004)(2906002)(82740400003)(5660300002)(86362001)(41300700001)(356005)(7636003)(36756003)(54906003)(316002)(110136005)(336012)(36860700001)(426003)(8676002)(47076005)(8936002)(70206006)(70586007)(40480700001)(26005)(478600001)(1076003)(40460700003)(83380400001)(7696005)(6666004)(2616005)(4326008);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Jan 2024 05:28:28.7590 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 34f80660-673f-4428-4bda-08dc1266248b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00026368.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7493 While calculating the hwirq number for an MSI interrupt, the higher bits (i.e. from bit-5 onwards a.k.a domain_nr >= 32) of the PCI domain number gets truncated because of the shifted value casting to return type of pci_domain_nr() which is 'int'. This for example is resulting in same hwirq number for devices 0019:00:00.0 and 0039:00:00.0. So, cast the PCI domain number to 'irq_hw_number_t' before left shifting it to calculate hwirq number. Fixes: 3878eaefb89a ("PCI/MSI: Enhance core to support hierarchy irqdomain") Tested-By: Shanker Donthineni Signed-off-by: Vidya Sagar --- V3: * Addressed review comments from Thomas Gleixner * Added Tested-By: Shanker Donthineni V2: * Added Fixes tag drivers/pci/msi/irqdomain.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/msi/irqdomain.c b/drivers/pci/msi/irqdomain.c index c8be056c248d..cfd84a899c82 100644 --- a/drivers/pci/msi/irqdomain.c +++ b/drivers/pci/msi/irqdomain.c @@ -61,7 +61,7 @@ static irq_hw_number_t pci_msi_domain_calc_hwirq(struct msi_desc *desc) return (irq_hw_number_t)desc->msi_index | pci_dev_id(dev) << 11 | - (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27; + ((irq_hw_number_t)(pci_domain_nr(dev->bus) & 0xFFFFFFFF)) << 27; } static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,