From patchwork Mon Jan 22 13:43:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13525493 X-Patchwork-Delegate: geert@linux-m68k.org Received: from laurent.telenet-ops.be (laurent.telenet-ops.be [195.130.137.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 738293CF7C for ; Mon, 22 Jan 2024 13:43:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.130.137.89 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705931030; cv=none; b=rlkjOFnNdiI37eI/7W0tCQCc13ApDimLNPzdX6GhBXXKEA8NkgO40XzdUYQubmk3W0S1Diq8lgkYNuFWYO2UtIEh+3vSmmjLRH7655epnQnZhjC9MuVvQyKC4AOG+RmlCBBMIPUmmuuVDrug7mYz/1Fw/i2aWguSVWwUx7ePN9E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705931030; c=relaxed/simple; bh=qZCpKYRn/rMmDIaM/pktkAZ1VLB0JuYM+7dXHmKtgpw=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=XKjEk4d/Y28eGkhhOyDq88lBGM5g2dGihqF07PavWNrNqbiHuhQeXcnXclql1qjF4cKmYh9P2cUPyebsREtl2vqYnTcY28tAs5/bKIRKHzydbfAP+C7+xRaPRAhuauAn91p/IqBN2aqNnXmlQjZWD6G27rZ8+PaSThZniE//3Yo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be; spf=none smtp.mailfrom=linux-m68k.org; arc=none smtp.client-ip=195.130.137.89 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed40:955e:bba5:7ff4:cfb6]) by laurent.telenet-ops.be with bizsmtp id dpjg2B0050ZxL6o01pjgNo; Mon, 22 Jan 2024 14:43:40 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1rRuZf-00GGv6-2y; Mon, 22 Jan 2024 14:43:40 +0100 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1rRuaS-00CDsf-2i; Mon, 22 Jan 2024 14:43:40 +0100 From: Geert Uytterhoeven To: Linus Walleij Cc: linux-gpio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH] pinctrl: renesas: checker: Limit cfg reg enum checks to provided IDs Date: Mon, 22 Jan 2024 14:43:38 +0100 Message-Id: X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 If the number of provided enum IDs in a variable width config register description does not match the expected number, the checker uses the expected number for validating the individual enum IDs. However, this may cause out-of-bounds accesses on the array holding the enum IDs, leading to bogus enum_id conflict warnings. Worse, if the bug is an incorrect bit field description (e.g. accidentally using "12" instead of "-12" for a reserved field), thousands of warnings may be printed, overflowing the kernel log buffer. Fix this by limiting the enum ID check to the number of provided enum IDs. Signed-off-by: Geert Uytterhoeven --- To be queued in renesas-pinctrl for v6.9. drivers/pinctrl/renesas/core.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c index 93e51abbf519aa8e..8f6d7cc25b599149 100644 --- a/drivers/pinctrl/renesas/core.c +++ b/drivers/pinctrl/renesas/core.c @@ -907,9 +907,11 @@ static void __init sh_pfc_check_cfg_reg(const char *drvname, sh_pfc_err("reg 0x%x: var_field_width declares %u instead of %u bits\n", cfg_reg->reg, rw, cfg_reg->reg_width); - if (n != cfg_reg->nr_enum_ids) + if (n != cfg_reg->nr_enum_ids) { sh_pfc_err("reg 0x%x: enum_ids[] has %u instead of %u values\n", cfg_reg->reg, cfg_reg->nr_enum_ids, n); + n = cfg_reg->nr_enum_ids; + } check_enum_ids: sh_pfc_check_reg_enums(drvname, cfg_reg->reg, cfg_reg->enum_ids, n);