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Fixes: b3a9037550df ("x86: annotate entry points with type and size") Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monné CC: Wei Liu CC: Konrad Rzeszutek Wilk CC: Ross Lagerwall --- xen/arch/x86/x86_64/entry.S | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index 482c91d4f533..c3f6b667a72a 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -1023,7 +1023,9 @@ FUNC(entry_NMI) ENDBR64 pushq $0 movl $X86_EXC_NMI, 4(%rsp) -handle_ist_exception: +END(entry_NMI) + +FUNC(handle_ist_exception) ALTERNATIVE "", clac, X86_FEATURE_XEN_SMAP SAVE_ALL @@ -1150,7 +1152,7 @@ handle_ist_exception: ASSERT_CONTEXT_IS_XEN jmp restore_all_xen #endif -END(entry_NMI) +END(handle_ist_exception) FUNC(entry_MC) ENDBR64 From patchwork Mon Jan 22 18:17:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andrew Cooper X-Patchwork-Id: 13526013 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BC2A8C47DD3 for ; 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d="scan'208";a="132366782" From: Andrew Cooper To: Xen-devel CC: Andrew Cooper , Jan Beulich , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , Konrad Rzeszutek Wilk , Ross Lagerwall Subject: [PATCH 2/3] x86/entry: Make #PF/NMI/INT0x82 more amenable to livepatching Date: Mon, 22 Jan 2024 18:17:12 +0000 Message-ID: <20240122181714.1543738-3-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240122181714.1543738-1-andrew.cooper3@citrix.com> References: <20240122181714.1543738-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 It is bad form to have inter-function fallthrough. It only functions right now because alignment padding bytes are NOPs. However, it also interferes with livepatching binary diffs, because the implicit grouping of the two functions isn't expressed in the ELF metadata. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Wei Liu CC: Konrad Rzeszutek Wilk CC: Ross Lagerwall --- xen/arch/x86/x86_64/compat/entry.S | 1 + xen/arch/x86/x86_64/entry.S | 3 +++ 2 files changed, 4 insertions(+) diff --git a/xen/arch/x86/x86_64/compat/entry.S b/xen/arch/x86/x86_64/compat/entry.S index 49811a56e965..4fbd89cea1a9 100644 --- a/xen/arch/x86/x86_64/compat/entry.S +++ b/xen/arch/x86/x86_64/compat/entry.S @@ -29,6 +29,7 @@ FUNC(entry_int82) mov %rsp, %rdi call do_entry_int82 + jmp compat_test_all_events END(entry_int82) /* %rbx: struct vcpu */ diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index c3f6b667a72a..fc64ef1fd460 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -723,7 +723,9 @@ END(common_interrupt) FUNC(entry_PF) ENDBR64 movl $X86_EXC_PF, 4(%rsp) + jmp handle_exception END(entry_PF) + /* No special register assumptions. */ FUNC(handle_exception, 0) ALTERNATIVE "", clac, X86_FEATURE_XEN_SMAP @@ -1023,6 +1025,7 @@ FUNC(entry_NMI) ENDBR64 pushq $0 movl $X86_EXC_NMI, 4(%rsp) + jmp handle_ist_exception END(entry_NMI) FUNC(handle_ist_exception) From patchwork Mon Jan 22 18:17:14 2024 Content-Type: text/plain; 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d="scan'208";a="132366783" From: Andrew Cooper To: Xen-devel CC: Andrew Cooper , Jan Beulich , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , Konrad Rzeszutek Wilk , Ross Lagerwall Subject: [PATCH 3/3] x86/entry: Make intra-funciton symbols properly local Date: Mon, 22 Jan 2024 18:17:14 +0000 Message-ID: <20240122181714.1543738-5-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240122181714.1543738-1-andrew.cooper3@citrix.com> References: <20240122181714.1543738-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Each of these symbols are local to their main function. By not having them globally visible, livepatch's binary diffing logic can reason about the functions properly. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Wei Liu CC: Konrad Rzeszutek Wilk CC: Ross Lagerwall sysenter_eflags_saved() is an open question. This does need to be globally visible, and I think any livepatch modifying sysenter_entry() will need a manual adjustment to do_debug() to update the reference there. --- xen/arch/x86/x86_64/compat/entry.S | 20 ++++++++++---------- xen/arch/x86/x86_64/entry.S | 22 +++++++++++----------- 2 files changed, 21 insertions(+), 21 deletions(-) diff --git a/xen/arch/x86/x86_64/compat/entry.S b/xen/arch/x86/x86_64/compat/entry.S index 4fbd89cea1a9..1e9e0455eaf3 100644 --- a/xen/arch/x86/x86_64/compat/entry.S +++ b/xen/arch/x86/x86_64/compat/entry.S @@ -41,7 +41,7 @@ FUNC(compat_test_all_events) shll $IRQSTAT_shift,%eax leaq irq_stat+IRQSTAT_softirq_pending(%rip),%rcx cmpl $0,(%rcx,%rax,1) - jne compat_process_softirqs + jne .L_compat_process_softirqs /* Inject exception if pending. */ lea VCPU_trap_bounce(%rbx), %rdx @@ -49,11 +49,11 @@ FUNC(compat_test_all_events) jnz .Lcompat_process_trapbounce cmpb $0, VCPU_mce_pending(%rbx) - jne compat_process_mce + jne .L_compat_process_mce .Lcompat_test_guest_nmi: cmpb $0, VCPU_nmi_pending(%rbx) - jne compat_process_nmi -compat_test_guest_events: + jne .L_compat_process_nmi +.L_compat_test_guest_events: movq VCPU_vcpu_info(%rbx),%rax movzwl COMPAT_VCPUINFO_upcall_pending(%rax),%eax decl %eax @@ -71,7 +71,7 @@ compat_test_guest_events: jmp compat_test_all_events /* %rbx: struct vcpu */ -LABEL_LOCAL(compat_process_softirqs) +LABEL_LOCAL(.L_compat_process_softirqs) sti call do_softirq jmp compat_test_all_events @@ -84,7 +84,7 @@ LABEL_LOCAL(.Lcompat_process_trapbounce) jmp compat_test_all_events /* %rbx: struct vcpu */ -LABEL_LOCAL(compat_process_mce) +LABEL_LOCAL(.L_compat_process_mce) testb $1 << VCPU_TRAP_MCE,VCPU_async_exception_mask(%rbx) jnz .Lcompat_test_guest_nmi sti @@ -96,12 +96,12 @@ LABEL_LOCAL(compat_process_mce) movb %dl,VCPU_mce_old_mask(%rbx) # iret hypercall orl $1 << VCPU_TRAP_MCE,%edx movb %dl,VCPU_async_exception_mask(%rbx) - jmp compat_process_trap + jmp .L_compat_process_trap /* %rbx: struct vcpu */ -LABEL_LOCAL(compat_process_nmi) +LABEL_LOCAL(.L_compat_process_nmi) testb $1 << VCPU_TRAP_NMI,VCPU_async_exception_mask(%rbx) - jnz compat_test_guest_events + jnz .L_compat_test_guest_events sti movb $0, VCPU_nmi_pending(%rbx) call set_guest_nmi_trapbounce @@ -112,7 +112,7 @@ LABEL_LOCAL(compat_process_nmi) orl $1 << VCPU_TRAP_NMI,%edx movb %dl,VCPU_async_exception_mask(%rbx) /* FALLTHROUGH */ -compat_process_trap: +.L_compat_process_trap: leaq VCPU_trap_bounce(%rbx),%rdx call compat_create_bounce_frame jmp compat_test_all_events diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index fc64ef1fd460..130462ba0e1a 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -188,7 +188,7 @@ FUNC_LOCAL(restore_all_guest) RESTORE_ALL testw $TRAP_syscall,4(%rsp) - jz iret_exit_to_guest + jz .L_iret_exit_to_guest movq 24(%rsp),%r11 # RFLAGS andq $~(X86_EFLAGS_IOPL | X86_EFLAGS_VM), %r11 @@ -220,7 +220,7 @@ FUNC_LOCAL(restore_all_guest) LABEL_LOCAL(.Lrestore_rcx_iret_exit_to_guest) movq 8(%rsp), %rcx # RIP /* No special register assumptions. */ -iret_exit_to_guest: +.L_iret_exit_to_guest: andl $~(X86_EFLAGS_IOPL | X86_EFLAGS_VM), 24(%rsp) orl $X86_EFLAGS_IF,24(%rsp) addq $8,%rsp @@ -432,10 +432,10 @@ UNLIKELY_END(msi_check) cmove %rdi, %rdx test %rdx, %rdx - jz int80_slow_path + jz .L_int80_slow_path #else test %rdi, %rdi - jz int80_slow_path + jz .L_int80_slow_path #endif /* Construct trap_bounce from trap_ctxt[0x80]. */ @@ -457,7 +457,7 @@ UNLIKELY_END(msi_check) call create_bounce_frame jmp test_all_events -int80_slow_path: +.L_int80_slow_path: /* * Setup entry vector and error code as if this was a GPF caused by an * IDT entry with DPL==0. @@ -472,7 +472,7 @@ int80_slow_path: * need to set up %r14 here, while %r15 is required to still be zero. */ GET_STACK_END(14) - jmp handle_exception_saved + jmp .L_handle_exception_saved END(entry_int80) /* create_bounce_frame & helpers don't need to be in .text.entry */ @@ -750,10 +750,10 @@ FUNC(handle_exception, 0) cmovnz %r12d, %r13d .Lxcpt_cr3_okay: -handle_exception_saved: +.L_handle_exception_saved: GET_CURRENT(bx) testb $X86_EFLAGS_IF>>8,UREGS_eflags+1(%rsp) - jz exception_with_ints_disabled + jz .L_exception_with_ints_disabled #if defined(CONFIG_PV32) ALTERNATIVE_2 "jmp .Lcr4_pv32_done", \ @@ -859,9 +859,9 @@ handle_exception_saved: #endif /* No special register assumptions. */ -exception_with_ints_disabled: +.L_exception_with_ints_disabled: testb $3,UREGS_cs(%rsp) # interrupts disabled outside Xen? - jnz FATAL_exception_with_ints_disabled + jnz .L_FATAL_exception_with_ints_disabled movq %rsp,%rdi call search_pre_exception_table testq %rax,%rax # no fixup code for faulting EIP? @@ -891,7 +891,7 @@ exception_with_ints_disabled: jmp restore_all_xen # return to fixup code /* No special register assumptions. */ -FATAL_exception_with_ints_disabled: +.L_FATAL_exception_with_ints_disabled: xorl %esi,%esi movq %rsp,%rdi tailcall fatal_trap