From patchwork Tue Jan 23 15:58:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Helge Deller X-Patchwork-Id: 13527708 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 914465F552 for ; Tue, 23 Jan 2024 15:59:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706025553; cv=none; b=mgo3KhMHVzzhIbKffGShB5OYDqHL/DtNJEiUrXtRGvAmTTc9ZOPnHKJEa/mIJGHtbIT1DsEv5NpMQciqT2ejvmWCNMkBQ2jgVeNN61aS51/rmMSN6XDfNuGs57w/1nMuGG7HovbQejXF92Uxq37TG8bW093Eeik1m+jw9V8sJsg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706025553; c=relaxed/simple; bh=+VdqAfcT+UzoiXuEv7wP7IafLCE81jF76rm78rIo5Pg=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=uq7M1sQZAA5lsv8QaJVY8qFicOPNn1VDc0FPs8UpwylU1pWETnlrIqkfFA4NnHajm7rb8ddbZH9Lbr/W7oAhf7TLN7MWZzRkl5PktrcYjxgswNaVnFDX3cWnTnUQkynXewPLGAo1K155oA7+jbwhE+WNMNyiUDPPQ+2WOfN3kLc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=RYNLFTLk; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="RYNLFTLk" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D0B87C433C7 for ; Tue, 23 Jan 2024 15:59:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1706025553; bh=+VdqAfcT+UzoiXuEv7wP7IafLCE81jF76rm78rIo5Pg=; h=From:To:Subject:Date:From; b=RYNLFTLkJQzc0DtpO6vUxKHGmWznvbNthv0GYR+Bljayn2sBsHM90Sz04MAqKvYXe Bm3cCGXBth3HM5K1W4NMZSb42iOLtrNrjTBE0zhbVKi7XzP4zg2DJtVrgYm5nBF4lU 8DcQlg3nzQO+E5etUmP1ERu1mEfvNaGneA76aaSBE6Js7Son8m4sjramlAqest9Bjs zrpZF00Ibj59vn/RWLJThvJa/I1sNLRSTBGDVQ/X3UIrVY3TQ9yXyo/Y7oxqzYtAb6 rAUMF3n1f9mTHYRVD8RSzqwAEVwGwZLTRQcUseS2qP/7qt/TpGxnXxqtrUaXBRbNon rK/+V6Wkhclag== From: deller@kernel.org To: linux-parisc@vger.kernel.org Subject: [PATCH 1/7] parisc: Use irq_enter_rcu() to fix warning at kernel/context_tracking.c:367 Date: Tue, 23 Jan 2024 16:58:58 +0100 Message-ID: <20240123155904.6220-1-deller@kernel.org> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-parisc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Helge Deller Use irq*_rcu() functions to fix this kernel warning: WARNING: CPU: 0 PID: 0 at kernel/context_tracking.c:367 ct_irq_enter+0xa0/0xd0 Modules linked in: CPU: 0 PID: 0 Comm: swapper/0 Not tainted 6.7.0-rc3-64bit+ #1037 Hardware name: 9000/785/C3700 IASQ: 0000000000000000 0000000000000000 IAOQ: 00000000412cd758 00000000412cd75c IIR: 03ffe01f ISR: 0000000000000000 IOR: 0000000043c20c20 CPU: 0 CR30: 0000000041caa000 CR31: 0000000000000000 ORIG_R28: 0000000000000005 IAOQ[0]: ct_irq_enter+0xa0/0xd0 IAOQ[1]: ct_irq_enter+0xa4/0xd0 RP(r2): irq_enter+0x34/0x68 Backtrace: [<000000004034a3ec>] irq_enter+0x34/0x68 [<000000004030dc48>] do_cpu_irq_mask+0xc0/0x450 [<0000000040303070>] intr_return+0x0/0xc Signed-off-by: Helge Deller --- arch/parisc/kernel/irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index 2f81bfd4f15e..dff66be65d29 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c @@ -498,7 +498,7 @@ asmlinkage void do_cpu_irq_mask(struct pt_regs *regs) old_regs = set_irq_regs(regs); local_irq_disable(); - irq_enter(); + irq_enter_rcu(); eirr_val = mfctl(23) & cpu_eiem & per_cpu(local_ack_eiem, cpu); if (!eirr_val) @@ -533,7 +533,7 @@ asmlinkage void do_cpu_irq_mask(struct pt_regs *regs) #endif /* CONFIG_IRQSTACKS */ out: - irq_exit(); + irq_exit_rcu(); set_irq_regs(old_regs); return; From patchwork Tue Jan 23 15:58:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Helge Deller X-Patchwork-Id: 13527709 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CEF3D612D4 for ; Tue, 23 Jan 2024 15:59:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706025559; cv=none; b=iJPshWHUFxWzGHWwWHsIPvm0IQyInkAIhZn8HgrsD1xJ8Mp6UeIkNzGIzf1Gbj6+mdGlU5vEn89/mAjc0XrfZVFmmq08C6Nf1qv0bPOf6o8TZb1Uahaf+Hb37WuWeZll/5FccmxnkHzd5XP73qTQXp0nmxNmrZPajAuYgf4VIQo= ARC-Message-Signature: i=1; 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b=lLUlBs4eVB/hmH363FYc6kh1fevGNOpB/Ee+6HPM+xwA/UKW8rHKbLFwAaXr7Y9cX QnS4sLd9/fGOcuO81L5f9zygMhZeqCNcr4tqdLqQp0HvClW0+c9FbK4SQKjBVW9oUZ g5nvx6eitfsC9GSa2jTVnla5XRwAwJ51zjO3Uh+MxM0AMfG3gjZsGln7wGfz/C5A3Y mJD/P6JP46oLWJI0BAuXVKiYUDmjLHxSPajr9zC0LkGnFLtfm/+Ef2bSf995hTrZE2 ogLr3Fgww6RToHqbIQd820XCK87NvxBOq/UeIzu1C6tlf185TGJTpOWVyvT6co2QT0 +optrLIiGgXBA== From: deller@kernel.org To: linux-parisc@vger.kernel.org Subject: [PATCH 2/7] parisc: Make RO_DATA page aligned in vmlinux.lds.S Date: Tue, 23 Jan 2024 16:58:59 +0100 Message-ID: <20240123155904.6220-2-deller@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240123155904.6220-1-deller@kernel.org> References: <20240123155904.6220-1-deller@kernel.org> Precedence: bulk X-Mailing-List: linux-parisc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Helge Deller The rodata_test program for CONFIG_DEBUG_RODATA_TEST=y complains if read-only data does not start at page boundary. Signed-off-by: Helge Deller --- arch/parisc/kernel/vmlinux.lds.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/parisc/kernel/vmlinux.lds.S b/arch/parisc/kernel/vmlinux.lds.S index 548051b0b4af..b445e47903cf 100644 --- a/arch/parisc/kernel/vmlinux.lds.S +++ b/arch/parisc/kernel/vmlinux.lds.S @@ -127,7 +127,7 @@ SECTIONS } #endif - RO_DATA(8) + RO_DATA(PAGE_SIZE) /* unwind info */ . = ALIGN(4); From patchwork Tue Jan 23 15:59:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Helge Deller X-Patchwork-Id: 13527710 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 59BFF61669 for ; Tue, 23 Jan 2024 15:59:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706025563; cv=none; b=oddDY/g+Inyq+m9nr3OMp7FJNlcNEcpu4A8OzjwAhTYJzp8ARqHtLXTwsgtq+tXhT2ZzFvC7CAgBHljGJv6mIAw6HgJU2H4FLBtPJyA224L/wuzLefKQnDRz7BWRAMUhZ/l5HJ36/7ritQrP+G7C5aMH0rVJfbtlqi39UgFt96k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706025563; c=relaxed/simple; bh=iZIRrzd/08DKlAuuESsiMrG+QJdAocaLIiD6zdMwMmc=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JksGkQqSNIa/dWwYM6ya/QEUrxQESVYvJbayoRR0XttA83171Otu+BjeWdDmp1ocFLlkkuO29R3Sm9rd71du2teyT88kv9/BlP7tUVYlwTIY40KzFCPMdxCCX5G1Su6kHysOghFpzafhXBS7u2X9I5GpL+MT6IMSNQchjDL2Afw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=j89bvcS5; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="j89bvcS5" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 554A6C43394 for ; Tue, 23 Jan 2024 15:59:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1706025562; bh=iZIRrzd/08DKlAuuESsiMrG+QJdAocaLIiD6zdMwMmc=; h=From:To:Subject:Date:In-Reply-To:References:From; b=j89bvcS5LYiIWFO9IpWfVbSyrp6IXtnrbzqJdKGxU8h6peVvTBLXhVuTiukX8kKE1 FaApDrcesvqQ2PzhZjlvFDvVxqZB0quQl+5LCX8BFG6JiD7Y8ig00vjxiwIiClScVy YUjtvxuE7dqGXDj9htV2zjzcpVhgfcA7S26MI6uUNLImZZx0InwBySndcMicXTjW6I sHQtHMysTY8zk5bU9O4Z/rpFHvS1LDv1IanT4vzt9LSz67Zs6ZPTc1yfREvu3Z8k+3 1s0mEJoDMKRE6AqrguCTbJlBvO0ptx7eS/TPsOTbhJANGjMghpqEi81kGoWG7qwEF8 Vaj959123WXwg== From: deller@kernel.org To: linux-parisc@vger.kernel.org Subject: [PATCH 3/7] parisc: Check for valid stride size for cache flushes Date: Tue, 23 Jan 2024 16:59:00 +0100 Message-ID: <20240123155904.6220-3-deller@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240123155904.6220-1-deller@kernel.org> References: <20240123155904.6220-1-deller@kernel.org> Precedence: bulk X-Mailing-List: linux-parisc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Helge Deller Report if the calculated cache stride size is zero, otherwise the cache flushing routine will never finish and hang the machine. This can be reproduced with a testcase in qemu, where the firmware reports wrong cache values. Signed-off-by: Helge Deller --- arch/parisc/kernel/cache.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c index 268d90a9325b..0c015487e5db 100644 --- a/arch/parisc/kernel/cache.c +++ b/arch/parisc/kernel/cache.c @@ -264,6 +264,10 @@ parisc_cache_init(void) icache_stride = CAFL_STRIDE(cache_info.ic_conf); #undef CAFL_STRIDE + /* stride needs to be non-zero, otherwise cache flushes will not work */ + WARN_ON(cache_info.dc_size && dcache_stride == 0); + WARN_ON(cache_info.ic_size && icache_stride == 0); + if ((boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) == PDC_MODEL_NVA_UNSUPPORTED) { printk(KERN_WARNING "parisc_cache_init: Only equivalent aliasing supported!\n"); From patchwork Tue Jan 23 15:59:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Helge Deller X-Patchwork-Id: 13527711 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F0C36167C for ; Tue, 23 Jan 2024 15:59:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706025565; cv=none; b=cThuPuguZr5BabgPXKbJ297uNEavjjYJ2SsVsnsdStVzeCLJNN/C6cN+Qko8nXqJjPvJZfaLEaDJQeS+iyjHoV2Vj8ePRmgadujCQQue2z0/urHplsey4LM0EONrkPLY+U8b7Ftkn3yhroiKjF8H79fcc4ej3CBd1OvYm8EHnHI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706025565; c=relaxed/simple; bh=73qFuYasz0mQEmxPeu3hv+8nCU445gydjCiGlQEFpsQ=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KYTCGDlRTWTNnHwQcMDoAQnMKtZiNGBy5pYFRk922Q+tRGIZRuc6HF3tSINUPK8VANBDZiAMHo/OCDqVDrXRMnR5Y/f0IeUXGNkQHiw1F6B7lLprUFTF1UDlLD6ya/XJ4Tj/q8gSlV11XteU/2q8KjiZDoXpe9xB4sutIAFXSCI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=O1LE7tl+; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="O1LE7tl+" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 611EEC43390 for ; Tue, 23 Jan 2024 15:59:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1706025564; bh=73qFuYasz0mQEmxPeu3hv+8nCU445gydjCiGlQEFpsQ=; h=From:To:Subject:Date:In-Reply-To:References:From; b=O1LE7tl+tJ0g8uqvI7Rw2axfwyWjVevOVpqr5MK7anJY41QeEWliUyPa52Hw8hBC8 c0D5yq1VGrSuAuHIkvilVDLmSjk35RSo0RGgE3XDWZdWIyg6bXY5Whxh6AwS5nW/sP p62eXkHW7KO0+NRAXylnfZrLDEiD30+8DWnAnBgfm6lqLp9kqRTIIM/RR8CzlMrdCx Cw0gA+hPGn0F2FAX8bUuGjTNXhNoiDHdaMP4XXFkmZzWJCVxyuaOZ4BTy138Ry+zYr fZTGmfU8HEl0yV7X+aWZoNnTSTyQa8X/kYj4L2yZ0u8fcWJ7O5X0xN+UjoLtvlUM2N W3b0BxMGcLfXQ== From: deller@kernel.org To: linux-parisc@vger.kernel.org Subject: [PATCH 4/7] parisc: Prevent hung tasks when printing inventory on serial console Date: Tue, 23 Jan 2024 16:59:01 +0100 Message-ID: <20240123155904.6220-4-deller@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240123155904.6220-1-deller@kernel.org> References: <20240123155904.6220-1-deller@kernel.org> Precedence: bulk X-Mailing-List: linux-parisc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Helge Deller Printing the inventory on a serial console can be quite slow and thus may trigger the hung task detector (CONFIG_DETECT_HUNG_TASK=y) and possibly reboot the machine. Adding a cond_resched() prevents this. Signed-off-by: Helge Deller Cc: # v6.0+ --- arch/parisc/kernel/drivers.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/parisc/kernel/drivers.c b/arch/parisc/kernel/drivers.c index 25f9b9e9d6df..404ea37705ce 100644 --- a/arch/parisc/kernel/drivers.c +++ b/arch/parisc/kernel/drivers.c @@ -1004,6 +1004,9 @@ static __init int qemu_print_iodc_data(struct device *lin_dev, void *data) pr_info("\n"); + /* Prevent hung task messages when printing on serial console */ + cond_resched(); + pr_info("#define HPA_%08lx_DESCRIPTION \"%s\"\n", hpa, parisc_hardware_description(&dev->id)); From patchwork Tue Jan 23 15:59:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Helge Deller X-Patchwork-Id: 13527712 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 883D761680 for ; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="RJ4htCgi" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6D107C43394 for ; Tue, 23 Jan 2024 15:59:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1706025565; bh=E7rIaCLeep4xX+XPrhYVzcgsOlMCyKhWPwyTCqB8bGo=; h=From:To:Subject:Date:In-Reply-To:References:From; b=RJ4htCgiIPED7/pLpw+cDFpCjNX0FGS0VsQorf07L3GJ8D12Yv9Yzi0JbP3CQ3A9G vBfTzyTTCU6AUjX5QvEJBzXVX4WP6LZ3s2pXxSEuf2cxHBxKx5uGjgk5TlV6qbUesB EHRUNwzhCI9D2di/XJZJrWvEYHA/qRtNyAZfLhJleh+LgTHaGgOI4fs9At1Ess0Ov9 gz+0H0UM6M8O0iB6R38QuZcddRZaAxeXK4fLC+rZrLLWsFPSIo1cDc3jYzl4pyFk3q 71bXjB9WfbqrNY9udcDYDzqGmUyUQb29i5O6BcgtP/4p1YLuGaoGjweJmpIl88Spz3 bdNcWXXdy09qg== From: deller@kernel.org To: linux-parisc@vger.kernel.org Subject: [PATCH 5/7] parisc: Drop unneeded semicolon in parse_tree_node() Date: Tue, 23 Jan 2024 16:59:02 +0100 Message-ID: <20240123155904.6220-5-deller@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240123155904.6220-1-deller@kernel.org> References: <20240123155904.6220-1-deller@kernel.org> Precedence: bulk X-Mailing-List: linux-parisc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Helge Deller Reported-by: kernel test robot Signed-off-by: Helge Deller Closes: https://lore.kernel.org/oe-kbuild-all/202401222059.Wli6OGT0-lkp@intel.com/ --- arch/parisc/kernel/drivers.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/parisc/kernel/drivers.c b/arch/parisc/kernel/drivers.c index 404ea37705ce..c7ff339732ba 100644 --- a/arch/parisc/kernel/drivers.c +++ b/arch/parisc/kernel/drivers.c @@ -742,7 +742,7 @@ parse_tree_node(struct device *parent, int index, struct hardware_path *modpath) }; if (device_for_each_child(parent, &recurse_data, descend_children)) - { /* nothing */ }; + { /* nothing */ } return d.dev; } From patchwork Tue Jan 23 15:59:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Helge Deller X-Patchwork-Id: 13527713 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9E1FB61685 for ; Tue, 23 Jan 2024 15:59:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706025566; cv=none; b=B6gctDwD+JAcsQeeMiDyRd9k6hNCcAI2hqhRLeWC2Pfs+misKjYMJHxh1IyFpRC0807v6drmIxoOM9jKwgyEYgp96v4qh4GRvL2l6CgN7HmFp8r9edJ0wI6IAHbnTj8VSwegJDUHi6/TT7Lz5bt+VoAU0T0j35lGRh3nWq6PCRk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706025566; c=relaxed/simple; bh=k9C84DGfc10JdPx9QaxwbkYWiXxWeFaA1yVD8jfNsNg=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=jXhldcZkW0AAsIEmZ4BggcSyQLqkSgcq+D7I6y7r4qm7qvTcjV+SMIojOKh3fHKQAk22/Ovb0xF2AERmdOAQh5QNbzpfJtr56EEhysPwGpRzVj1HUfrrJR7N6spLNIrT356+yyMKxRgZdACHxwGR2yY66PjP6KWdXeRO88AKrKA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=srM86fur; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="srM86fur" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 89C56C433C7 for ; Tue, 23 Jan 2024 15:59:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1706025566; bh=k9C84DGfc10JdPx9QaxwbkYWiXxWeFaA1yVD8jfNsNg=; h=From:To:Subject:Date:In-Reply-To:References:From; b=srM86fur7q1zUvPCavVjl6imuiDQr3WYp0uzFRSTchbKwcij2x7ncf3RVFXf2BYxX tOqr7gRtzr9EkABB8VUckXpWU/lkTWcFg+kpz5LwLP2kix8SR2Zljc8kcrRHY59sQw BIncpdyiplx/uCz0zRyIrVRoI+zBtDbT34LpSD1wt7YhAoX2pFmaRsdtXJUhBmHE3z vP8mtQr3UAo/beR+paYJvqc0UdcvRZ0gB9cSboeEIJvpyjPbu0y1mcbXuivlKhxyFW b1LjwzwOCNfNpBmnYLVtmEfKzHkEdiZJ9ZhpI4fsBRq+lKfuWbCPWuvhl/ZNHlSrRP MOdRlWpUDZ9fA== From: deller@kernel.org To: linux-parisc@vger.kernel.org Subject: [PATCH 6/7] parisc: Fix random data corruption from exception handler Date: Tue, 23 Jan 2024 16:59:03 +0100 Message-ID: <20240123155904.6220-6-deller@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240123155904.6220-1-deller@kernel.org> References: <20240123155904.6220-1-deller@kernel.org> Precedence: bulk X-Mailing-List: linux-parisc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Helge Deller The current exception handler implementation, which assists when accessing user space memory, may exhibit random data corruption if the compiler decides to use a different register than the given register %r29 (defined in ASM_EXCEPTIONTABLE_REG) for the error code. If the compiler choose another register, the fault handler will nevertheless store -EFAULT into %r29 and thus trash whatever this register is used for. Looking at the assembly I found that this happened e.g. in emulate_ldd(). To solve the issue, the easiest solution would be if it somehow is possible to tell the fault handler which register is used to hold the error code. Using %0 or %1 in the inline assembly is not posssible as it will show up as e.g. %r29 (with the "%r" prefix), which the GNU assembler can not convert to an integer. This patch takes another, better and more flexible approach: We extend the __ex_table (which is out of the execution path) by one 32-word. In this word we tell the compiler to insert the assembler instruction "ldi 1,%reg", where %reg references the register which the compiler choosed for the error return code. In case of an access failure, the fault handler finds the __ex_table entry and can examine the opcode. The used register is encoded in the lowest 5 bits, and the fault handler can then store -EFAULT into this register. Signed-off-by: Helge Deller Cc: # v6.0+ --- arch/parisc/include/asm/assembly.h | 1 + arch/parisc/include/asm/extable.h | 64 +++++++++++++++++++++++++ arch/parisc/include/asm/special_insns.h | 4 +- arch/parisc/include/asm/uaccess.h | 48 +++---------------- arch/parisc/kernel/cache.c | 4 +- arch/parisc/kernel/unaligned.c | 44 ++++++++--------- arch/parisc/mm/fault.c | 10 ++-- 7 files changed, 105 insertions(+), 70 deletions(-) create mode 100644 arch/parisc/include/asm/extable.h diff --git a/arch/parisc/include/asm/assembly.h b/arch/parisc/include/asm/assembly.h index 74d17d7e759d..6b1aaef07f52 100644 --- a/arch/parisc/include/asm/assembly.h +++ b/arch/parisc/include/asm/assembly.h @@ -576,6 +576,7 @@ .section __ex_table,"aw" ! \ .align 4 ! \ .word (fault_addr - .), (except_addr - .) ! \ + ldi 0,%r0 ! \ .previous diff --git a/arch/parisc/include/asm/extable.h b/arch/parisc/include/asm/extable.h new file mode 100644 index 000000000000..a498fd6deab2 --- /dev/null +++ b/arch/parisc/include/asm/extable.h @@ -0,0 +1,64 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __PARISC_EXTABLE_H +#define __PARISC_EXTABLE_H + +#include +#include + +/* + * The exception table consists of three addresses: + * + * - A relative address to the instruction that is allowed to fault. + * - A relative address at which the program should continue (fixup routine) + * - An asm statement which specifies which CPU register will + * receive -EFAULT when an exception happens if the lowest bit in + * the fixup address is set. + * + * Note: The register specified in the err_opcode instruction will be + * modified at runtime if a fault happens. Register %r0 will not be written, + * + * Since relative addresses are used, 32bit values are sufficient even on + * 64bit kernel. + */ + +struct pt_regs; +int fixup_exception(struct pt_regs *regs); + +#define ARCH_HAS_RELATIVE_EXTABLE +struct exception_table_entry { + int insn; /* relative address of insn that is allowed to fault. */ + int fixup; /* relative address of fixup routine */ + int err_opcode; /* sample opcode with register which holds error code */ +}; + +#define ASM_EXCEPTIONTABLE_ENTRY( fault_addr, except_addr, opcode )\ + ".section __ex_table,\"aw\"\n" \ + ".align 4\n" \ + ".word (" #fault_addr " - .), (" #except_addr " - .)\n" \ + opcode "\n" \ + ".previous\n" + +/* + * ASM_EXCEPTIONTABLE_ENTRY_EFAULT() creates a special exception table entry + * (with lowest bit set) for which the fault handler in fixup_exception() will + * load -EFAULT on fault into the register specified by the err_opcode instruction, + * and zeroes the target register in case of a read fault in get_user(). + */ +#define ASM_EXCEPTIONTABLE_VAR(__err_var) \ + int __err_var = 0 +#define ASM_EXCEPTIONTABLE_ENTRY_EFAULT( fault_addr, except_addr, register )\ + ASM_EXCEPTIONTABLE_ENTRY( fault_addr, except_addr + 1, "ldi 0," register) + +static inline void swap_ex_entry_fixup(struct exception_table_entry *a, + struct exception_table_entry *b, + struct exception_table_entry tmp, + int delta) +{ + a->fixup = b->fixup + delta; + b->fixup = tmp.fixup - delta; + a->err_opcode = b->err_opcode; + b->err_opcode = tmp.err_opcode; +} +#define swap_ex_entry_fixup swap_ex_entry_fixup + +#endif diff --git a/arch/parisc/include/asm/special_insns.h b/arch/parisc/include/asm/special_insns.h index c822bd0c0e3c..3c07d1f4893c 100644 --- a/arch/parisc/include/asm/special_insns.h +++ b/arch/parisc/include/asm/special_insns.h @@ -8,7 +8,7 @@ "copy %%r0,%0\n" \ "8:\tlpa %%r0(%1),%0\n" \ "9:\n" \ - ASM_EXCEPTIONTABLE_ENTRY(8b, 9b) \ + ASM_EXCEPTIONTABLE_ENTRY(8b, 9b, "nop") \ : "=&r" (pa) \ : "r" (va) \ : "memory" \ @@ -22,7 +22,7 @@ "copy %%r0,%0\n" \ "8:\tlpa %%r0(%%sr3,%1),%0\n" \ "9:\n" \ - ASM_EXCEPTIONTABLE_ENTRY(8b, 9b) \ + ASM_EXCEPTIONTABLE_ENTRY(8b, 9b, "nop") \ : "=&r" (pa) \ : "r" (va) \ : "memory" \ diff --git a/arch/parisc/include/asm/uaccess.h b/arch/parisc/include/asm/uaccess.h index 4165079898d9..88d0ae5769dd 100644 --- a/arch/parisc/include/asm/uaccess.h +++ b/arch/parisc/include/asm/uaccess.h @@ -7,6 +7,7 @@ */ #include #include +#include #include #include @@ -26,37 +27,6 @@ #define STD_USER(sr, x, ptr) __put_user_asm(sr, "std", x, ptr) #endif -/* - * The exception table contains two values: the first is the relative offset to - * the address of the instruction that is allowed to fault, and the second is - * the relative offset to the address of the fixup routine. Since relative - * addresses are used, 32bit values are sufficient even on 64bit kernel. - */ - -#define ARCH_HAS_RELATIVE_EXTABLE -struct exception_table_entry { - int insn; /* relative address of insn that is allowed to fault. */ - int fixup; /* relative address of fixup routine */ -}; - -#define ASM_EXCEPTIONTABLE_ENTRY( fault_addr, except_addr )\ - ".section __ex_table,\"aw\"\n" \ - ".align 4\n" \ - ".word (" #fault_addr " - .), (" #except_addr " - .)\n\t" \ - ".previous\n" - -/* - * ASM_EXCEPTIONTABLE_ENTRY_EFAULT() creates a special exception table entry - * (with lowest bit set) for which the fault handler in fixup_exception() will - * load -EFAULT into %r29 for a read or write fault, and zeroes the target - * register in case of a read fault in get_user(). - */ -#define ASM_EXCEPTIONTABLE_REG 29 -#define ASM_EXCEPTIONTABLE_VAR(__variable) \ - register long __variable __asm__ ("r29") = 0 -#define ASM_EXCEPTIONTABLE_ENTRY_EFAULT( fault_addr, except_addr )\ - ASM_EXCEPTIONTABLE_ENTRY( fault_addr, except_addr + 1) - #define __get_user_internal(sr, val, ptr) \ ({ \ ASM_EXCEPTIONTABLE_VAR(__gu_err); \ @@ -83,7 +53,7 @@ struct exception_table_entry { \ __asm__("1: " ldx " 0(%%sr%2,%3),%0\n" \ "9:\n" \ - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \ + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b, "%1") \ : "=r"(__gu_val), "+r"(__gu_err) \ : "i"(sr), "r"(ptr)); \ \ @@ -115,8 +85,8 @@ struct exception_table_entry { "1: ldw 0(%%sr%2,%3),%0\n" \ "2: ldw 4(%%sr%2,%3),%R0\n" \ "9:\n" \ - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \ - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 9b) \ + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b, "%1") \ + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 9b, "%1") \ : "=&r"(__gu_tmp.l), "+r"(__gu_err) \ : "i"(sr), "r"(ptr)); \ \ @@ -174,7 +144,7 @@ struct exception_table_entry { __asm__ __volatile__ ( \ "1: " stx " %1,0(%%sr%2,%3)\n" \ "9:\n" \ - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \ + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b, "%0") \ : "+r"(__pu_err) \ : "r"(x), "i"(sr), "r"(ptr)) @@ -186,15 +156,14 @@ struct exception_table_entry { "1: stw %1,0(%%sr%2,%3)\n" \ "2: stw %R1,4(%%sr%2,%3)\n" \ "9:\n" \ - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \ - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 9b) \ + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b, "%0") \ + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 9b, "%0") \ : "+r"(__pu_err) \ : "r"(__val), "i"(sr), "r"(ptr)); \ } while (0) #endif /* !defined(CONFIG_64BIT) */ - /* * Complex access routines -- external declarations */ @@ -216,7 +185,4 @@ unsigned long __must_check raw_copy_from_user(void *dst, const void __user *src, #define INLINE_COPY_TO_USER #define INLINE_COPY_FROM_USER -struct pt_regs; -int fixup_exception(struct pt_regs *regs); - #endif /* __PARISC_UACCESS_H */ diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c index 0c015487e5db..5552602fcaef 100644 --- a/arch/parisc/kernel/cache.c +++ b/arch/parisc/kernel/cache.c @@ -854,7 +854,7 @@ SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes, #endif " fic,m %3(%4,%0)\n" "2: sync\n" - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 2b) + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 2b, "%1") : "+r" (start), "+r" (error) : "r" (end), "r" (dcache_stride), "i" (SR_USER)); } @@ -869,7 +869,7 @@ SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes, #endif " fdc,m %3(%4,%0)\n" "2: sync\n" - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 2b) + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 2b, "%1") : "+r" (start), "+r" (error) : "r" (end), "r" (icache_stride), "i" (SR_USER)); } diff --git a/arch/parisc/kernel/unaligned.c b/arch/parisc/kernel/unaligned.c index ce25acfe4889..c520e551a165 100644 --- a/arch/parisc/kernel/unaligned.c +++ b/arch/parisc/kernel/unaligned.c @@ -120,8 +120,8 @@ static int emulate_ldh(struct pt_regs *regs, int toreg) "2: ldbs 1(%%sr1,%3), %0\n" " depw %2, 23, 24, %0\n" "3: \n" - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b) - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b) + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b, "%1") + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b, "%1") : "+r" (val), "+r" (ret), "=&r" (temp1) : "r" (saddr), "r" (regs->isr) ); @@ -152,8 +152,8 @@ static int emulate_ldw(struct pt_regs *regs, int toreg, int flop) " mtctl %2,11\n" " vshd %0,%3,%0\n" "3: \n" - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b) - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b) + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b, "%1") + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b, "%1") : "+r" (val), "+r" (ret), "=&r" (temp1), "=&r" (temp2) : "r" (saddr), "r" (regs->isr) ); @@ -189,8 +189,8 @@ static int emulate_ldd(struct pt_regs *regs, int toreg, int flop) " mtsar %%r19\n" " shrpd %0,%%r20,%%sar,%0\n" "3: \n" - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b) - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b) + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b, "%1") + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b, "%1") : "=r" (val), "+r" (ret) : "0" (val), "r" (saddr), "r" (regs->isr) : "r19", "r20" ); @@ -209,9 +209,9 @@ static int emulate_ldd(struct pt_regs *regs, int toreg, int flop) " vshd %0,%R0,%0\n" " vshd %R0,%4,%R0\n" "4: \n" - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 4b) - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 4b) - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(3b, 4b) + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 4b, "%1") + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 4b, "%1") + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(3b, 4b, "%1") : "+r" (val), "+r" (ret), "+r" (saddr), "=&r" (shift), "=&r" (temp1) : "r" (regs->isr) ); } @@ -244,8 +244,8 @@ static int emulate_sth(struct pt_regs *regs, int frreg) "1: stb %1, 0(%%sr1, %3)\n" "2: stb %2, 1(%%sr1, %3)\n" "3: \n" - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b) - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b) + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b, "%0") + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b, "%0") : "+r" (ret), "=&r" (temp1) : "r" (val), "r" (regs->ior), "r" (regs->isr) ); @@ -285,8 +285,8 @@ static int emulate_stw(struct pt_regs *regs, int frreg, int flop) " stw %%r20,0(%%sr1,%2)\n" " stw %%r21,4(%%sr1,%2)\n" "3: \n" - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b) - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b) + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b, "%0") + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b, "%0") : "+r" (ret) : "r" (val), "r" (regs->ior), "r" (regs->isr) : "r19", "r20", "r21", "r22", "r1" ); @@ -329,10 +329,10 @@ static int emulate_std(struct pt_regs *regs, int frreg, int flop) "3: std %%r20,0(%%sr1,%2)\n" "4: std %%r21,8(%%sr1,%2)\n" "5: \n" - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 5b) - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 5b) - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(3b, 5b) - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(4b, 5b) + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 5b, "%0") + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 5b, "%0") + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(3b, 5b, "%0") + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(4b, 5b, "%0") : "+r" (ret) : "r" (val), "r" (regs->ior), "r" (regs->isr) : "r19", "r20", "r21", "r22", "r1" ); @@ -357,11 +357,11 @@ static int emulate_std(struct pt_regs *regs, int frreg, int flop) "4: stw %%r1,4(%%sr1,%2)\n" "5: stw %R1,8(%%sr1,%2)\n" "6: \n" - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 6b) - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 6b) - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(3b, 6b) - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(4b, 6b) - ASM_EXCEPTIONTABLE_ENTRY_EFAULT(5b, 6b) + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 6b, "%0") + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 6b, "%0") + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(3b, 6b, "%0") + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(4b, 6b, "%0") + ASM_EXCEPTIONTABLE_ENTRY_EFAULT(5b, 6b, "%0") : "+r" (ret) : "r" (val), "r" (regs->ior), "r" (regs->isr) : "r19", "r20", "r21", "r1" ); diff --git a/arch/parisc/mm/fault.c b/arch/parisc/mm/fault.c index 2fe5b44986e0..c303b6f90e0e 100644 --- a/arch/parisc/mm/fault.c +++ b/arch/parisc/mm/fault.c @@ -150,11 +150,15 @@ int fixup_exception(struct pt_regs *regs) * Fix up get_user() and put_user(). * ASM_EXCEPTIONTABLE_ENTRY_EFAULT() sets the least-significant * bit in the relative address of the fixup routine to indicate - * that gr[ASM_EXCEPTIONTABLE_REG] should be loaded with - * -EFAULT to report a userspace access error. + * that the register, encoded in the additonal "ldi" opcode, should + * be loaded with -EFAULT to report a userspace access error. */ if (fix->fixup & 1) { - regs->gr[ASM_EXCEPTIONTABLE_REG] = -EFAULT; + int fault_error_reg = fix->err_opcode & 0x1f; + if (fault_error_reg) + regs->gr[fault_error_reg] = -EFAULT; + pr_debug("FIXUP REG %d at %pS\n", fault_error_reg, + (void*)regs->iaoq[0]); /* zero target register for get_user() */ if (parisc_acctyp(0, regs->iir) == VM_READ) { From patchwork Tue Jan 23 15:59:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Helge Deller X-Patchwork-Id: 13527714 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9E4A561685 for ; Tue, 23 Jan 2024 15:59:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706025567; cv=none; b=f4NOCSjXjnOTaonC0m/G5HriF9+5gsMDE0aYjvb6JMqABYF2fhJjJRLiBH1gN0eZnHdmXN85Es90nZ2uT+lv99LGORyp0CiY5HlVKsC+KztEjcvECAx1izrkRkdQ+QIFr44ODA+jykI9S+fa9DUu6TIUAKfiNW2L3MHFBYQKx18= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706025567; c=relaxed/simple; bh=WcpaIEMpSjU3C3PqiJDZ9DOWvjHubsEjtMySkQqBnYo=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; 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Signed-off-by: Helge Deller --- arch/parisc/kernel/unaligned.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/parisc/kernel/unaligned.c b/arch/parisc/kernel/unaligned.c index c520e551a165..95a2741f26f3 100644 --- a/arch/parisc/kernel/unaligned.c +++ b/arch/parisc/kernel/unaligned.c @@ -399,6 +399,13 @@ void handle_unaligned(struct pt_regs *regs) if (!unaligned_enabled) goto force_sigbus; + } else { + static DEFINE_RATELIMIT_STATE(kernel_ratelimit, 5 * HZ, 5); + if (!(current->thread.flags & PARISC_UAC_NOPRINT) && + __ratelimit(&kernel_ratelimit)) + pr_warn("Kernel: unaligned access to " RFMT " in %pS " + "(iir " RFMT ")\n", + regs->ior, (void *)regs->iaoq[0], regs->iir); } /* handle modification - OK, it's ugly, see the instruction manual */