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Thu, 25 Jan 2024 09:46:29 +0000 Received: from DM6PR20MB2316.namprd20.prod.outlook.com ([fe80::eada:a454:b624:1459]) by DM6PR20MB2316.namprd20.prod.outlook.com ([fe80::eada:a454:b624:1459%4]) with mapi id 15.20.7228.022; Thu, 25 Jan 2024 09:46:29 +0000 From: AnnanLiu To: chao.wei@sophgo.com, unicorn_wang@outlook.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, AnnanLiu Subject: [PATCH v2] riscv: dts: sophgo: add timer dt node for CV1800 Date: Thu, 25 Jan 2024 17:46:23 +0800 Message-ID: X-Mailer: git-send-email 2.34.1 X-TMN: [8dmQ79MD5VeY/5T3aa1ZPSLy+/pgmXnGWCBBYxXktng=] X-ClientProxiedBy: TYAPR03CA0012.apcprd03.prod.outlook.com (2603:1096:404:14::24) To DM6PR20MB2316.namprd20.prod.outlook.com (2603:10b6:5:1a8::28) X-Microsoft-Original-Message-ID: <20240125094623.27188-1-annan.liu.xdu@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6PR20MB2316:EE_|SA1PR20MB4275:EE_ X-MS-Office365-Filtering-Correlation-Id: 189da528-fd9b-4ce6-b13a-08dc1d8a8159 X-MS-Exchange-SLBlob-MailProps: vuaKsetfIZnl7OK+GjNZx76AODbk0dt+LKWMRPEIDUGU2sukGk3bH82ehqnde3qe9cpdmb3XB7DvY/pfM+yDftnEo3M0GC1iWcNKrNzPSCKS1a8MLn39lTclUQ3/2IcOB5OmkiTsIIU7R9c9r6y6ZKAouj5GfenLbEP8N1BSvAgRvY6+HUaj+gaujtz5CRTFv4qlXRXHOaRspmnA7cToXLx/8hCwRT/PFFZ2CpO/Lov5TxIorpVHpiAbBxWd1ADcdtC57AMzqCnivi/vVNfShAg8mz6o76Z30sWscguGfvEZrSk/LbEACnwkoLcFS4RGcbJSx7p2OfsfyRpFJcJtUbKd8OgWKgHwZNY0YML+bTfBObxdD5wpagNNlZoasgrV1raKY4ZP2wGI+k6kUPZBTsvoCBJ0f8DCpoVxFml0am9mhM+u1Lsv8ICnNIa499x9S4KY1k7XSGIfZwonr3Fw2vmG6gvIzMq53pn5i0CGcYMtd/FasjqLvqpveHANAc/rQFY6tCEXG1InITLcZyC9z0aLmzwTfNotsh70+KTp1gBezDXh5/C8ndF5H6WlDxZr0we+6yxFbAw1YRJDwHrS4vA5CHY0ixz6ZGyyJHWdzs/iQPHe/GyeeN1dZVzfEE6a0JX5r0MxGnRS39MqWH6g9XTUD2Gy4PTbfh2Qy1T6aZAEK1aNDqXLQkj9QCNDIEd8C9qVT38/X8TlvyYicC4ShQSm7Jv/nY7JW7kPPGcfNh6FI7fXbWjLJCvBVxPdvUzaauli35uu9mVWJUIroG5PkRhxJ1zYBukLHy7eu/7jm3lgrmq/Jj8EGDwjDxe7Aeqx X-Microsoft-Antispam: BCL:0; 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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add the timer device tree node to CV1800 SoC. Signed-off-by: AnnanLiu --- This patch depends on the clk driver and reset driver. Clk driver link: https://lore.kernel.org/all/IA1PR20MB49539CDAD9A268CBF6CA184BBB9FA@IA1PR20MB4953.namprd20.prod.outlook.com/ Reset driver link: https://lore.kernel.org/all/20231113005503.2423-1-jszhang@kernel.org/ Changes since v1: - Change the status of the timer from disabled to okay. v1 link: https://lore.kernel.org/all/DM6PR20MB23167E08FCA546D6C1899CB1AB9EA@DM6PR20MB2316.namprd20.prod.outlook.com/ arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 73 +++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi index aec6401a467b..aef7970af2b8 100644 --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi @@ -1,6 +1,7 @@ // SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright (C) 2023 Jisheng Zhang + * Copyright (C) 2024 Annan Liu */ #include @@ -113,6 +114,78 @@ plic: interrupt-controller@70000000 { riscv,ndev = <101>; }; + timer0: timer@030a0000 { + compatible = "snps,dw-apb-timer"; + reg = <0x030a0000 0x14>; + interrupts = <79 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc>; + resets = <&rst RST_TIMER0>; + status = "okay"; + }; + + timer1: timer@030a0014 { + compatible = "snps,dw-apb-timer"; + reg = <0x030a0014 0x14>; + interrupts = <80 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc>; + resets = <&rst RST_TIMER1>; + status = "disabled"; + }; + + timer2: timer@030a0028 { + compatible = "snps,dw-apb-timer"; + reg = <0x030a0028 0x14>; + interrupts = <81 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc>; + resets = <&rst RST_TIMER2>; + status = "disabled"; + }; + + timer3: timer@030a003c { + compatible = "snps,dw-apb-timer"; + reg = <0x030a003c 0x14>; + interrupts = <82 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc>; + resets = <&rst RST_TIMER3>; + status = "disabled"; + }; + + timer4: timer@030a0050 { + compatible = "snps,dw-apb-timer"; + reg = <0x030a0050 0x14>; + interrupts = <83 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc>; + resets = <&rst RST_TIMER4>; + status = "disabled"; + }; + + timer5: timer@30a0064 { + compatible = "snps,dw-apb-timer"; + reg = <0x030a0064 0x14>; + interrupts = <84 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc>; + resets = <&rst RST_TIMER5>; + status = "disabled"; + }; + + timer6: timer@030a0078 { + compatible = "snps,dw-apb-timer"; + reg = <0x030a0078 0x14>; + interrupts = <85 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc>; + resets = <&rst RST_TIMER6>; + status = "disabled"; + }; + + timer7: timer@030a008c { + compatible = "snps,dw-apb-timer"; + reg = <0x030a008c 0x14>; + interrupts = <86 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc>; + resets = <&rst RST_TIMER7>; + status = "disabled"; + }; + clint: timer@74000000 { compatible = "sophgo,cv1800b-clint", "thead,c900-clint"; reg = <0x74000000 0x10000>;