From patchwork Fri Jan 26 10:54:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13532399 X-Patchwork-Delegate: geert@linux-m68k.org Received: from michel.telenet-ops.be (michel.telenet-ops.be [195.130.137.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB4D512B87 for ; Fri, 26 Jan 2024 10:56:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.130.137.88 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706266610; cv=none; b=rtpsB01nIUw0JQN5ZnUbNgkRZ54EF1YV6cn3HF0pINuMbfMd1twCxF85ARS+SltA+65zDy3u9EPhdydUozBbjtjBmbbOewYgMQ/zU/EOekLJfPhYjmqe/X3m41vk2NGfAM4MnQKBSe2s5w5yfxngKOVkQxEdYj674Cqm1IGK5JE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706266610; c=relaxed/simple; bh=yZOiRRTPVipN07cXIuQE2itjTVny72CP+GnB2illhVU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=FbarDVKEYU0YlU22XoLVqmoZDG5RmrhVDDWejUU32PUt1EhEDQpHVrxvpQPmJAWtKw5xB3gWkTHB32rMHN/TjYK8DqvymRzy08UWdnNFE0ydihuvJmN8sl0xdCL1u5K9k/TgiCA/QsQgFQi2uAUnMWmxCwLr8cD6smPOEoVTmLY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be; spf=none smtp.mailfrom=linux-m68k.org; arc=none smtp.client-ip=195.130.137.88 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed40:8d64:ae04:ce87:de06]) by michel.telenet-ops.be with bizsmtp id fNwm2B0011AdMdB06NwmHa; Fri, 26 Jan 2024 11:56:46 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1rTJsJ-00GWgB-L4; Fri, 26 Jan 2024 11:56:45 +0100 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1rTJrQ-00G5bw-Fh; Fri, 26 Jan 2024 11:55:00 +0100 From: Geert Uytterhoeven To: Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Hai Pham , Geert Uytterhoeven Subject: [PATCH 1/2] arm64: dts: renesas: r8a779h0: Add pinctrl device node Date: Fri, 26 Jan 2024 11:54:57 +0100 Message-Id: <0ab32290014b64ddbee5c9ec2808c8294d0b6192.1706266286.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Hai Pham Add a device node for the Pin Function Controller on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Hai Pham Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi index a082e2d06b696019..f59d0dd25ca93822 100644 --- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi @@ -59,6 +59,14 @@ soc: soc { #size-cells = <2>; ranges; + pfc: pinctrl@e6050000 { + compatible = "renesas,pfc-r8a779h0"; + reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, + <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, + <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, + <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>; + }; + cpg: clock-controller@e6150000 { compatible = "renesas,r8a779h0-cpg-mssr"; reg = <0 0xe6150000 0 0x4000>; From patchwork Fri Jan 26 10:54:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13532403 X-Patchwork-Delegate: geert@linux-m68k.org Received: from baptiste.telenet-ops.be (baptiste.telenet-ops.be [195.130.132.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E8F812B7C for ; Fri, 26 Jan 2024 10:56:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.130.132.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706266612; cv=none; b=TMidQEW6duCI0ddOk0jb4lNoqh+jpT9K2mqmiRFvfdflNy18L+NM8FESZYTFXHi0U5LaiULBCXydUKMRD9YxE9dddG7wdB3jnuaYc6W/SCinIIf49mrekYvKeuSd3rhts/9tdSdFZbK5Ccl/DBl1Q26dQc0cEC5ymRiZPcGNGJ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706266612; c=relaxed/simple; bh=WVX5zehP1oLA9qOPwOE658bPaXbp2Ne7D7iDtpVP8MQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=f5m58/BvpxWn7DJ3wDlEQronhHfEenQbyeb3JUAIWEKmeUUhOQV+NuJ3ez3YBSyx+3CmIZBfGPYICCJ5yN1kcCmfrglsHcr8chRPoDxaUIBi8ouJILiK/joVmLcGcfv5lL4TpKX7r+Ojvo+Q+PI4eNN46m/zb5zlH6NuDQ1+Ykk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be; spf=none smtp.mailfrom=linux-m68k.org; arc=none smtp.client-ip=195.130.132.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed40:8d64:ae04:ce87:de06]) by baptiste.telenet-ops.be with bizsmtp id fNwm2B0051AdMdB01Nwmk8; Fri, 26 Jan 2024 11:56:46 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1rTJsJ-00GWgH-RJ; Fri, 26 Jan 2024 11:56:45 +0100 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1rTJrQ-00G5c1-HH; Fri, 26 Jan 2024 11:55:00 +0100 From: Geert Uytterhoeven To: Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH 2/2] arm64: dts: renesas: gray-hawk-single: Add serial console pin control Date: Fri, 26 Jan 2024 11:54:58 +0100 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Complete the descriptions of the serial console and the external serial clock by adding pin control. Based on patches for Gray Hawk in the BSP by Hai Pham and Nghia Nguyen. Signed-off-by: Geert Uytterhoeven --- .../dts/renesas/r8a779h0-gray-hawk-single.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts index 1ed404712d823871..716cb7622f167973 100644 --- a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts +++ b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts @@ -43,10 +43,28 @@ &extalr_clk { }; &hscif0 { + pinctrl-0 = <&hscif0_pins>; + pinctrl-names = "default"; + uart-has-rtscts; status = "okay"; }; +&pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + + hscif0_pins: hscif0 { + groups = "hscif0_data", "hscif0_ctrl"; + function = "hscif0"; + }; + + scif_clk_pins: scif_clk { + groups = "scif_clk"; + function = "scif_clk"; + }; +}; + &scif_clk { clock-frequency = <24000000>; };