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In order to support tertiary match group, this patch decouples the registers and the groups. Allocation is changed to dynamic but it's still per mesh instance rather than per node. Signed-off-by: Ilkka Koskinen --- drivers/perf/arm-cmn.c | 52 ++++++++++++++++++++++++++++++++++-------- 1 file changed, 43 insertions(+), 9 deletions(-) diff --git a/drivers/perf/arm-cmn.c b/drivers/perf/arm-cmn.c index c584165b13ba..93eb47ea7e25 100644 --- a/drivers/perf/arm-cmn.c +++ b/drivers/perf/arm-cmn.c @@ -591,6 +591,7 @@ struct arm_cmn_hw_event { u8 dtm_offset; bool wide_sel; enum cmn_filter_select filter_sel; + int wp_idx; }; #define for_each_hw_dn(hw, dn, i) \ @@ -1337,7 +1338,35 @@ static const struct attribute_group *arm_cmn_attr_groups[] = { static int arm_cmn_wp_idx(struct perf_event *event) { - return CMN_EVENT_EVENTID(event) + CMN_EVENT_WP_GRP(event); + struct arm_cmn_hw_event *hw = to_cmn_hw(event); + + return hw->wp_idx; +} + +static int arm_cmn_wp_idx_unused(struct perf_event *event, struct arm_cmn_dtm *dtm, + struct arm_cmn_dtc *dtc) +{ + struct arm_cmn_hw_event *hw = to_cmn_hw(event); + int idx, tmp, direction = CMN_EVENT_EVENTID(event); + + /* + * Examine wp 0 & 1 for the up direction, + * examine wp 2 & 3 for the down direction + */ + for (idx = direction; idx < direction + 2; idx++) + if (dtm->wp_event[idx] < 0) + break; + + if (idx == direction + 2) + return -ENOSPC; + + tmp = dtm->wp_event[idx ^ 1]; + if (tmp >= 0 && CMN_EVENT_WP_COMBINE(event) != + CMN_EVENT_WP_COMBINE(dtc->counters[tmp])) + return -ENOSPC; + + hw->wp_idx = idx; + return hw->wp_idx; } static u32 arm_cmn_wp_config(struct perf_event *event) @@ -1785,6 +1814,8 @@ static void arm_cmn_event_clear(struct arm_cmn *cmn, struct perf_event *event, for_each_hw_dtc_idx(hw, j, idx) cmn->dtc[j].counters[idx] = NULL; + + hw->wp_idx = -1; } static int arm_cmn_event_add(struct perf_event *event, int flags) @@ -1794,6 +1825,7 @@ static int arm_cmn_event_add(struct perf_event *event, int flags) struct arm_cmn_node *dn; enum cmn_node_type type = CMN_EVENT_TYPE(event); unsigned int input_sel, i = 0; + int wp_idx; if (type == CMN_TYPE_DTC) { while (cmn->dtc[i].cycles) @@ -1822,6 +1854,7 @@ static int arm_cmn_event_add(struct perf_event *event, int flags) } /* ...then the local counters to feed them */ + wp_idx = -1; for_each_hw_dn(hw, dn, i) { struct arm_cmn_dtm *dtm = &cmn->dtms[dn->dtm] + hw->dtm_offset; unsigned int dtm_idx, shift, d = max_t(int, dn->dtc, 0); @@ -1835,16 +1868,17 @@ static int arm_cmn_event_add(struct perf_event *event, int flags) if (type == CMN_TYPE_XP) { input_sel = CMN__PMEVCNT0_INPUT_SEL_XP + dtm_idx; } else if (type == CMN_TYPE_WP) { - int tmp, wp_idx = arm_cmn_wp_idx(event); u32 cfg = arm_cmn_wp_config(event); - if (dtm->wp_event[wp_idx] >= 0) - goto free_dtms; - - tmp = dtm->wp_event[wp_idx ^ 1]; - if (tmp >= 0 && CMN_EVENT_WP_COMBINE(event) != - CMN_EVENT_WP_COMBINE(cmn->dtc[d].counters[tmp])) - goto free_dtms; + /* + * wp_config register index is currently allocated per + * mesh instance rather than per node. + */ + if (wp_idx < 0) { + wp_idx = arm_cmn_wp_idx_unused(event, dtm, &cmn->dtc[d]); + if (wp_idx < 0) + goto free_dtms; + } input_sel = CMN__PMEVCNT0_INPUT_SEL_WP + wp_idx; dtm->wp_event[wp_idx] = hw->dtc_idx[d]; From patchwork Fri Jan 26 22:12:14 2024 Content-Type: text/plain; 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Thus, prepare for it by making also the parameters model specific. Signed-off-by: Ilkka Koskinen --- drivers/perf/arm-cmn.c | 45 +++++++++++++++++++++++++++++------------- 1 file changed, 31 insertions(+), 14 deletions(-) diff --git a/drivers/perf/arm-cmn.c b/drivers/perf/arm-cmn.c index 93eb47ea7e25..dc6370396ad0 100644 --- a/drivers/perf/arm-cmn.c +++ b/drivers/perf/arm-cmn.c @@ -628,6 +628,7 @@ struct arm_cmn_event_attr { struct arm_cmn_format_attr { struct device_attribute attr; + enum cmn_model model; u64 field; int config; }; @@ -1265,29 +1266,44 @@ static ssize_t arm_cmn_format_show(struct device *dev, return sysfs_emit(buf, "config%d:%d-%d\n", fmt->config, lo, hi); } -#define _CMN_FORMAT_ATTR(_name, _cfg, _fld) \ +static umode_t arm_cmn_format_attr_is_visible(struct kobject *kobj, + struct attribute *attr, + int unused) +{ + struct device *dev = kobj_to_dev(kobj); + struct arm_cmn *cmn = to_cmn(dev_get_drvdata(dev)); + struct arm_cmn_format_attr *fmt = container_of(attr, typeof(*fmt), attr.attr); + + if (!(fmt->model & arm_cmn_model(cmn))) + return 0; + + return attr->mode; +} + +#define _CMN_FORMAT_ATTR(_model, _name, _cfg, _fld) \ (&((struct arm_cmn_format_attr[]) {{ \ .attr = __ATTR(_name, 0444, arm_cmn_format_show, NULL), \ + .model = _model, \ .config = _cfg, \ .field = _fld, \ }})[0].attr.attr) -#define CMN_FORMAT_ATTR(_name, _fld) _CMN_FORMAT_ATTR(_name, 0, _fld) +#define CMN_FORMAT_ATTR(_model, _name, _fld) _CMN_FORMAT_ATTR(_model, _name, 0, _fld) static struct attribute *arm_cmn_format_attrs[] = { - CMN_FORMAT_ATTR(type, CMN_CONFIG_TYPE), - CMN_FORMAT_ATTR(eventid, CMN_CONFIG_EVENTID), - CMN_FORMAT_ATTR(occupid, CMN_CONFIG_OCCUPID), - CMN_FORMAT_ATTR(bynodeid, CMN_CONFIG_BYNODEID), - CMN_FORMAT_ATTR(nodeid, CMN_CONFIG_NODEID), + CMN_FORMAT_ATTR(CMN_ANY, type, CMN_CONFIG_TYPE), + CMN_FORMAT_ATTR(CMN_ANY, eventid, CMN_CONFIG_EVENTID), + CMN_FORMAT_ATTR(CMN_ANY, occupid, CMN_CONFIG_OCCUPID), + CMN_FORMAT_ATTR(CMN_ANY, bynodeid, CMN_CONFIG_BYNODEID), + CMN_FORMAT_ATTR(CMN_ANY, nodeid, CMN_CONFIG_NODEID), - CMN_FORMAT_ATTR(wp_dev_sel, CMN_CONFIG_WP_DEV_SEL), - CMN_FORMAT_ATTR(wp_chn_sel, CMN_CONFIG_WP_CHN_SEL), - CMN_FORMAT_ATTR(wp_grp, CMN_CONFIG_WP_GRP), - CMN_FORMAT_ATTR(wp_exclusive, CMN_CONFIG_WP_EXCLUSIVE), - CMN_FORMAT_ATTR(wp_combine, CMN_CONFIG_WP_COMBINE), + CMN_FORMAT_ATTR(CMN_ANY, wp_dev_sel, CMN_CONFIG_WP_DEV_SEL), + CMN_FORMAT_ATTR(CMN_ANY, wp_chn_sel, CMN_CONFIG_WP_CHN_SEL), + CMN_FORMAT_ATTR(CMN_ANY, wp_grp, CMN_CONFIG_WP_GRP), + CMN_FORMAT_ATTR(CMN_ANY, wp_exclusive, CMN_CONFIG_WP_EXCLUSIVE), + CMN_FORMAT_ATTR(CMN_ANY, wp_combine, CMN_CONFIG_WP_COMBINE), - _CMN_FORMAT_ATTR(wp_val, 1, CMN_CONFIG1_WP_VAL), - _CMN_FORMAT_ATTR(wp_mask, 2, CMN_CONFIG2_WP_MASK), + _CMN_FORMAT_ATTR(CMN_ANY, wp_val, 1, CMN_CONFIG1_WP_VAL), + _CMN_FORMAT_ATTR(CMN_ANY, wp_mask, 2, CMN_CONFIG2_WP_MASK), NULL }; @@ -1295,6 +1311,7 @@ static struct attribute *arm_cmn_format_attrs[] = { static const struct attribute_group arm_cmn_format_attrs_group = { .name = "format", .attrs = arm_cmn_format_attrs, + .is_visible = arm_cmn_format_attr_is_visible, }; static ssize_t arm_cmn_cpumask_show(struct device *dev, From patchwork Fri Jan 26 22:12:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilkka Koskinen X-Patchwork-Id: 13533406 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 70DD0C47422 for ; Fri, 26 Jan 2024 22:13:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; 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Fri, 26 Jan 2024 22:13:06 +0000 From: Ilkka Koskinen To: Robin Murphy , Will Deacon , Mark Rutland Cc: Ilkka Koskinen , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] perf/arm-cmn: Enable support for tertiary match group Date: Fri, 26 Jan 2024 14:12:15 -0800 Message-Id: <20240126221215.1537377-4-ilkka@os.amperecomputing.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240126221215.1537377-1-ilkka@os.amperecomputing.com> References: <20240126221215.1537377-1-ilkka@os.amperecomputing.com> X-ClientProxiedBy: CH5P221CA0002.NAMP221.PROD.OUTLOOK.COM (2603:10b6:610:1f2::27) To PH0PR01MB8166.prod.exchangelabs.com (2603:10b6:510:293::17) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH0PR01MB8166:EE_|PH0PR01MB7491:EE_ X-MS-Office365-Filtering-Correlation-Id: f8a660bd-d315-4bd8-8535-08dc1ebbf909 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: fajeldIIdIIIbSYQOdtbozQK1s97E83CMS47XcPIs3ooNHo4LbJm/cFhQaga3dnbxNr7S9P5FpqfkzVXuKt7ZclYN/vQkbCmHc0FR4PSqI8UumgnApYg9Dls37X5P6EmWToJFIO+TH0E+uVKRtFY4jJxwetMpDWWFrXHWKlSHQzqATnT73ScSNQ1Xy3wOdx5tngn+LSVhZ7onJCbkpzXyBVr7H6Izor7D0d/9LcLmTq0DaP1vQ0+nv1uphW6lmNT1RUspetMJGtRSSEJa2BsgvTk5aVmKGTv/kNM1PRElzhWEhEEn5OomWS29pPnKHVjCnQijtJKArDJH5Sicrl+p7fZ7uFMTFtP7+OgXtI01fEEBQHS64HG25KoRSony/5smbzpmWOqOwrPQcl8aCH4KwweA+Q+oV5f6aQeJsAvhX8h88Eofoio1zMga9ixxvRDhil7Z2nOJXF9voRcCWv7sUCEFegVX+qMfMfYeUSq/ftYui1QPw+FHg3zlhQO5ddVam2/z18r8uw4MVFZ5Y+xkS366NCFJXoikEILlViBd8J5aVDFbRw3Z9UH6bPdkDavn69EsbNKHXlViwCwMEYYgbe+vPVpcl0MqhtdaXxw/Yexe62fBKX65eF24EwQce6R X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PH0PR01MB8166.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(13230031)(376002)(39850400004)(136003)(366004)(396003)(346002)(230922051799003)(64100799003)(186009)(1800799012)(451199024)(5660300002)(66476007)(8936002)(2906002)(66946007)(8676002)(316002)(4326008)(66556008)(86362001)(110136005)(41300700001)(478600001)(6486002)(1076003)(83380400001)(6512007)(52116002)(38100700002)(38350700005)(6666004)(2616005)(6506007)(26005);DIR:OUT;SFP:1102; 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Signed-off-by: Ilkka Koskinen --- drivers/perf/arm-cmn.c | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/perf/arm-cmn.c b/drivers/perf/arm-cmn.c index dc6370396ad0..ce9fbdcf6144 100644 --- a/drivers/perf/arm-cmn.c +++ b/drivers/perf/arm-cmn.c @@ -91,10 +91,13 @@ #define CMN600_WPn_CONFIG_WP_COMBINE BIT(6) #define CMN600_WPn_CONFIG_WP_EXCLUSIVE BIT(5) #define CMN_DTM_WPn_CONFIG_WP_GRP GENMASK_ULL(5, 4) +#define CMN600_WPn_CONFIG_WP_GRP BIT(4) #define CMN_DTM_WPn_CONFIG_WP_CHN_SEL GENMASK_ULL(3, 1) #define CMN_DTM_WPn_CONFIG_WP_DEV_SEL BIT(0) #define CMN_DTM_WPn_VAL(n) (CMN_DTM_WPn(n) + 0x08) #define CMN_DTM_WPn_MASK(n) (CMN_DTM_WPn(n) + 0x10) +#define CMN_DTM_WP_CHN_SEL_REQ_VC 0 +#define CMN_DTM_WP_GRP_TERTIARY 0x2 #define CMN_DTM_PMU_CONFIG 0x210 #define CMN__PMEVCNT0_INPUT_SEL GENMASK_ULL(37, 32) @@ -175,8 +178,8 @@ #define CMN_CONFIG_WP_DEV_SEL GENMASK_ULL(50, 48) #define CMN_CONFIG_WP_CHN_SEL GENMASK_ULL(55, 51) /* Note that we don't yet support the tertiary match group on newer IPs */ -#define CMN_CONFIG_WP_GRP BIT_ULL(56) -#define CMN_CONFIG_WP_EXCLUSIVE BIT_ULL(57) +#define CMN_CONFIG_WP_GRP GENMASK_ULL(57, 56) +#define CMN_CONFIG_WP_EXCLUSIVE BIT_ULL(58) #define CMN_CONFIG1_WP_VAL GENMASK_ULL(63, 0) #define CMN_CONFIG2_WP_MASK GENMASK_ULL(63, 0) @@ -1298,7 +1301,9 @@ static struct attribute *arm_cmn_format_attrs[] = { CMN_FORMAT_ATTR(CMN_ANY, wp_dev_sel, CMN_CONFIG_WP_DEV_SEL), CMN_FORMAT_ATTR(CMN_ANY, wp_chn_sel, CMN_CONFIG_WP_CHN_SEL), - CMN_FORMAT_ATTR(CMN_ANY, wp_grp, CMN_CONFIG_WP_GRP), + CMN_FORMAT_ATTR(CMN600, wp_grp, CMN600_WPn_CONFIG_WP_GRP), + CMN_FORMAT_ATTR(NOT_CMN600, wp_grp, CMN_CONFIG_WP_GRP), + CMN_FORMAT_ATTR(CMN_ANY, wp_exclusive, CMN_CONFIG_WP_EXCLUSIVE), CMN_FORMAT_ATTR(CMN_ANY, wp_combine, CMN_CONFIG_WP_COMBINE), @@ -1398,8 +1403,11 @@ static u32 arm_cmn_wp_config(struct perf_event *event) config = FIELD_PREP(CMN_DTM_WPn_CONFIG_WP_DEV_SEL, dev) | FIELD_PREP(CMN_DTM_WPn_CONFIG_WP_CHN_SEL, chn) | - FIELD_PREP(CMN_DTM_WPn_CONFIG_WP_GRP, grp) | FIELD_PREP(CMN_DTM_WPn_CONFIG_WP_DEV_SEL2, dev >> 1); + + if (grp) + config |= is_cmn600 ? CMN600_WPn_CONFIG_WP_GRP : + FIELD_PREP(CMN_DTM_WPn_CONFIG_WP_GRP, grp); if (exc) config |= is_cmn600 ? CMN600_WPn_CONFIG_WP_EXCLUSIVE : CMN_DTM_WPn_CONFIG_WP_EXCLUSIVE; @@ -1764,6 +1772,13 @@ static int arm_cmn_event_init(struct perf_event *event) /* ...and we need a "real" direction */ if (eventid != CMN_WP_UP && eventid != CMN_WP_DOWN) return -EINVAL; + + if (cmn->part != PART_CMN600) + if (CMN_EVENT_WP_GRP(event) > CMN_DTM_WP_GRP_TERTIARY || + (CMN_EVENT_WP_GRP(event) == CMN_DTM_WP_GRP_TERTIARY && + CMN_EVENT_WP_CHN_SEL(event) != CMN_DTM_WP_CHN_SEL_REQ_VC)) + return -EINVAL; + /* ...but the DTM may depend on which port we're watching */ if (cmn->multi_dtm) hw->dtm_offset = CMN_EVENT_WP_DEV_SEL(event) / 2;