From patchwork Tue Feb 19 06:36:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 10819319 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0D17A17E9 for ; Tue, 19 Feb 2019 06:36:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EBA872B50E for ; Tue, 19 Feb 2019 06:36:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D0DBC2B5C8; Tue, 19 Feb 2019 06:36:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 14CF32B50E for ; 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Tue, 19 Feb 2019 00:35:24 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Tue, 19 Feb 2019 00:35:24 -0600 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x1J6ZCsx025516; Tue, 19 Feb 2019 00:35:19 -0600 From: Vignesh R To: Vignesh R , David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , Rob Herring Subject: [RFC PATCH 1/5] mtd: cfi_cmdset_0002: Add support for polling status register Date: Tue, 19 Feb 2019 12:06:03 +0530 Message-ID: <20190219063607.29949-2-vigneshr@ti.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190219063607.29949-1-vigneshr@ti.com> References: <20190219063607.29949-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190218_223540_737052_046BFD8E X-CRM114-Status: GOOD ( 23.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Arnd Bergmann , tudor.ambarus@microchip.com, Greg Kroah-Hartman , nsekhar@ti.com, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP HyperFlash devices are compliant with CFI AMD/Fujitsu Extended Command Set(0x0002) for flash operations, therefore drivers/mtd/chips/cfi_cmdset_0002.c can be use as is. But these devices do not support DQ polling method of determining chip ready/good status. These flashes provide Status Register whose bits can be polled to know status of flash operation. Cypress HyperFlash datasheet here[1], talks about CFI Amd/Fujitsu Extended Query version 1.5. Bit 0 of "Software Features supported" field of CFI Primary Vendor-Specific Extended Query table indicates presence/absence of status register and Bit 1 indicates whether or not DQ polling is supported. Using these bits, its possible to determine whether flash supports DQ polling or need to use Status Register. Add support for polling status register to know device ready/status of erase/write operations when DQ polling is not supported. [1] https://www.cypress.com/file/213346/download Signed-off-by: Vignesh R --- Note: PRI extended query table size is bigger on 1.5 than on older revision. Not sure if this causes problems on older rev. because of reading beyond current size. drivers/mtd/chips/cfi_cmdset_0002.c | 50 +++++++++++++++++++++++++++++ include/linux/mtd/cfi.h | 5 +++ 2 files changed, 55 insertions(+) diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c index 72428b6bfc47..7a4ef0237750 100644 --- a/drivers/mtd/chips/cfi_cmdset_0002.c +++ b/drivers/mtd/chips/cfi_cmdset_0002.c @@ -49,6 +49,14 @@ #define SST49LF008A 0x005a #define AT49BV6416 0x00d6 +/* + * Bits of Status Register definition for flash devices that don't + * support DQ polling (Eg.: Hyperflash) + */ +#define CFI_SR_DRB BIT(7) +#define CFI_SR_ESB BIT(5) +#define CFI_SR_PSB BIT(4) + static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); @@ -97,6 +105,18 @@ static struct mtd_chip_driver cfi_amdstd_chipdrv = { .module = THIS_MODULE }; +/* + * Use status register to poll for Erase/write completion when DQ is not + * supported. This is indicated by Bit[1:0] of SoftwareFeatures field in + * CFI Primary Vendor-Specific Extended Query table 1.5 + */ +static int cfi_use_status_reg(struct cfi_private *cfi) +{ + struct cfi_pri_amdstd *extp = cfi->cmdset_priv; + + return (extp->MinorVersion >= '5') && + ((extp->SoftwareFeatures & 0x11) == 1); +} /* #define DEBUG_CFI_FEATURES */ @@ -744,8 +764,21 @@ static struct mtd_info *cfi_amdstd_setup(struct mtd_info *mtd) */ static int __xipram chip_ready(struct map_info *map, unsigned long addr) { + struct cfi_private *cfi = map->fldrv_priv; map_word d, t; + if (cfi_use_status_reg(cfi)) { + /* + * For chips that support status register, check device + * ready bit + */ + cfi_send_gen_cmd(0x70, cfi->addr_unlock1, 0, map, cfi, + cfi->device_type, NULL); + d = map_read(map, addr); + + return (d.x[0] & CFI_SR_DRB); + } + d = map_read(map, addr); t = map_read(map, addr); @@ -769,8 +802,25 @@ static int __xipram chip_ready(struct map_info *map, unsigned long addr) */ static int __xipram chip_good(struct map_info *map, unsigned long addr, map_word expected) { + struct cfi_private *cfi = map->fldrv_priv; map_word oldd, curd; + if (cfi_use_status_reg(cfi)) { + /* + * For chips that support status register, check device + * ready bit and Erase/Program status bit to know if + * operation succeeded. + */ + cfi_send_gen_cmd(0x70, cfi->addr_unlock1, 0, map, cfi, + cfi->device_type, NULL); + curd = map_read(map, addr); + + if (curd.x[0] & CFI_SR_DRB) + return !(curd.x[0] & (CFI_SR_PSB | CFI_SR_ESB)); + + return 0; + } + oldd = map_read(map, addr); curd = map_read(map, addr); diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h index cbf77168658c..92ac82ac2329 100644 --- a/include/linux/mtd/cfi.h +++ b/include/linux/mtd/cfi.h @@ -233,6 +233,11 @@ struct cfi_pri_amdstd { uint8_t VppMin; uint8_t VppMax; uint8_t TopBottom; + /* Below field are added from version 1.5 */ + uint8_t ProgramSuspend; + uint8_t UnlockBypass; + uint8_t SecureSiliconSector; + uint8_t SoftwareFeatures; } __packed; /* Vendor-Specific PRI for Atmel chips (command set 0x0002) */ From patchwork Tue Feb 19 06:36:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 10819317 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6C32314E1 for ; Tue, 19 Feb 2019 06:35:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 56B1E2B5A6 for ; Tue, 19 Feb 2019 06:35:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4A8D12B5C8; Tue, 19 Feb 2019 06:35:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C1BB92B5A6 for ; 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Tue, 19 Feb 2019 00:35:29 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Tue, 19 Feb 2019 00:35:29 -0600 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x1J6ZCt0025516; Tue, 19 Feb 2019 00:35:24 -0600 From: Vignesh R To: Vignesh R , David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , Rob Herring Subject: [RFC PATCH 2/5] dt-bindings: mtd: Add binding documentation for Hyperbus memory devices Date: Tue, 19 Feb 2019 12:06:04 +0530 Message-ID: <20190219063607.29949-3-vigneshr@ti.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190219063607.29949-1-vigneshr@ti.com> References: <20190219063607.29949-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190218_223540_947031_DB967821 X-CRM114-Status: GOOD ( 16.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Arnd Bergmann , tudor.ambarus@microchip.com, Greg Kroah-Hartman , nsekhar@ti.com, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add DT binding documentation for Hyperbus memory devices. For now only Hyperflash is supported. Signed-off-by: Vignesh R --- Documentation/devicetree/bindings/mtd/cypress,hyperbus.txt | 6 ++++++ 1 file changed, 6 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/cypress,hyperbus.txt diff --git a/Documentation/devicetree/bindings/mtd/cypress,hyperbus.txt b/Documentation/devicetree/bindings/mtd/cypress,hyperbus.txt new file mode 100644 index 000000000000..cb408f80b868 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/cypress,hyperbus.txt @@ -0,0 +1,6 @@ +Bindings for Hyperflash NOR flash chips compliant with Cypress Hyperbus +specification and supports Cypress CFI specification 1.5 command set. + +Required properties: +- compatible : "cypress,hyperflash" for Hyperflash NOR chips +- reg : Address where flash's memory mapped space From patchwork Tue Feb 19 06:36:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 10819321 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AECDE17E9 for ; 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Tue, 19 Feb 2019 00:35:30 -0600 From: Vignesh R To: Vignesh R , David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , Rob Herring Subject: [RFC PATCH 3/5] mtd: Add support for Hyperbus memory devices Date: Tue, 19 Feb 2019 12:06:05 +0530 Message-ID: <20190219063607.29949-4-vigneshr@ti.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190219063607.29949-1-vigneshr@ti.com> References: <20190219063607.29949-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190218_223542_863831_834DD7FC X-CRM114-Status: GOOD ( 28.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Arnd Bergmann , tudor.ambarus@microchip.com, Greg Kroah-Hartman , nsekhar@ti.com, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Cypress HyperBus is Low Signal Count, High Performance Double Data Rate Bus interface between a host system master and one or more slave interfaces. HyperBus is used to connect microprocessor, microcontroller, or ASIC devices with random access NOR flash memory(called HyperFlash) or self refresh DRAM(called HyperRAM). Its a 8-bit data bus (DQ[7:0]) with Read-Write Data Strobe (RWDS) signal and either Single-ended clock(3.0V parts) or Differential clock (1.8V parts). It uses ChipSelect lines to select b/w multiple slaves. At bus level, it follows a separate protocol described in HyperBus specification[1]. HyperFlash follows CFI AMD/Fujitsu Extended Command Set (0x0002) similar to that of existing parallel NORs. Since Hyperbus is x8 DDR bus, its equivalent to x16 parallel NOR flash wrt bits per clk. But Hyperbus operates at >166MHz frequencies. HyperRAM provides direct random read/write access to flash memory array. But, Hyperbus memory controllers seem to abstract implementation details and expose a simple MMIO interface to access connected flash. Add support for registering HyperFlash devices with MTD framework. MTD maps framework along with CFI chip support framework are used to support communicate with flash. Framework is modelled along the lines of spi-nor framework. HyperBus memory controller(HBMC) drivers call hb_register_device() to register a single HyperFlash device. HyperFlash core parses MMIO access information from DT, sets up the map_info struct, probes CFI flash and registers it with MTD framework. Some HBMC masters need calibration/training sequence[3] to be carried out, in order for DLL inside the controller to lock, by reading a known string/pattern. This is done by repeatedly reading CFI Query Identification String. Calibration needs to be done before try to detect flash as part of CFI flash probe. HyperRAM is not supported atm. HyperBus specification can be found at[1] HyperFlash datasheet can be found at[2] [1] https://www.cypress.com/file/213356/download [2] https://www.cypress.com/file/213346/download [3] http://www.ti.com/lit/ug/spruid7b/spruid7b.pdf Table 12-5741. HyperFlash Access Sequence Signed-off-by: Vignesh R --- MAINTAINERS | 7 ++ drivers/mtd/Kconfig | 2 + drivers/mtd/Makefile | 1 + drivers/mtd/hyperbus/Kconfig | 23 +++++ drivers/mtd/hyperbus/Makefile | 4 + drivers/mtd/hyperbus/core.c | 167 ++++++++++++++++++++++++++++++++++ include/linux/mtd/hyperbus.h | 73 +++++++++++++++ 7 files changed, 277 insertions(+) create mode 100644 drivers/mtd/hyperbus/Kconfig create mode 100644 drivers/mtd/hyperbus/Makefile create mode 100644 drivers/mtd/hyperbus/core.c create mode 100644 include/linux/mtd/hyperbus.h diff --git a/MAINTAINERS b/MAINTAINERS index 08bf7418a97f..0808c22807bc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7143,6 +7143,13 @@ F: include/uapi/linux/hyperv.h F: tools/hv/ F: Documentation/ABI/stable/sysfs-bus-vmbus +HYPERBUS SUPPORT +M: Vignesh R +S: Supported +F: drivers/mtd/hyperbus/ +F: include/linux/mtd/hyperbus.h +F: Documentation/devicetree/bindings/mtd/cypress,hyperbus.txt + HYPERVISOR VIRTUAL CONSOLE DRIVER L: linuxppc-dev@lists.ozlabs.org S: Odd Fixes diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 79a8ff542883..a915ff300390 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -290,4 +290,6 @@ source "drivers/mtd/spi-nor/Kconfig" source "drivers/mtd/ubi/Kconfig" +source "drivers/mtd/hyperbus/Kconfig" + endif # MTD diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile index 58fc327a5276..04c154906631 100644 --- a/drivers/mtd/Makefile +++ b/drivers/mtd/Makefile @@ -35,3 +35,4 @@ obj-y += chips/ lpddr/ maps/ devices/ nand/ tests/ obj-$(CONFIG_MTD_SPI_NOR) += spi-nor/ obj-$(CONFIG_MTD_UBI) += ubi/ +obj-$(CONFIG_MTD_HYPERBUS) += hyperbus/ diff --git a/drivers/mtd/hyperbus/Kconfig b/drivers/mtd/hyperbus/Kconfig new file mode 100644 index 000000000000..02c38afc5c50 --- /dev/null +++ b/drivers/mtd/hyperbus/Kconfig @@ -0,0 +1,23 @@ +menuconfig MTD_HYPERBUS + tristate "Hyperbus support" + select MTD_CFI + select MTD_MAP_BANK_WIDTH_2 + select MTD_CFI_AMDSTD + select MTD_COMPLEX_MAPPINGS + help + This is the framework for the Hyperbus which can be used by + the Hyperbus Controller driver to commmunicate with + Hyperflash. See Cypress Hyperbus specification for more + details + + +if MTD_HYPERBUS + +config HBMC_AM654 + tristate "Hyperbus controller driver for AM65x SoC" + help + This is the driver for Hyperbus controller on TI's AM65x and + other SoCs + +endif # MTD_HYPERBUS + diff --git a/drivers/mtd/hyperbus/Makefile b/drivers/mtd/hyperbus/Makefile new file mode 100644 index 000000000000..64e377d7f636 --- /dev/null +++ b/drivers/mtd/hyperbus/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-$(CONFIG_MTD_HYPERBUS) += core.o +obj-$(CONFIG_HBMC_AM654) += hbmc_am654.o diff --git a/drivers/mtd/hyperbus/core.c b/drivers/mtd/hyperbus/core.c new file mode 100644 index 000000000000..d3d44aab7503 --- /dev/null +++ b/drivers/mtd/hyperbus/core.c @@ -0,0 +1,167 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ +// Author: Vignesh R + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define HB_CALIB_COUNT 25 + +static struct hb_device *map_to_hbdev(struct map_info *map) +{ + return container_of(map, struct hb_device, map); +} + +static map_word hb_read16(struct map_info *map, unsigned long addr) +{ + struct hb_device *hbdev = map_to_hbdev(map); + map_word read_data; + + read_data.x[0] = hbdev->ops->read16(hbdev, addr); + + return read_data; +} + +static void hb_write16(struct map_info *map, map_word d, unsigned long addr) +{ + struct hb_device *hbdev = map_to_hbdev(map); + + hbdev->ops->write16(hbdev, addr, d.x[0]); +} + +static void hb_copy_from(struct map_info *map, void *to, + unsigned long from, ssize_t len) +{ + struct hb_device *hbdev = map_to_hbdev(map); + + hbdev->ops->copy_from(hbdev, to, from, len); +} + +static void hb_copy_to(struct map_info *map, unsigned long to, + const void *from, ssize_t len) +{ + struct hb_device *hbdev = map_to_hbdev(map); + + hbdev->ops->copy_to(hbdev, to, from, len); +} + +/* Calibrate HBMC by repeatedly reading "QRY" string from CFI space */ +static int hb_calibrate(struct hb_device *hbdev) +{ + struct map_info *map = &hbdev->map; + struct cfi_private cfi; + int count = HB_CALIB_COUNT; + int ret; + + cfi.interleave = 1; + cfi.device_type = CFI_DEVICETYPE_X16; + cfi_send_gen_cmd(0xF0, 0, 0, map, &cfi, cfi.device_type, NULL); + cfi_send_gen_cmd(0x98, 0x55, 0, map, &cfi, cfi.device_type, NULL); + + while (count--) + cfi_qry_present(map, 0, &cfi); + + ret = cfi_qry_present(map, 0, &cfi); + cfi_qry_mode_off(0, map, &cfi); + + return ret; +} + +int hb_register_device(struct hb_device *hbdev) +{ + struct resource res; + struct device *dev; + struct device_node *np; + struct map_info *map; + struct hb_ops *ops; + int err; + + if (!hbdev || !hbdev->dev || !hbdev->np) { + pr_err("hyperbus: please fill all the necessary fields!\n"); + return -EINVAL; + } + + np = hbdev->np; + if (!of_device_is_compatible(np, "cypress,hyperflash")) + return -ENODEV; + + hbdev->memtype = HYPERFLASH; + + if (of_address_to_resource(np, 0, &res)) + return -EINVAL; + + dev = hbdev->dev; + map = &hbdev->map; + map->size = resource_size(&res); + map->virt = devm_ioremap_resource(dev, &res); + if (IS_ERR(map->virt)) + return PTR_ERR(map->virt); + + map->name = dev_name(dev); + map->bankwidth = 2; + + simple_map_init(map); + ops = hbdev->ops; + if (ops) { + if (ops->read16) + map->read = hb_read16; + if (ops->write16) + map->write = hb_write16; + if (ops->copy_to) + map->copy_to = hb_copy_to; + if (ops->copy_from) + map->copy_from = hb_copy_from; + } + + if (hbdev->needs_calib) { + err = hb_calibrate(hbdev); + if (!err) { + dev_err(hbdev->dev, "Calibration failed\n"); + return -ENODEV; + } + } + + hbdev->mtd = do_map_probe("cfi_probe", map); + if (!hbdev->mtd) { + dev_err(hbdev->dev, "probing failed\n"); + return -ENXIO; + } + + hbdev->mtd->dev.parent = hbdev->dev; + mtd_set_of_node(hbdev->mtd, np); + + err = mtd_device_register(hbdev->mtd, NULL, 0); + if (err) { + dev_err(hbdev->dev, "failed to register mtd device\n"); + goto err_destroy; + } + hbdev->registered = true; + + return 0; + +err_destroy: + map_destroy(hbdev->mtd); + return err; +} +EXPORT_SYMBOL_GPL(hb_register_device); + +int hb_unregister_device(struct hb_device *hbdev) +{ + int ret = 0; + + if (hbdev && hbdev->mtd && hbdev->registered) { + ret = mtd_device_unregister(hbdev->mtd); + map_destroy(hbdev->mtd); + } + + return ret; +} +EXPORT_SYMBOL_GPL(hb_unregister_device); diff --git a/include/linux/mtd/hyperbus.h b/include/linux/mtd/hyperbus.h new file mode 100644 index 000000000000..0aa11458c424 --- /dev/null +++ b/include/linux/mtd/hyperbus.h @@ -0,0 +1,73 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + */ + +#ifndef __LINUX_MTD_HYPERBUS_H__ +#define __LINUX_MTD_HYPERBUS_H__ + +#include + +enum hb_memtype { + HYPERFLASH, + HYPERRAM, +}; + +/** + * struct hb_device - struct representing Hyperbus slave device + * @map: map_info struct for accessing MMIO Hyperbus flash memory + * @dev: device pointer of Hyperbus Controller + * @np: pointer to Hyperbus slave device node + * @mtd: pointer to MTD struct + * @ops: pointer to custom Hyperbus ops + * @memtype: type of memory device: Hyperflash or HyperRAM + * @needs_calib: flag to indicate whether calibration sequence is needed + * @registered: flag to indicate whether device is registered with MTD core + */ + +struct hb_device { + struct map_info map; + struct device *dev; + struct device_node *np; + struct mtd_info *mtd; + struct hb_ops *ops; + enum hb_memtype memtype; + bool needs_calib; + bool registered; +}; + +/** + * struct hb_ops - struct representing custom Hyperbus operations + * @read16: read 16 bit of data, usually from register/ID-CFI space + * @write16: write 16 bit of data, usually to register/ID-CFI space + * copy_from: copy data from flash memory + * copy_to: copy data to flash_memory + */ + +struct hb_ops { + u16 (*read16)(struct hb_device *hbdev, unsigned long addr); + void (*write16)(struct hb_device *hbdev, unsigned long addr, u16 val); + + void (*copy_from)(struct hb_device *hbdev, void *to, + unsigned long from, ssize_t len); + void (*copy_to)(struct hb_device *dev, unsigned long to, + const void *from, ssize_t len); +}; + +/** + * hb_register_device - probe and register a Hyperbus slave memory device + * @hbdev: hb_device struct with dev, np populated + * + * Return: 0 for success, others for failure. + */ +int hb_register_device(struct hb_device *hbdev); + +/** + * hb_unregister_device - deregister Hyperbus slave memory device + * @hbdev: hb_device struct of device to be unregistered + * + * Return: 0 for success, others for failure. + */ +int hb_unregister_device(struct hb_device *hbdev); + +#endif /* __LINUX_MTD_HYPERBUS_H__ */ From patchwork Tue Feb 19 06:36:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 10819327 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 779FE17E9 for ; Tue, 19 Feb 2019 06:37:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 62E612B50E for ; Tue, 19 Feb 2019 06:37:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 573752B5C8; Tue, 19 Feb 2019 06:37:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id ED9DF2B50E for ; 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Tue, 19 Feb 2019 00:35:39 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Tue, 19 Feb 2019 00:35:39 -0600 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x1J6ZCt2025516; Tue, 19 Feb 2019 00:35:35 -0600 From: Vignesh R To: Vignesh R , David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , Rob Herring Subject: [RFC PATCH 4/5] dt-bindings: mtd: Add bindings for TI's AM654 Hyperbus memory controller Date: Tue, 19 Feb 2019 12:06:06 +0530 Message-ID: <20190219063607.29949-5-vigneshr@ti.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190219063607.29949-1-vigneshr@ti.com> References: <20190219063607.29949-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190218_223547_351377_6C026353 X-CRM114-Status: GOOD ( 20.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Arnd Bergmann , tudor.ambarus@microchip.com, Greg Kroah-Hartman , nsekhar@ti.com, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add binding documentation for TI's Hyperbus memory controller present on AM654 SoC. Signed-off-by: Vignesh R --- .../devicetree/bindings/mtd/ti,am654-hbmc.txt | 27 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/ti,am654-hbmc.txt diff --git a/Documentation/devicetree/bindings/mtd/ti,am654-hbmc.txt b/Documentation/devicetree/bindings/mtd/ti,am654-hbmc.txt new file mode 100644 index 000000000000..b70fd1795fc5 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/ti,am654-hbmc.txt @@ -0,0 +1,27 @@ +Bindings for Hyperbus Memory Controller on TI's K3 family of SoCs + +Required properties: +- compatible : "ti,am654-hbmc" for AM654 SoC +- reg : Two entries: + First entry pointed to the register space of HBMC controller + Second entry pointing to the memory map region dedicated for + MMIO access to attached flash devices +- ranges : Address range allocated for each Chipselect in the MMIO space + +Example: + hbmc: hbmc@47034000 { + compatible = "ti,am654-hbmc"; + reg = <0x0 0x47034000 0x0 0x100>, + <0x5 0x00000000 0x1 0x0000000>; + power-domains = <&k3_pds 55>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x5 0x00000000 0x4000000>, /* CS0 - 64MB */ + <0x1 0x5 0x04000000 0x4000000>; /* CS1 - 64MB + + /* Slave flash node */ + flash@0{ + compatible = "cypress,hyperflash"; + reg = <0x0 0x4000000>; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 0808c22807bc..a9760c5e33f7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7149,6 +7149,7 @@ S: Supported F: drivers/mtd/hyperbus/ F: include/linux/mtd/hyperbus.h F: Documentation/devicetree/bindings/mtd/cypress,hyperbus.txt +F: Documentation/devicetree/bindings/mtd/ti,am654-hbmc.txt HYPERVISOR VIRTUAL CONSOLE DRIVER L: linuxppc-dev@lists.ozlabs.org From patchwork Tue Feb 19 06:36:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 10819329 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9D3F014E1 for ; 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Tue, 19 Feb 2019 00:35:40 -0600 From: Vignesh R To: Vignesh R , David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , Rob Herring Subject: [RFC PATCH 5/5] mtd: hyperbus: Add driver for TI's Hyperbus memory controller Date: Tue, 19 Feb 2019 12:06:07 +0530 Message-ID: <20190219063607.29949-6-vigneshr@ti.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190219063607.29949-1-vigneshr@ti.com> References: <20190219063607.29949-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190218_223555_456236_E61BEE37 X-CRM114-Status: GOOD ( 20.84 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Arnd Bergmann , tudor.ambarus@microchip.com, Greg Kroah-Hartman , nsekhar@ti.com, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add driver for Hyperbus memory controller on TI's AM654 SoC. Programming IP is pretty simple and provides direct memory mapped access to connected Flash devices. Add basic support for the IP without DMA. Second ChipSelect is not supported for now. Signed-off-by: Vignesh R --- drivers/mtd/hyperbus/hbmc_am654.c | 105 ++++++++++++++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 drivers/mtd/hyperbus/hbmc_am654.c diff --git a/drivers/mtd/hyperbus/hbmc_am654.c b/drivers/mtd/hyperbus/hbmc_am654.c new file mode 100644 index 000000000000..1f0d2dc52f9f --- /dev/null +++ b/drivers/mtd/hyperbus/hbmc_am654.c @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ +// Author: Vignesh R + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct am654_hbmc_priv { + struct hb_device hbdev; + void __iomem *regbase; +}; + +static int am654_hbmc_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct am654_hbmc_priv *priv; + struct resource *res; + int err; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + platform_set_drvdata(pdev, priv); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (IS_ERR(res)) { + dev_err(&pdev->dev, "failed to get memory resource\n"); + return -ENOENT; + } + + priv->regbase = devm_ioremap_resource(dev, res); + if (IS_ERR(priv->regbase)) { + dev_err(dev, "Cannot remap controller address.\n"); + return PTR_ERR(priv->regbase); + } + + pm_runtime_enable(&pdev->dev); + err = pm_runtime_get_sync(&pdev->dev); + if (err < 0) { + pm_runtime_put_noidle(&pdev->dev); + return err; + } + + priv->hbdev.needs_calib = true; + priv->hbdev.dev = &pdev->dev; + priv->hbdev.np = of_get_next_child(dev->of_node, NULL); + err = hb_register_device(&priv->hbdev); + if (err) { + dev_err(&pdev->dev, "failed to register controller\n"); + goto err_destroy; + } + + return 0; + +err_destroy: + hb_unregister_device(&priv->hbdev); + pm_runtime_put_sync(&pdev->dev); + return err; +} + +static int am654_hbmc_remove(struct platform_device *pdev) +{ + struct am654_hbmc_priv *priv = platform_get_drvdata(pdev); + int ret; + + ret = hb_unregister_device(&priv->hbdev); + pm_runtime_put_sync(&pdev->dev); + pm_runtime_disable(&pdev->dev); + + return ret; +} + +static const struct of_device_id am654_hbmc_dt_ids[] = { + { + .compatible = "ti,am654-hbmc", + }, + { /* end of table */ } +}; + +MODULE_DEVICE_TABLE(of, am654_hbmc_dt_ids); + +static struct platform_driver am654_hbmc_platform_driver = { + .probe = am654_hbmc_probe, + .remove = am654_hbmc_remove, + .driver = { + .name = "hbmc-am654", + .of_match_table = am654_hbmc_dt_ids, + }, +}; + +module_platform_driver(am654_hbmc_platform_driver); + +MODULE_DESCRIPTION("HBMC driver for AM654 SoC"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:hbmc-am654"); +MODULE_AUTHOR("Vignesh R ");