From patchwork Mon Jan 29 13:02:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13535602 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D3AEA61673; Mon, 29 Jan 2024 13:05:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533518; cv=none; b=idu00dDRKRmJfF7HxQZu1Vd5z/tuYxYXCYxc6JU+DVf6EVZCz5uCAuyhE6IxkUQ496DI5WnghfxcQkgHWFYb8Lrbxve6vopUMFjTmjC3dEQu9FinD+oe8z+/v5IKNX6egQq7freYWf/zvZBpyveDEhzK2SC6IV+I+7CMVryIfto= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533518; c=relaxed/simple; bh=hWDEomf8s1NSZ88LHI2h/eMgx2/+Wu9+L2VlrPLQc6g=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=QanZExPnY38aZRqKZE03o63/XesxzfrPB69SkTpuqQNbHEyYZcSYyJiKh/TCJY+cdz/P39ABVVLOGZgRMujj6uwVVNQq+diGE6DDRbwV8qm6R467ga0pBZ4T5IUrye9SQat86Bqwfc8TZgnt5aqdzfRXDoqWlbU+Ad96kM9zptQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=U3gq8D+w; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="U3gq8D+w" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706533517; x=1738069517; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hWDEomf8s1NSZ88LHI2h/eMgx2/+Wu9+L2VlrPLQc6g=; b=U3gq8D+w5UUddwBeltLUyJk3yRe4ES3MaAjXn/h1n2dzw0sM0kJvPNYe MHFv7Dx5Y+HWICz6BJl6jPNnB+R7a02rWhWMDwTlvxdHuLlNPg5wTTPMp ZaCrg848mCmNk2VeVSJJXIJnAT/8qbWFxc4aLnR1DVZ68UeQC7XGSqPAl 4bkkIyZGkTZyCFKrZHA3rUensNrMiTQlkpCoGwYQ04DXM78Sg6kdbAmke GQUrJe0SC1WmbJTJmUwvPXJpnBdkGpTNX0aqBRP/HG1+79QswqElqKgV1 k7ODhgKSC5hZY3F1FEb+iupsjcq8wE7Biyexp1PRyyCvMAbvSPSdIBIjz Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="21473237" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="21473237" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2024 05:05:16 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="907106707" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="907106707" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by fmsmga002.fm.intel.com with ESMTP; 29 Jan 2024 05:05:08 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Simon Horman , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v4 01/11] net: phylink: publish ethtool link modes that supported and advertised Date: Mon, 29 Jan 2024 21:02:43 +0800 Message-Id: <20240129130253.1400707-2-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> References: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Adding the allow_switch_interface flag to publish all the ethtool link modes that can be supported and advertised. This will allow the interface switching based on different ethtool link modes. Signed-off-by: Choong Yong Liang --- drivers/net/phy/phylink.c | 9 +++++---- include/linux/phylink.h | 1 + 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index ed0b4ccaa6a6..38ee2624169c 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -1839,10 +1839,11 @@ static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, * against all interface modes, which may lead to more ethtool link * modes being advertised than are actually supported. */ - if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && - state->interface != PHY_INTERFACE_MODE_RXAUI && - state->interface != PHY_INTERFACE_MODE_XAUI && - state->interface != PHY_INTERFACE_MODE_USXGMII) + if ((phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && + state->interface != PHY_INTERFACE_MODE_RXAUI && + state->interface != PHY_INTERFACE_MODE_XAUI && + state->interface != PHY_INTERFACE_MODE_USXGMII) || + pl->config->allow_switch_interface) state->interface = PHY_INTERFACE_MODE_NA; return phylink_validate(pl, supported, state); diff --git a/include/linux/phylink.h b/include/linux/phylink.h index d589f89c612c..b362d3231aa4 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -151,6 +151,7 @@ struct phylink_config { bool poll_fixed_state; bool mac_managed_pm; bool ovr_an_inband; + bool allow_switch_interface; void (*get_fixed_state)(struct phylink_config *config, struct phylink_link_state *state); DECLARE_PHY_INTERFACE_MASK(supported_interfaces); From patchwork Mon Jan 29 13:02:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13535603 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 703A96280A; Mon, 29 Jan 2024 13:05:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533526; cv=none; b=TEn+6e3ppKYhSuWORN0ebf4161CP0/Q2q3SOT/+qcRNvGmfkLyxWYcRZf3492B/LM9l5hkWILGy2kLGl1LmdCE6XMSX6R+TDTADYZSoeR66Zg8EEV6/jzDkJM8Cc1/T/r/47GA9frK12DtLB/XtV9x+4j6hdE//++CKVA2DP/+M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533526; c=relaxed/simple; bh=6NUJxzq+XVvVj6pNMncMX5L9x6cZh5iXbnFwIH3E42c=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=QguaieeaeoFXFTCcajY2txKXvsD7QTKgKIBvNWRwM8OgfYXkOC60M616y8WrifKHvtKQaV6AO7sm/1KuxB+aQ2XDdBXbdUl2xkW/bpKmYOuV6xL26XiMj3X4dJ7XRrpLQHBv4wyVMYzlr7wcPpev2P1kM28+cW+3lH5K72Zxlaw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=hLHzItpV; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="hLHzItpV" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706533526; x=1738069526; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6NUJxzq+XVvVj6pNMncMX5L9x6cZh5iXbnFwIH3E42c=; b=hLHzItpVaeDBrdZ+DaFZZyKzvVUR4rZ4EmkzGyr1e8hf9pQyCi2fFAkM vul8k9YZCzGb5piEm7FbiJWee2Z9sHBfJKlOVuOadKbdXnx6Hama52UJg 7oLDH43fNk5h3GUTSrkrXbSv4j7UwtT0WiimUOQmyFN9HvqyBLIZOgxxy 4gswoiSZ+nvTZ24YnCBtCIFMSP9VB6nfofY4Vw01O5vLUY/xValLxfjqW XN/vpilkKLXFNflR6ZO7T0mPyiyuUtWwbMJ8piqwrGN7S+XYemnT3WCIT YIyKGX+ioGSkSauuJ+cC76G0RqvPxON8kdWPNQuk1Q++sPUyWTNaMMquB A==; X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="21473347" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="21473347" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2024 05:05:25 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="907106724" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="907106724" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by fmsmga002.fm.intel.com with ESMTP; 29 Jan 2024 05:05:17 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Simon Horman , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v4 02/11] net: stmmac: provide allow_switch_interface flag Date: Mon, 29 Jan 2024 21:02:44 +0800 Message-Id: <20240129130253.1400707-3-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> References: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Provide the allow_switch_interface flag to indicate the platform supports interface mode switching. Signed-off-by: Choong Yong Liang --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 5 ++++- include/linux/stmmac.h | 1 + 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index a0e46369ae15..d1ec075ae10a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -1222,9 +1222,12 @@ static int stmmac_phy_setup(struct stmmac_priv *priv) priv->phylink_config.mac_managed_pm = true; mdio_bus_data = priv->plat->mdio_bus_data; - if (mdio_bus_data) + if (mdio_bus_data) { priv->phylink_config.ovr_an_inband = mdio_bus_data->xpcs_an_inband; + priv->phylink_config.allow_switch_interface = + mdio_bus_data->allow_switch_interface; + } /* Set the platform/firmware specified interface mode. Note, phylink * deals with the PHY interface mode, not the MAC interface mode. diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index dee5ad6e48c5..b99d11f4ff26 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -87,6 +87,7 @@ struct stmmac_mdio_bus_data { int *irqs; int probed_phy_irq; bool needs_reset; + bool allow_switch_interface; }; struct stmmac_dma_cfg { From patchwork Mon Jan 29 13:02:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13535604 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2203164CC0; Mon, 29 Jan 2024 13:05:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533535; cv=none; b=ivfU/YSWlZ/3rULWQuzO4NRV4XRmpFfqWYadKNUwtWuMIMesHFRFdGHnPfYFAFsampDDG08mYGJZJWYpQr2832QCtpujmHa6SeAwHWUjOd3MdAi8JcjhIHE3PPlHYnKQWi3j8shtc6WSZHt9s5Q7psMiYSE4pmWMGQmhzEJqblg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533535; c=relaxed/simple; bh=4DcfKjEUE4Q7uAyGpqdaKfRx/METmTskcQvMbEFG2So=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=FAw+4n0QgjHZaoKwhU/e7HDH2cYhOl2c7300Kk69rBZmjJEoHtSoQJWmjPmTArwq3GvqFUWgLP+cIku4CIH6aTveN/0IpybbmJnt8nt9qVU7kP3Te1YUJJ0GD4oqz8YmdfkWE3UzUaiwTQAZ+9RZMshYe41ziS9fpqPptho/LOM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=cmNgZKxE; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="cmNgZKxE" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706533535; x=1738069535; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=4DcfKjEUE4Q7uAyGpqdaKfRx/METmTskcQvMbEFG2So=; b=cmNgZKxErDCd4hL6OvkHcAFnMbFgKmE+wSHQG4WPKrlQS5wbzxNhGhGH 9Wi8XEsxLh9q5J2sFn5XUmGcTjD7b6OMtg3VsqvoyfbKUC3x81kqDkjRk s8sZh5hlnuywQ6B1mZKs7MVesjOcvBIpiYijs4AugPoW+UsiDKTO+n2yG mZu3R+oeAJ2dfXvzXkfNRXpFZFqwfnkuQlGHyX/35+qGKCqzRLomeA+sw 79JSvPo/x1xs2NYXCbgfWaLjEcj32xpt/p5XlYt02+VSD5amoCUlj9g0V /uVkWVqqSu29e5Axl5lH5H2QXpKpExpb853Ak3CIHevO4jVEldi7enQiy Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="21473394" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="21473394" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2024 05:05:34 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="907106751" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="907106751" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by fmsmga002.fm.intel.com with ESMTP; 29 Jan 2024 05:05:25 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Simon Horman , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v4 03/11] net: phylink: provide mac_get_pcs_neg_mode() function Date: Mon, 29 Jan 2024 21:02:45 +0800 Message-Id: <20240129130253.1400707-4-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> References: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Phylink invokes the 'mac_get_pcs_neg_mode' function during interface mode switching and initial startup. This function is optional; if 'phylink_pcs_neg_mode' fails to accurately reflect the current PCS negotiation mode, the MAC driver can determine the mode based on the interface mode, current link negotiation mode, and advertising link mode. For instance, if the interface switches from 2500baseX to SGMII mode, and the current link mode is MLO_AN_PHY, calling 'phylink_pcs_neg_mode' would yield PHYLINK_PCS_NEG_OUTBAND. Since the MAC and PCS driver require PHYLINK_PCS_NEG_INBAND_ENABLED, the 'mac_get_pcs_neg_mode' function will calculate the mode based on the interface, current link negotiation mode, and advertising link mode, returning PHYLINK_PCS_NEG_OUTBAND to enable the PCS to configure the correct settings. Signed-off-by: Choong Yong Liang --- drivers/net/phy/phylink.c | 14 +++++++++++--- include/linux/phylink.h | 5 +++++ 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 38ee2624169c..27aa5d0a9fc6 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -1151,9 +1151,17 @@ static void phylink_major_config(struct phylink *pl, bool restart, phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); - pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, - state->interface, - state->advertising); + if (pl->mac_ops->mac_get_pcs_neg_mode) { + pl->pcs_neg_mode = pl->mac_ops->mac_get_pcs_neg_mode + (pl->config, + pl->cur_link_an_mode, + state->interface, + state->advertising); + } else { + pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, + state->interface, + state->advertising); + } if (pl->using_mac_select_pcs) { pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); diff --git a/include/linux/phylink.h b/include/linux/phylink.h index b362d3231aa4..adb47d1aa67b 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -169,6 +169,7 @@ void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed); * @mac_finish: finish a major reconfiguration of the interface. * @mac_link_down: take the link down. * @mac_link_up: allow the link to come up. + * @mac_get_pcs_neg_mode: Get PCS negotiation mode for interface mode. * * The individual methods are described more fully below. */ @@ -189,6 +190,10 @@ struct phylink_mac_ops { struct phy_device *phy, unsigned int mode, phy_interface_t interface, int speed, int duplex, bool tx_pause, bool rx_pause); + unsigned int (*mac_get_pcs_neg_mode)(struct phylink_config *config, + unsigned int mode, + phy_interface_t interface, + const unsigned long *advertising); }; #if 0 /* For kernel-doc purposes only. */ From patchwork Mon Jan 29 13:02:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13535605 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1E57612C1; Mon, 29 Jan 2024 13:05:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533544; cv=none; b=uDNOZAiN3/T/587aRaJZfx4q+wlosVepjXjrD3UcbmbxBP6HjHW4p1/ql1ffD45k6Akm70VmTGEY7KOxXA/sW3NmoUrWkj9TYnCp90Wew+vsGkeAtQ/jy8pILSFlS2qhMIL8Sn/OqZU8xUWzDTHOClPeCN6h3azDgVWXQxLSAi8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533544; c=relaxed/simple; bh=3g/FhS8Tz9Uv+C3aF9YuSbYH1gtm3NTUoRt3ttrDE2I=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=bCRTCisjxu0P25sM5Qvj9MG9ZQUEOgmvyBobBlnhnoKbOkRMEWAn4nlBOJHk7LVLBtz6uSblq7ZaS3XgTGmJiqS46xOPLwViqmyG/0lIkyazJ0fTWWD8+WXwRWCzVSjoPt7TrknTqlEMU1gnatbnJDdDoYyGaqRBLTtIKJtAf4Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=g5J1gdwt; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="g5J1gdwt" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706533543; x=1738069543; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3g/FhS8Tz9Uv+C3aF9YuSbYH1gtm3NTUoRt3ttrDE2I=; b=g5J1gdwtJqe7L9qmHJA8MJH3rj7J5vGu0+faF+bYMExhCWVaZaXjqjS2 xkmCubexjlOtpoN6vNgG07OHAJBL1KXLTKYksCNnMprfH/+HfgUe5cXdn TmLpaRz1Qnc8hTY2OHixDLvnlqKUiTHF5JNFRniuac6oNJr0Ed2iD6gkd O95MIVGEWUoQTJmG5Yp091OqouQPPWCufhEWalGjh5qysMa6OwXy3DZmn BB9U4H1yimweNIt1fu5ROpQFTqswOT372+zkl7oSup03lIYY6s5pri5MH APhvENrxz9apDQ7ktGohZijJjHWZXgFBCorJr5+j9oiYutlKREK9ZE7K+ g==; X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="21473441" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="21473441" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2024 05:05:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="907106777" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="907106777" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by fmsmga002.fm.intel.com with ESMTP; 29 Jan 2024 05:05:34 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Simon Horman , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v4 04/11] net: phylink: add phylink_pcs_neg_mode() declaration into phylink.h Date: Mon, 29 Jan 2024 21:02:46 +0800 Message-Id: <20240129130253.1400707-5-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> References: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Choong Yong Liang Add phylink_pcs_neg_mode() declaration to the header file for other modules to call the function. Signed-off-by: Choong Yong Liang --- drivers/net/phy/phylink.c | 7 ++++--- include/linux/phylink.h | 3 +++ 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 27aa5d0a9fc6..f8bbc808be61 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -1093,9 +1093,9 @@ static void phylink_pcs_an_restart(struct phylink *pl) * Note: this is for cases where the PCS itself is involved in negotiation * (e.g. Clause 37, SGMII and similar) not Clause 73. */ -static unsigned int phylink_pcs_neg_mode(unsigned int mode, - phy_interface_t interface, - const unsigned long *advertising) +unsigned int phylink_pcs_neg_mode(unsigned int mode, + phy_interface_t interface, + const unsigned long *advertising) { unsigned int neg_mode; @@ -1139,6 +1139,7 @@ static unsigned int phylink_pcs_neg_mode(unsigned int mode, return neg_mode; } +EXPORT_SYMBOL_GPL(phylink_pcs_neg_mode); static void phylink_major_config(struct phylink *pl, bool restart, const struct phylink_link_state *state) diff --git a/include/linux/phylink.h b/include/linux/phylink.h index adb47d1aa67b..fb021275a095 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -595,6 +595,9 @@ int phylink_ethtool_set_eee(struct phylink *, struct ethtool_eee *); int phylink_mii_ioctl(struct phylink *, struct ifreq *, int); int phylink_speed_down(struct phylink *pl, bool sync); int phylink_speed_up(struct phylink *pl); +unsigned int phylink_pcs_neg_mode(unsigned int mode, + phy_interface_t interface, + const unsigned long *advertising); #define phylink_zero(bm) \ bitmap_zero(bm, __ETHTOOL_LINK_MODE_MASK_NBITS) From patchwork Mon Jan 29 13:02:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13535606 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 845E0627F4; Mon, 29 Jan 2024 13:05:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533553; cv=none; b=NLUTxdRmRvtXo6TurBDgNIbPvL9XerNHs0V48IV9b8pJLeXMz/eg/QQl0SHcfBkxHc3PqTw0USF+M0lZlI7lhW6L3Zo8MDKRkSePvED2bMNBwfDL5dWkdtw/4dnJJU9TSHFAmBKDMlgo+yRDM+vPoG7BIBFs40AiE8NhUlPR+pQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533553; c=relaxed/simple; bh=swhxBtRu+RCpSe8dZMPl6Dv+QRyu2q9F2b9dNeHS8cM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=K3f3d7Gn2GIUmeQJxQWojfFYSweQTspJZNw8Horab0f9EL/Mfc4WxBYYU5kCceX8cNHkOPjBILYo4Mwf0o4diJudn2SfXj4H+BoNntSbF0m4DpttQDEn2zJFDH/G6hWQm3JDCFaMQ7RZZnoQ3Cze04n4+N6dyd9yf5ZiNnhBXr0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=SF4+9r9R; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="SF4+9r9R" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706533552; x=1738069552; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=swhxBtRu+RCpSe8dZMPl6Dv+QRyu2q9F2b9dNeHS8cM=; b=SF4+9r9RT1IReowuWanzD0Ll+i904ZhLhBZ/WGPemvvmVzl0nYb3vhSe EEdaSWE+1xbsl4uZUMQQV1jxq/Rcvw1c3N2RCsM79mwA0RGaDpscDXUAz tvsEgaNHWAYTa5CNu7Lp39L/ffdG5YxoWNSUcTfM2ew4zKPEryRosv3ID LwcxGzceuYGKXefvLJSNNSuCXgrITmF0719qPMH8RqUjZO/cD9Of905wQ dG4UaFzIoyazfUDcfLBx98uEN3+vi+kMa0ggM1l8sHZamaemANKq27nUo gR69Yk3R+jCbZRX648nIucsLwV6WnT+h68KiVmF5/YQCIkc172fy4MuTy A==; X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="21473469" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="21473469" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2024 05:05:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="907106807" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="907106807" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by fmsmga002.fm.intel.com with ESMTP; 29 Jan 2024 05:05:43 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Simon Horman , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v4 05/11] net: stmmac: select PCS negotiation mode according to the interface mode Date: Mon, 29 Jan 2024 21:02:47 +0800 Message-Id: <20240129130253.1400707-6-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> References: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The 'stmmac_get_pcs_neg_mode' is invoked during link initialization or interface mode changes. In cases where 'priv->plat->get_pcs_neg_mode' is absent, the default 'phylink_pcs_neg_mode' function is utilized. Additionally, the 'intel_get_pcs_neg_mode' function is available to determine the PCS negotiation mode based on the provided interface mode. Signed-off-by: Choong Yong Liang --- .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 44 +++++++++++++++---- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 17 +++++++ include/linux/stmmac.h | 2 + 3 files changed, 54 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 60283543ffc8..5110af776c8f 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -414,6 +414,39 @@ static void intel_mgbe_pse_crossts_adj(struct intel_priv_data *intel_priv, } } +static bool is_fixed_link(struct pci_dev *pdev) +{ + struct fwnode_handle *fwnode = dev_fwnode(&pdev->dev); + bool is_fixed_link = false; + + if (fwnode) { + struct fwnode_handle *fixed_node; + + fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); + if (fixed_node) + is_fixed_link = true; + + fwnode_handle_put(fixed_node); + } + + return is_fixed_link; +} + +static unsigned int intel_get_pcs_neg_mode(phy_interface_t interface, + struct pci_dev *pdev) +{ + unsigned int neg_mode; + + if ((interface == PHY_INTERFACE_MODE_SGMII || + interface == PHY_INTERFACE_MODE_1000BASEX) && + !is_fixed_link(pdev)) + neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; + else + neg_mode = PHYLINK_PCS_NEG_OUTBAND; + + return neg_mode; +} + static void common_default_data(struct plat_stmmacenet_data *plat) { plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ @@ -590,15 +623,8 @@ static int intel_mgbe_common_data(struct pci_dev *pdev, } /* For fixed-link setup, we clear xpcs_an_inband */ - if (fwnode) { - struct fwnode_handle *fixed_node; - - fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); - if (fixed_node) - plat->mdio_bus_data->xpcs_an_inband = false; - - fwnode_handle_put(fixed_node); - } + if (is_fixed_link(pdev)) + plat->mdio_bus_data->xpcs_an_inband = false; /* Ensure mdio bus scan skips intel serdes and pcs-xpcs */ plat->mdio_bus_data->phy_mask = 1 << INTEL_MGBE_ADHOC_ADDR; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index d1ec075ae10a..00af5a4195fd 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -1104,11 +1104,28 @@ static void stmmac_mac_link_up(struct phylink_config *config, stmmac_hwtstamp_correct_latency(priv, priv); } +static unsigned int stmmac_get_pcs_neg_mode(struct phylink_config *config, + unsigned int mode, + phy_interface_t interface, + const unsigned long *advertising) +{ + struct stmmac_priv *priv = netdev_priv(to_net_dev(config->dev)); + unsigned int neg_mode; + + if (priv->plat->get_pcs_neg_mode) + neg_mode = priv->plat->get_pcs_neg_mode(interface, priv->plat->pdev); + else + neg_mode = phylink_pcs_neg_mode(mode, interface, advertising); + + return neg_mode; +} + static const struct phylink_mac_ops stmmac_phylink_mac_ops = { .mac_select_pcs = stmmac_mac_select_pcs, .mac_config = stmmac_mac_config, .mac_link_down = stmmac_mac_link_down, .mac_link_up = stmmac_mac_link_up, + .mac_get_pcs_neg_mode = stmmac_get_pcs_neg_mode, }; /** diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index b99d11f4ff26..778bdfc3f010 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -277,6 +277,8 @@ struct plat_stmmacenet_data { int (*serdes_powerup)(struct net_device *ndev, void *priv); void (*serdes_powerdown)(struct net_device *ndev, void *priv); void (*speed_mode_2500)(struct net_device *ndev, void *priv); + unsigned int (*get_pcs_neg_mode)(phy_interface_t interface, + struct pci_dev *pdev); void (*ptp_clk_freq_config)(struct stmmac_priv *priv); int (*init)(struct platform_device *pdev, void *priv); void (*exit)(struct platform_device *pdev, void *priv); From patchwork Mon Jan 29 13:02:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13535607 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 53E6A657A1; Mon, 29 Jan 2024 13:06:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533561; cv=none; b=uhARc6BWv9z7d8g6PxtLdzUbJaNianUq77MSox9eDqUbbLI9lVh2AXkDn9QxHjIpt+nF1XYUYW5msqMdoqJ03OcioUahiF0b55pAO/eFXnpbwX1zPVok6IXicYt/h2LLzR2koa3jh4r4urXW90iaGaaW/NGJqHpsBHONCww4ZEE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533561; c=relaxed/simple; bh=ILh5Z5Vi57AO1xeYu8g/LMT4tyMxPDgYH1LL/1ZQ0hA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=laVLJnqfrPgn6nlmVq+CdI3aRd2Nz5Vdkcp6lwGznXEms3SLNvfT0COK1Gyr+mMqqiHLce/ucINfFP/kAZYBMLGahn9ReHx8O/WA9luJbI3/HTcR47FIu4PxYdYKeP01WZAxtioPC6ZzKIQ03a5i4t6P1ZYgsUpgPprpd5DlXUg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=hkgP2yj3; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="hkgP2yj3" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706533561; x=1738069561; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ILh5Z5Vi57AO1xeYu8g/LMT4tyMxPDgYH1LL/1ZQ0hA=; b=hkgP2yj33KbU+cBx1PUiA9R5oRrCgYYorRm6Su3tlCMn/U7la2yKFlU2 455QT7cUpJYF0JzDwl9gi1KS4FA7KFAv9vHD0JffO/1LQk6i7gDS5PDwq MbXS47u0J7s8HcAA8yuVhxbSbj5mUCdhhLOCbPyC7923dFwUzWKPS0fSe 2DhiVAGQXnSX5j2F+j0DJD7yEh1mI7dopp+kHN+JK804m93TGxYtAxGIQ 3Y0KtJ+0ayBaswNrQ8hIO8hdwgcnoWMp503Vw3lvKU45hy0DiBxuNgIcy Zp/YqvWfPr/ZMvU33Th19Q0vsqZIg2rQxU2/F5XC5U0MqmP5kLu0EFDAv w==; X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="21473502" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="21473502" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2024 05:06:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="907106826" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="907106826" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by fmsmga002.fm.intel.com with ESMTP; 29 Jan 2024 05:05:52 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Simon Horman , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v4 06/11] net: stmmac: resetup XPCS according to the new interface mode Date: Mon, 29 Jan 2024 21:02:48 +0800 Message-Id: <20240129130253.1400707-7-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> References: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 XPCS creation will map the configuration for the provided interface mode. Then XPCS will operate according to the interface mode. When the interface mode changes, XPCS is required to map the configuration to the new interface mode and destroy the old interface mode where it is not in use. Signed-off-by: Choong Yong Liang --- drivers/net/ethernet/stmicro/stmmac/stmmac.h | 2 +- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 13 +++++++++++-- drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 7 +++---- 3 files changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h index f155e4841c62..886efd26991e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h @@ -357,7 +357,7 @@ enum stmmac_state { int stmmac_mdio_unregister(struct net_device *ndev); int stmmac_mdio_register(struct net_device *ndev); int stmmac_mdio_reset(struct mii_bus *mii); -int stmmac_xpcs_setup(struct mii_bus *mii); +int stmmac_xpcs_setup(struct mii_bus *mii, phy_interface_t interface); void stmmac_set_ethtool_ops(struct net_device *netdev); int stmmac_init_tstamp_counter(struct stmmac_priv *priv, u32 systime_flags); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 00af5a4195fd..50429c985441 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -941,8 +941,17 @@ static struct phylink_pcs *stmmac_mac_select_pcs(struct phylink_config *config, { struct stmmac_priv *priv = netdev_priv(to_net_dev(config->dev)); - if (priv->hw->xpcs) + if (priv->hw->xpcs) { + if (interface != PHY_INTERFACE_MODE_NA && + interface != priv->plat->phy_interface) { + /* When there are major changes, we reconfigure + * the setup for xpcs according to the interface. + */ + xpcs_destroy(priv->hw->xpcs); + stmmac_xpcs_setup(priv->mii, interface); + } return &priv->hw->xpcs->pcs; + } if (priv->hw->lynx_pcs) return priv->hw->lynx_pcs; @@ -7737,7 +7746,7 @@ int stmmac_dvr_probe(struct device *device, priv->plat->speed_mode_2500(ndev, priv->plat->bsp_priv); if (priv->plat->mdio_bus_data && priv->plat->mdio_bus_data->has_xpcs) { - ret = stmmac_xpcs_setup(priv->mii); + ret = stmmac_xpcs_setup(priv->mii, priv->plat->phy_interface); if (ret) goto error_xpcs_setup; } diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c index 0542cfd1817e..1be144f3dee9 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c @@ -495,19 +495,18 @@ int stmmac_mdio_reset(struct mii_bus *bus) return 0; } -int stmmac_xpcs_setup(struct mii_bus *bus) +int stmmac_xpcs_setup(struct mii_bus *bus, phy_interface_t interface) { struct net_device *ndev = bus->priv; struct stmmac_priv *priv; struct dw_xpcs *xpcs; - int mode, addr; + int addr; priv = netdev_priv(ndev); - mode = priv->plat->phy_interface; /* Try to probe the XPCS by scanning all addresses. */ for (addr = 0; addr < PHY_MAX_ADDR; addr++) { - xpcs = xpcs_create_mdiodev(bus, addr, mode); + xpcs = xpcs_create_mdiodev(bus, addr, interface); if (IS_ERR(xpcs)) continue; From patchwork Mon Jan 29 13:02:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13535608 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5369D63127; Mon, 29 Jan 2024 13:06:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533572; cv=none; b=H81hfNO/Zb7IjE14iUYZwhW87vKUnWufqSJ9+YLhRObUKOkiAdi8Q2+yll1TOlM/Cf8iCtZORZBgUdG60mvsgAfUziN42PGRF2i7vY4ShL8fV/rhUu0k7+btIiPslkiRok/qpQ9evK0d81WMd9MJtNu1mUOo8nyje9deRHXTykA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533572; c=relaxed/simple; bh=wLWm4TBVgPwrs8GjAfExV9MAkwQSGO1+6EaiYzqhFK8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=n6nACc+w71FwZBKuzFzXNvvuM6T+Xb1jmC47qyQjcob3Jr+Kf80jmaf3uNY83n1MjVGkLnjhwtuDiD7CjYirBOARylye6iKLNHcFR+67mLxmYJPcr9MFbqY/3+/tIORD7nPdZHJGpCRRlySRoI7OARtANzrdPxTWoGpXSyeN2pc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=JYIbhasS; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="JYIbhasS" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706533571; x=1738069571; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wLWm4TBVgPwrs8GjAfExV9MAkwQSGO1+6EaiYzqhFK8=; b=JYIbhasSSCdP0mBbuu3/pHeOe4wUr9x0hg8/8aGUVspMHlJ/ZF3K81HX m3FhhOk+jjMR4qiVfeHqZC65SWw7HpWvyCBRwsmeWPcahjHNs5hxn2mfN EKrwG+ai6DoQQiD+ZiamTMHDakHTd46adjTxGShHTNs5+ANvjTttq1AJZ yHxzFxDv9HabSNu2gsisEd4XepupOSeT7mTOVqxwKRSzizgmb6aOWj5If eR7kRjKJfNZ6EyrTr0GPugiHzz0jNk98ems4gLnpU7sxI/m24Wxok2VZN aXgpWZL2XrXdEJwENqs2Mx6zsOqaKiP2+TfSmqq2CShrvPgF8bTi37Tmc Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="21473550" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="21473550" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2024 05:06:09 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="907106844" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="907106844" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by fmsmga002.fm.intel.com with ESMTP; 29 Jan 2024 05:06:00 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Simon Horman , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v4 07/11] arch: x86: Add IPC mailbox accessor function and add SoC register access Date: Mon, 29 Jan 2024 21:02:49 +0800 Message-Id: <20240129130253.1400707-8-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> References: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: "David E. Box" - Exports intel_pmc_ipc() for host access to the PMC IPC mailbox - Add support to use IPC command allows host to access SoC registers through PMC firmware that are otherwise inaccessible to the host due to security policies. Signed-off-by: David E. Box Signed-off-by: Chao Qin Signed-off-by: Choong Yong Liang --- MAINTAINERS | 2 + arch/x86/Kconfig | 9 +++ arch/x86/platform/intel/Makefile | 1 + arch/x86/platform/intel/pmc_ipc.c | 75 +++++++++++++++++++ .../linux/platform_data/x86/intel_pmc_ipc.h | 34 +++++++++ 5 files changed, 121 insertions(+) create mode 100644 arch/x86/platform/intel/pmc_ipc.c create mode 100644 include/linux/platform_data/x86/intel_pmc_ipc.h diff --git a/MAINTAINERS b/MAINTAINERS index 8709c7cd3656..441eb921edef 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10973,8 +10973,10 @@ M: Rajneesh Bhardwaj M: David E Box L: platform-driver-x86@vger.kernel.org S: Maintained +F: arch/x86/platform/intel/pmc_ipc.c F: Documentation/ABI/testing/sysfs-platform-intel-pmc F: drivers/platform/x86/intel/pmc/ +F: linux/platform_data/x86/intel_pmc_ipc.h INTEL PMIC GPIO DRIVERS M: Andy Shevchenko diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 5edec175b9bf..bceae28b9381 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -666,6 +666,15 @@ config X86_AMD_PLATFORM_DEVICE I2C and UART depend on COMMON_CLK to set clock. GPIO driver is implemented under PINCTRL subsystem. +config INTEL_PMC_IPC + tristate "Intel Core SoC Power Management Controller IPC mailbox" + depends on ACPI + help + This option enables sideband register access support for Intel SoC + power management controller IPC mailbox. + + If you don't require the option or are in doubt, say N. + config IOSF_MBI tristate "Intel SoC IOSF Sideband support for SoC platforms" depends on PCI diff --git a/arch/x86/platform/intel/Makefile b/arch/x86/platform/intel/Makefile index dbee3b00f9d0..470fc68de6ba 100644 --- a/arch/x86/platform/intel/Makefile +++ b/arch/x86/platform/intel/Makefile @@ -1,2 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_IOSF_MBI) += iosf_mbi.o +obj-$(CONFIG_INTEL_PMC_IPC) += pmc_ipc.o \ No newline at end of file diff --git a/arch/x86/platform/intel/pmc_ipc.c b/arch/x86/platform/intel/pmc_ipc.c new file mode 100644 index 000000000000..a96234982710 --- /dev/null +++ b/arch/x86/platform/intel/pmc_ipc.c @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Intel Core SoC Power Management Controller IPC mailbox + * + * Copyright (c) 2023, Intel Corporation. + * All Rights Reserved. + * + * Authors: Choong Yong Liang + * David E. Box + */ +#include +#include +#include + +#define PMC_IPCS_PARAM_COUNT 7 + +int intel_pmc_ipc(struct pmc_ipc_cmd *ipc_cmd, u32 *rbuf) +{ + struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; + union acpi_object params[PMC_IPCS_PARAM_COUNT] = { + {.type = ACPI_TYPE_INTEGER,}, + {.type = ACPI_TYPE_INTEGER,}, + {.type = ACPI_TYPE_INTEGER,}, + {.type = ACPI_TYPE_INTEGER,}, + {.type = ACPI_TYPE_INTEGER,}, + {.type = ACPI_TYPE_INTEGER,}, + {.type = ACPI_TYPE_INTEGER,}, + }; + struct acpi_object_list arg_list = { PMC_IPCS_PARAM_COUNT, params }; + union acpi_object *obj; + int status; + + if (!ipc_cmd || !rbuf) + return -EINVAL; + + /* + * 0: IPC Command + * 1: IPC Sub Command + * 2: Size + * 3-6: Write Buffer for offset + */ + params[0].integer.value = ipc_cmd->cmd; + params[1].integer.value = ipc_cmd->sub_cmd; + params[2].integer.value = ipc_cmd->size; + params[3].integer.value = ipc_cmd->wbuf[0]; + params[4].integer.value = ipc_cmd->wbuf[1]; + params[5].integer.value = ipc_cmd->wbuf[2]; + params[6].integer.value = ipc_cmd->wbuf[3]; + + status = acpi_evaluate_object(NULL, "\\IPCS", &arg_list, &buffer); + if (ACPI_FAILURE(status)) + return -ENODEV; + + obj = buffer.pointer; + /* Check if the number of elements in package is 5 */ + if (obj && obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 5) { + const union acpi_object *objs = obj->package.elements; + + if ((u8)objs[0].integer.value != 0) + return -EINVAL; + + rbuf[0] = objs[1].integer.value; + rbuf[1] = objs[2].integer.value; + rbuf[2] = objs[3].integer.value; + rbuf[3] = objs[4].integer.value; + } else { + return -EINVAL; + } + + return 0; +} +EXPORT_SYMBOL(intel_pmc_ipc); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Intel PMC IPC Mailbox accessor"); diff --git a/include/linux/platform_data/x86/intel_pmc_ipc.h b/include/linux/platform_data/x86/intel_pmc_ipc.h new file mode 100644 index 000000000000..d47b89f873fc --- /dev/null +++ b/include/linux/platform_data/x86/intel_pmc_ipc.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Intel Core SoC Power Management Controller Header File + * + * Copyright (c) 2023, Intel Corporation. + * All Rights Reserved. + * + * Authors: Choong Yong Liang + * David E. Box + */ +#ifndef INTEL_PMC_IPC_H +#define INTEL_PMC_IPC_H + +#define IPC_SOC_REGISTER_ACCESS 0xAA +#define IPC_SOC_SUB_CMD_READ 0x00 +#define IPC_SOC_SUB_CMD_WRITE 0x01 + +struct pmc_ipc_cmd { + u32 cmd; + u32 sub_cmd; + u32 size; + u32 wbuf[4]; +}; + +/** + * intel_pmc_ipc() - PMC IPC Mailbox accessor + * @ipc_cmd: struct pmc_ipc_cmd prepared with input to send + * @rbuf: Allocated u32[4] array for returned IPC data + * + * Return: 0 on success. Non-zero on mailbox error + */ +int intel_pmc_ipc(struct pmc_ipc_cmd *ipc_cmd, u32 *rbuf); + +#endif /* INTEL_PMC_IPC_H */ From patchwork Mon Jan 29 13:02:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13535609 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 12B866313F; Mon, 29 Jan 2024 13:06:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533579; cv=none; b=fa8SjKXNhN/VS7fb7FqJVEzPAnw69xCfseFHtHbSetupp4OqqQQQoI5+Snh891aZiIIkBXSDq8rUApHQOlvFsqW0oJKULrwFd1re/rg5evHhkXHt7wrGbXpN4UfnCmkh4V7BlC4zAdzzxtxiOwFxoCxEx+3UT4mrLaVsDM9hAIY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533579; c=relaxed/simple; bh=4V+EHs1p9HyKhWN7K3Svxl9CZMQvX/gkngKTp0RS5nY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=IOFrBPLRvnQTjFSY5VV9RMngBuPQQTcMzgk4u142nOWOPOY6rFcIsUYzUMmW06Dc0CjpxodlQFYNvenGGciUV881fXdCn7UUrFDg+4mk3EjA/pdv7P6Gwanr8ElvnfSqCFUWOXNw8ZcRSCdOEHaMtgOBBQTAYcqT6ex4UGDi+7s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=JmmQfSo/; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="JmmQfSo/" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706533578; x=1738069578; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=4V+EHs1p9HyKhWN7K3Svxl9CZMQvX/gkngKTp0RS5nY=; b=JmmQfSo/DBSad/Ww11COuJA2pQlNf/Lt1b/eAM2itG1RVYQl7RXWWXE7 uBsICmu30Qo6HqdO2ERclhnyU1+XeLY0/qxCo6xFhPU5fPPZvYovj8s/H qHbFX1anuX5Pq+jUeuwJZmmadUeJ4GBX/kq+h8sTC68HQz3kP0hEOb839 2HJIRWtqME1C6NHG/8dVQq90B0mDx/qFzZjs4qWuf2Mm9g8W0wVrAP9Yo uExrTkuQ5Po6UEZSDRdW2AhXJoD9znGLn09RULDIZs5ET2Y2XpHkEHs6V 7bjgniO2qplKCx0zZzXg0FFtGN5LwPatLbIJB+DdHZ5R86JCbS+iB02zY Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="21473603" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="21473603" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2024 05:06:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="907106860" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="907106860" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by fmsmga002.fm.intel.com with ESMTP; 29 Jan 2024 05:06:09 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Simon Horman , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v4 08/11] stmmac: intel: configure SerDes according to the interface mode Date: Mon, 29 Jan 2024 21:02:50 +0800 Message-Id: <20240129130253.1400707-9-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> References: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: "Tan, Tee Min" Intel platform will configure the SerDes through PMC api based on the provided interface mode. This patch adds several new functions below:- - intel_tsn_interface_is_available(): This new function reads FIA lane ownership registers and common lane registers through IPC commands to know which lane the mGbE port is assigned to. - intel_config_serdes(): To configure the SerDes based on the assigned lane and latest interface mode, it sends IPC command to the PMC through PMC driver/API. The PMC acts as a proxy for R/W on behalf of the driver. - intel_set_reg_access(): Set the register access to the available TSN interface. Signed-off-by: Tan, Tee Min Signed-off-by: Choong Yong Liang --- drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 + .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 113 +++++++++++++++++- .../net/ethernet/stmicro/stmmac/dwmac-intel.h | 75 ++++++++++++ 3 files changed, 188 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig index 85dcda51df05..be423fb2b46c 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -273,6 +273,7 @@ config DWMAC_INTEL default X86 depends on X86 && STMMAC_ETH && PCI depends on COMMON_CLK + select INTEL_PMC_IPC help This selects the Intel platform specific bus support for the stmmac driver. This driver is used for Intel Quark/EHL/TGL. diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 5110af776c8f..ddd96b18ce87 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -5,6 +5,7 @@ #include #include #include +#include #include "dwmac-intel.h" #include "dwmac4.h" #include "stmmac.h" @@ -14,6 +15,9 @@ struct intel_priv_data { int mdio_adhoc_addr; /* mdio address for serdes & etc */ unsigned long crossts_adj; bool is_pse; + const int *tsn_lane_registers; + int max_tsn_lane_registers; + int pid_modphy; }; /* This struct is used to associate PCI Function of MAC controller on a board, @@ -93,7 +97,7 @@ static int intel_serdes_powerup(struct net_device *ndev, void *priv_data) data &= ~SERDES_RATE_MASK; data &= ~SERDES_PCLK_MASK; - if (priv->plat->max_speed == 2500) + if (priv->plat->phy_interface == PHY_INTERFACE_MODE_2500BASEX) data |= SERDES_RATE_PCIE_GEN2 << SERDES_RATE_PCIE_SHIFT | SERDES_PCLK_37p5MHZ << SERDES_PCLK_SHIFT; else @@ -447,6 +451,103 @@ static unsigned int intel_get_pcs_neg_mode(phy_interface_t interface, return neg_mode; } +static bool intel_tsn_interface_is_available(struct net_device *ndev, + struct intel_priv_data *intel_priv) +{ + struct stmmac_priv *priv = netdev_priv(ndev); + struct pmc_ipc_cmd tmp = {0}; + u32 rbuf[4] = {0}; + int ret, i, j; + + if (priv->plat->serdes_powerup) { + tmp.cmd = IPC_SOC_REGISTER_ACCESS; + tmp.sub_cmd = IPC_SOC_SUB_CMD_READ; + + for (i = 0; i < 5; i++) { + tmp.wbuf[0] = R_PCH_FIA_15_PCR_LOS1_REG_BASE + i; + + ret = intel_pmc_ipc(&tmp, rbuf); + if (ret < 0) { + netdev_info(priv->dev, + "Failed to read from PMC.\n"); + return false; + } + + for (j = 0; j <= intel_priv->max_tsn_lane_registers; j++) + if ((rbuf[0] >> + (4 * (intel_priv->tsn_lane_registers[j] % 8)) & + B_PCH_FIA_PCR_L0O) == 0xB) + return true; + } + } + return false; +} + +static int intel_set_reg_access(const struct pmc_serdes_regs *regs, int max_regs) +{ + int ret = 0, i; + + for (i = 0; i < max_regs; i++) { + struct pmc_ipc_cmd tmp = {0}; + u32 buf[4] = {0}; + + tmp.cmd = IPC_SOC_REGISTER_ACCESS; + tmp.sub_cmd = IPC_SOC_SUB_CMD_WRITE; + tmp.wbuf[0] = (u32)regs[i].index; + tmp.wbuf[1] = regs[i].val; + + ret = intel_pmc_ipc(&tmp, buf); + if (ret < 0) + return ret; + } + + return ret; +} + +static int intel_config_serdes(struct net_device *ndev, + void *intel_data, + phy_interface_t interface) +{ + struct intel_priv_data *intel_priv = intel_data; + struct stmmac_priv *priv = netdev_priv(ndev); + int ret = 0; + + if (!intel_tsn_interface_is_available(ndev, intel_priv)) { + netdev_info(priv->dev, + "No TSN interface available to set the registers.\n"); + goto pmc_read_error; + } + + if (intel_priv->pid_modphy == PID_MODPHY1) { + if (interface == PHY_INTERFACE_MODE_2500BASEX) { + ret = intel_set_reg_access(pid_modphy1_2p5g_regs, + ARRAY_SIZE(pid_modphy1_2p5g_regs)); + } else { + ret = intel_set_reg_access(pid_modphy1_1g_regs, + ARRAY_SIZE(pid_modphy1_1g_regs)); + } + } else { + if (interface == PHY_INTERFACE_MODE_2500BASEX) { + ret = intel_set_reg_access(pid_modphy3_2p5g_regs, + ARRAY_SIZE(pid_modphy3_2p5g_regs)); + } else { + ret = intel_set_reg_access(pid_modphy3_1g_regs, + ARRAY_SIZE(pid_modphy3_1g_regs)); + } + } + + priv->plat->phy_interface = interface; + + if (ret < 0) + goto pmc_read_error; + +pmc_read_error: + intel_serdes_powerdown(ndev, intel_priv); + intel_serdes_powerup(ndev, intel_priv); + + return ret; +} + static void common_default_data(struct plat_stmmacenet_data *plat) { plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ @@ -622,6 +723,16 @@ static int intel_mgbe_common_data(struct pci_dev *pdev, plat->mdio_bus_data->xpcs_an_inband = true; } + /* When the platform is able to switch between PHY_INTERFACE_MODE_SGMII + * and PHY_INTERFACE_MODE_2500BASEX interfaces, we clear xpcs_an_inband + * for PHY_INTERFACE_MODE_2500BASEX interface + */ + if (plat->phy_interface == PHY_INTERFACE_MODE_SGMII && + plat->max_speed == 2500) { + plat->mdio_bus_data->xpcs_an_inband = false; + plat->mdio_bus_data->allow_switch_interface = true; + } + /* For fixed-link setup, we clear xpcs_an_inband */ if (is_fixed_link(pdev)) plat->mdio_bus_data->xpcs_an_inband = false; diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h index 0a37987478c1..79c35ba969ea 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h @@ -50,4 +50,79 @@ #define PCH_PTP_CLK_FREQ_19_2MHZ (GMAC_GPO0) #define PCH_PTP_CLK_FREQ_200MHZ (0) +#define PID_MODPHY1 0xAA +#define PID_MODPHY3 0xA8 + +#if IS_ENABLED(CONFIG_INTEL_PMC_IPC) +struct pmc_serdes_regs { + u8 index; + u32 val; +}; + +/* Modphy Register index */ +#define R_PCH_FIA_15_PCR_LOS1_REG_BASE 8 +#define R_PCH_FIA_15_PCR_LOS2_REG_BASE 9 +#define R_PCH_FIA_15_PCR_LOS3_REG_BASE 10 +#define R_PCH_FIA_15_PCR_LOS4_REG_BASE 11 +#define R_PCH_FIA_15_PCR_LOS5_REG_BASE 12 +#define B_PCH_FIA_PCR_L0O GENMASK(3, 0) +#define PID_MODPHY1_B_MODPHY_PCR_LCPLL_DWORD0 13 +#define PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD2 14 +#define PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD7 15 +#define PID_MODPHY1_N_MODPHY_PCR_LPPLL_DWORD10 16 +#define PID_MODPHY1_N_MODPHY_PCR_CMN_ANA_DWORD30 17 +#define PID_MODPHY3_B_MODPHY_PCR_LCPLL_DWORD0 18 +#define PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD2 19 +#define PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD7 20 +#define PID_MODPHY3_N_MODPHY_PCR_LPPLL_DWORD10 21 +#define PID_MODPHY3_N_MODPHY_PCR_CMN_ANA_DWORD30 22 + +#define B_MODPHY_PCR_LCPLL_DWORD0_1G 0x46AAAA41 +#define N_MODPHY_PCR_LCPLL_DWORD2_1G 0x00000139 +#define N_MODPHY_PCR_LCPLL_DWORD7_1G 0x002A0003 +#define N_MODPHY_PCR_LPPLL_DWORD10_1G 0x00170008 +#define N_MODPHY_PCR_CMN_ANA_DWORD30_1G 0x0000D4AC +#define B_MODPHY_PCR_LCPLL_DWORD0_2P5G 0x58555551 +#define N_MODPHY_PCR_LCPLL_DWORD2_2P5G 0x0000012D +#define N_MODPHY_PCR_LCPLL_DWORD7_2P5G 0x001F0003 +#define N_MODPHY_PCR_LPPLL_DWORD10_2P5G 0x00170008 +#define N_MODPHY_PCR_CMN_ANA_DWORD30_2P5G 0x8200ACAC + +static const struct pmc_serdes_regs pid_modphy3_1g_regs[] = { + { PID_MODPHY3_B_MODPHY_PCR_LCPLL_DWORD0, B_MODPHY_PCR_LCPLL_DWORD0_1G }, + { PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD2, N_MODPHY_PCR_LCPLL_DWORD2_1G }, + { PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD7, N_MODPHY_PCR_LCPLL_DWORD7_1G }, + { PID_MODPHY3_N_MODPHY_PCR_LPPLL_DWORD10, N_MODPHY_PCR_LPPLL_DWORD10_1G }, + { PID_MODPHY3_N_MODPHY_PCR_CMN_ANA_DWORD30, N_MODPHY_PCR_CMN_ANA_DWORD30_1G }, + {} +}; + +static const struct pmc_serdes_regs pid_modphy3_2p5g_regs[] = { + { PID_MODPHY3_B_MODPHY_PCR_LCPLL_DWORD0, B_MODPHY_PCR_LCPLL_DWORD0_2P5G }, + { PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD2, N_MODPHY_PCR_LCPLL_DWORD2_2P5G }, + { PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD7, N_MODPHY_PCR_LCPLL_DWORD7_2P5G }, + { PID_MODPHY3_N_MODPHY_PCR_LPPLL_DWORD10, N_MODPHY_PCR_LPPLL_DWORD10_2P5G }, + { PID_MODPHY3_N_MODPHY_PCR_CMN_ANA_DWORD30, N_MODPHY_PCR_CMN_ANA_DWORD30_2P5G }, + {} +}; + +static const struct pmc_serdes_regs pid_modphy1_1g_regs[] = { + { PID_MODPHY1_B_MODPHY_PCR_LCPLL_DWORD0, B_MODPHY_PCR_LCPLL_DWORD0_1G }, + { PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD2, N_MODPHY_PCR_LCPLL_DWORD2_1G }, + { PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD7, N_MODPHY_PCR_LCPLL_DWORD7_1G }, + { PID_MODPHY1_N_MODPHY_PCR_LPPLL_DWORD10, N_MODPHY_PCR_LPPLL_DWORD10_1G }, + { PID_MODPHY1_N_MODPHY_PCR_CMN_ANA_DWORD30, N_MODPHY_PCR_CMN_ANA_DWORD30_1G }, + {} +}; + +static const struct pmc_serdes_regs pid_modphy1_2p5g_regs[] = { + { PID_MODPHY1_B_MODPHY_PCR_LCPLL_DWORD0, B_MODPHY_PCR_LCPLL_DWORD0_2P5G }, + { PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD2, N_MODPHY_PCR_LCPLL_DWORD2_2P5G }, + { PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD7, N_MODPHY_PCR_LCPLL_DWORD7_2P5G }, + { PID_MODPHY1_N_MODPHY_PCR_LPPLL_DWORD10, N_MODPHY_PCR_LPPLL_DWORD10_2P5G }, + { PID_MODPHY1_N_MODPHY_PCR_CMN_ANA_DWORD30, N_MODPHY_PCR_CMN_ANA_DWORD30_2P5G }, + {} +}; +#endif /* CONFIG_INTEL_PMC_IPC */ + #endif /* __DWMAC_INTEL_H__ */ From patchwork Mon Jan 29 13:02:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13535610 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C446664AE; Mon, 29 Jan 2024 13:06:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533587; cv=none; b=BI4p7028vRmPway3YgBbon18n4COfwUey6Pfo/O+WQj+7wFI2LAl5abpLwlXe4y5iL6sGtLG3EtLKYXhRKVHTxNDe4vxSBOPZ2qO4Ohc6c/WW+J1fkydrmx2hgUTJpRNIFk5GetNs7SDmzDKIqxOWhrq61DC8cw6q80wLV4iQlg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533587; c=relaxed/simple; bh=YX+8SYjl2KN0yI2CjlWGvAYamUQY2YUGDNZGqVMB2u8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Kpnijbh1LPuRAi6DClyBksWVKrlG8KuSmn7unR6JmX9SZT5udGzfhlf73AKOU6LAmQojdb49gv04IFzWXLby4QmGYoc2fx50wn3OQon74waS2xC6tv0ywnXgJS+8lYsAdiYZzIxebO6aFRWAc0yuMB2dM28DneqCkId/KN8qPH0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=AcPE/c2T; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="AcPE/c2T" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706533587; x=1738069587; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YX+8SYjl2KN0yI2CjlWGvAYamUQY2YUGDNZGqVMB2u8=; b=AcPE/c2TphnboSNkXyibmUJLk4pX1eLfwXtFO9rABkLWP6+l+HaDarl9 JdT8KdbEMyfOXvnuBm+zo32wmrB96BPP0ruPOT0Rz6L1t3SQZXRgvs3Qu EZCZyZY69aOSL8+ezkXN5CP2aT3OAcmqNHV8XZkBGO7jMvlBJcZlKiddu Cd/3r6rjXNAFSuIod7GCmlpKqJ/FWvm2kQu63eH331Mwpoa3lI/nMEnsa u1pGJdqJAIdyBkID1OqnOK77uv0cN0he6Uz2HF45oR36IpEHzxAulvdZB IZiNeZEIuzilMrQZvod6lYPsaIXEmIfoHL915Q6CU/0JmQQs99Dwmigu6 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="21473643" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="21473643" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2024 05:06:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="907106871" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="907106871" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by fmsmga002.fm.intel.com with ESMTP; 29 Jan 2024 05:06:17 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Simon Horman , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v4 09/11] net: stmmac: configure SerDes on mac_finish Date: Mon, 29 Jan 2024 21:02:51 +0800 Message-Id: <20240129130253.1400707-10-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> References: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 SerDes will configure according to the provided interface mode after finish a major reconfiguration of the interface mode. Signed-off-by: Choong Yong Liang --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 13 +++++++++++++ include/linux/stmmac.h | 3 +++ 2 files changed, 16 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 50429c985441..ced26c01e88e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -1129,12 +1129,25 @@ static unsigned int stmmac_get_pcs_neg_mode(struct phylink_config *config, return neg_mode; } +static int stmmac_mac_finish(struct phylink_config *config, unsigned int mode, + phy_interface_t interface) +{ + struct net_device *ndev = to_net_dev(config->dev); + struct stmmac_priv *priv = netdev_priv(ndev); + + if (priv->plat->config_serdes) + priv->plat->config_serdes(ndev, priv->plat->bsp_priv, interface); + + return 0; +} + static const struct phylink_mac_ops stmmac_phylink_mac_ops = { .mac_select_pcs = stmmac_mac_select_pcs, .mac_config = stmmac_mac_config, .mac_link_down = stmmac_mac_link_down, .mac_link_up = stmmac_mac_link_up, .mac_get_pcs_neg_mode = stmmac_get_pcs_neg_mode, + .mac_finish = stmmac_mac_finish, }; /** diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index 778bdfc3f010..c14b4c204190 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -279,6 +279,9 @@ struct plat_stmmacenet_data { void (*speed_mode_2500)(struct net_device *ndev, void *priv); unsigned int (*get_pcs_neg_mode)(phy_interface_t interface, struct pci_dev *pdev); + int (*config_serdes)(struct net_device *ndev, + void *priv, + phy_interface_t interface); void (*ptp_clk_freq_config)(struct stmmac_priv *priv); int (*init)(struct platform_device *pdev, void *priv); void (*exit)(struct platform_device *pdev, void *priv); From patchwork Mon Jan 29 13:02:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13535611 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0D16B629E1; Mon, 29 Jan 2024 13:06:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533596; cv=none; b=T7r72SPHHWo7gOj9vYMV4t8z1L9WoeNvcdVWWsGnlmmFeqkVjEHQNrjgIF5eN4lJuQiyQ27qS+U/AJ9iSE2n6FK0pBB1BunamlDDqPioMYJ5GFiVAkA6IAffWe4YqUtu5JekuB9tf+WzmfNxqaoOeA/Ta5KTJLZ/LIC3fjZ2lR0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533596; c=relaxed/simple; bh=jVZuVXGKKl/w9vqXKLg9hV4CJBuyMpcx4WwCQPI+U90=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=YgLP+2YV1Wkq82vZBiAajmw91BamTo5c2HJy1NTaZ5EWB6HWwVePieqtOQ6Jntz1JrNVVzQoTa8DKQL0dsDi3NmSfC7OvulKKLnB7fARJeECkQ3clE3qw7VFoo/cyUDg43fmpsbiyE5OELUfS3bwjWDZPMwz3GyRd0kA4bKkceE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=DdgLfPGw; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="DdgLfPGw" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706533595; x=1738069595; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jVZuVXGKKl/w9vqXKLg9hV4CJBuyMpcx4WwCQPI+U90=; b=DdgLfPGwkD4gUsk8iY6sV2deaE39217jMMg2reh2bCgNX6vqvjHA1rlI p1y6qG0eHLxmsNByUoJMp1v8FycSLpvXFsVE4JyzCxRQe9uBrfi88t+dd u/Pe6XJ1Rpt/2vS1ZZnYDZoWCiJpOyu4FjSaHAySnAiyvKmeZkJBo/Wdi rFvsY0aeD4Isanq5ATdnO3l4S35VWZUuPd7pvo5x8Hz+B6Stp+FTf8cqB TN36AVsRCUebuRiPuWtmhm9cmXTsWltS/fUdfSvrE0bDfzewbWRGeKDUI Kztktzv7W6sdG4WWRP+fbaFTj3Op5p1YtSRFFl59Ihvx7wumplSB0MWw3 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="21473693" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="21473693" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2024 05:06:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="907106888" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="907106888" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by fmsmga002.fm.intel.com with ESMTP; 29 Jan 2024 05:06:26 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Simon Horman , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v4 10/11] stmmac: intel: interface switching support for EHL platform Date: Mon, 29 Jan 2024 21:02:52 +0800 Message-Id: <20240129130253.1400707-11-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> References: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Choong Yong Liang 'intel_get_pcs_neg_mode' and 'intel_config_serdes' was provided to handle interface mode change for EHL platform. Modphy register lane was provided to configure serdes on interface mode changing. Signed-off-by: Choong Yong Liang --- .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 27 ++++++++++++++++--- .../net/ethernet/stmicro/stmmac/dwmac-intel.h | 4 +++ 2 files changed, 28 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index ddd96b18ce87..fd9d56b7c511 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -760,6 +760,8 @@ static int intel_mgbe_common_data(struct pci_dev *pdev, static int ehl_common_data(struct pci_dev *pdev, struct plat_stmmacenet_data *plat) { + struct intel_priv_data *intel_priv = plat->bsp_priv; + plat->rx_queues_to_use = 8; plat->tx_queues_to_use = 8; plat->flags |= STMMAC_FLAG_USE_PHY_WOL; @@ -775,19 +777,26 @@ static int ehl_common_data(struct pci_dev *pdev, plat->safety_feat_cfg->prtyen = 0; plat->safety_feat_cfg->tmouten = 0; + intel_priv->tsn_lane_registers = ehl_tsn_lane_registers; + intel_priv->max_tsn_lane_registers = ARRAY_SIZE(ehl_tsn_lane_registers); + return intel_mgbe_common_data(pdev, plat); } static int ehl_sgmii_data(struct pci_dev *pdev, struct plat_stmmacenet_data *plat) { + struct intel_priv_data *intel_priv = plat->bsp_priv; + plat->bus_id = 1; plat->phy_interface = PHY_INTERFACE_MODE_SGMII; - plat->speed_mode_2500 = intel_speed_mode_2500; + plat->max_speed = SPEED_2500; plat->serdes_powerup = intel_serdes_powerup; plat->serdes_powerdown = intel_serdes_powerdown; - + plat->get_pcs_neg_mode = intel_get_pcs_neg_mode; + plat->config_serdes = intel_config_serdes; plat->clk_ptp_rate = 204800000; + intel_priv->pid_modphy = PID_MODPHY3; return ehl_common_data(pdev, plat); } @@ -841,10 +850,16 @@ static struct stmmac_pci_info ehl_pse0_rgmii1g_info = { static int ehl_pse0_sgmii1g_data(struct pci_dev *pdev, struct plat_stmmacenet_data *plat) { + struct intel_priv_data *intel_priv = plat->bsp_priv; + plat->phy_interface = PHY_INTERFACE_MODE_SGMII; - plat->speed_mode_2500 = intel_speed_mode_2500; + plat->max_speed = SPEED_2500; plat->serdes_powerup = intel_serdes_powerup; plat->serdes_powerdown = intel_serdes_powerdown; + plat->get_pcs_neg_mode = intel_get_pcs_neg_mode; + plat->config_serdes = intel_config_serdes; + intel_priv->pid_modphy = PID_MODPHY1; + return ehl_pse0_common_data(pdev, plat); } @@ -882,10 +897,16 @@ static struct stmmac_pci_info ehl_pse1_rgmii1g_info = { static int ehl_pse1_sgmii1g_data(struct pci_dev *pdev, struct plat_stmmacenet_data *plat) { + struct intel_priv_data *intel_priv = plat->bsp_priv; + plat->phy_interface = PHY_INTERFACE_MODE_SGMII; plat->speed_mode_2500 = intel_speed_mode_2500; plat->serdes_powerup = intel_serdes_powerup; plat->serdes_powerdown = intel_serdes_powerdown; + plat->get_pcs_neg_mode = intel_get_pcs_neg_mode; + plat->config_serdes = intel_config_serdes; + intel_priv->pid_modphy = PID_MODPHY1; + return ehl_pse1_common_data(pdev, plat); } diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h index 79c35ba969ea..093eed977ab0 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h @@ -123,6 +123,10 @@ static const struct pmc_serdes_regs pid_modphy1_2p5g_regs[] = { { PID_MODPHY1_N_MODPHY_PCR_CMN_ANA_DWORD30, N_MODPHY_PCR_CMN_ANA_DWORD30_2P5G }, {} }; + +static const int ehl_tsn_lane_registers[] = {7, 8, 9, 10, 11}; +#else +static const int ehl_tsn_lane_registers[] = {}; #endif /* CONFIG_INTEL_PMC_IPC */ #endif /* __DWMAC_INTEL_H__ */ From patchwork Mon Jan 29 13:02:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13535612 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 17CB2629EF; Mon, 29 Jan 2024 13:06:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533604; cv=none; b=fS8oMgQzD01Hecl3WfyDtZx86kZDK1VItP/5sO4Uy8ZLadtIEfunUemFcsC+O/GtQ0Sk3vABJeZCeQsPw8v7gzXSUvw6uZtl/9QEXFkOvLJINdU7WRuADuQ2ZuZSJ7JkPTSfxR1AzkwmuzRs47ENeoiTNP8G1T3rFaa0AO4KEkI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706533604; c=relaxed/simple; bh=LJf7dTcJbBMHD+bB1uzaU0zJsclsm818XWVIqsj/XS4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=MwcLG3JjKaj/In0mxzq+HgvoHlPepF4MnnyC3i9/LgwIz+4vAx7HHWCRy1mtYCb73inOHXjdibPgroFPGXdwm/5GaYJ3kv4BOywt+9b4mHn/31dQwif9zc/ngV79fftwtXVRDoEkE+ALv3E4wxTzIeHlX3x/kNU3HS1RiZcZ3GA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=XJyKOJ9b; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="XJyKOJ9b" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706533604; x=1738069604; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=LJf7dTcJbBMHD+bB1uzaU0zJsclsm818XWVIqsj/XS4=; b=XJyKOJ9bCRCETTL5vNlvw+NYHHvA8lldw2UUpA+o/4L2UD765i/wkJ4B 7s3kY2dEPeuAKWdFUeD8JEZIMxCRTvxfzEa3FdQrhf1ichydmo4fCBifY zrd+PaaqVQFRHbk3EuuQjuqBX4sqUmS++AYpgdb2rqVFZJ6SL/PtPM0uO ncP+aE+jmBkGZCZT+d9IE9L66YLBt/lZ0qjWWGiRq+8r+NgLHMIAXbq6P 8MKu2qhe38BfgZl/DUAO1CIK2zetKH4zwkJSoSj8+GT7s/R3iNRBMc/sA 9tsq36/k8d1Yr3p9Si0ubnDGxQV70CgjJBJS4OYx9e/MIAShyJhnam6Ql Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="21473742" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="21473742" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2024 05:06:43 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10967"; a="907106901" X-IronPort-AV: E=Sophos;i="6.05,227,1701158400"; d="scan'208";a="907106901" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by fmsmga002.fm.intel.com with ESMTP; 29 Jan 2024 05:06:35 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Simon Horman , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v4 11/11] stmmac: intel: interface switching support for ADL-N platform Date: Mon, 29 Jan 2024 21:02:53 +0800 Message-Id: <20240129130253.1400707-12-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> References: <20240129130253.1400707-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 'intel_get_pcs_neg_mode' and 'intel_config_serdes' was provided to handle interface mode change for ADL-S platform. Modphy register lane was provided to configure serdes on interface mode changing. Signed-off-by: Michael Sit Wei Hong Signed-off-by: Choong Yong Liang --- .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 49 ++++++++++++++++++- .../net/ethernet/stmicro/stmmac/dwmac-intel.h | 2 + 2 files changed, 50 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index fd9d56b7c511..f54595d156fb 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -992,6 +992,53 @@ static int adls_sgmii_phy1_data(struct pci_dev *pdev, static struct stmmac_pci_info adls_sgmii1g_phy1_info = { .setup = adls_sgmii_phy1_data, }; + +static int adln_common_data(struct pci_dev *pdev, + struct plat_stmmacenet_data *plat) +{ + struct intel_priv_data *intel_priv = plat->bsp_priv; + + plat->rx_queues_to_use = 6; + plat->tx_queues_to_use = 4; + plat->clk_ptp_rate = 204800000; + + plat->safety_feat_cfg->tsoee = 1; + plat->safety_feat_cfg->mrxpee = 0; + plat->safety_feat_cfg->mestee = 1; + plat->safety_feat_cfg->mrxee = 1; + plat->safety_feat_cfg->mtxee = 1; + plat->safety_feat_cfg->epsi = 0; + plat->safety_feat_cfg->edpp = 0; + plat->safety_feat_cfg->prtyen = 0; + plat->safety_feat_cfg->tmouten = 0; + + intel_priv->tsn_lane_registers = adln_tsn_lane_registers; + intel_priv->max_tsn_lane_registers = ARRAY_SIZE(adln_tsn_lane_registers); + + return intel_mgbe_common_data(pdev, plat); +} + +static int adln_sgmii_phy0_data(struct pci_dev *pdev, + struct plat_stmmacenet_data *plat) +{ + struct intel_priv_data *intel_priv = plat->bsp_priv; + + plat->bus_id = 1; + plat->phy_interface = PHY_INTERFACE_MODE_SGMII; + plat->max_speed = SPEED_2500; + plat->serdes_powerup = intel_serdes_powerup; + plat->serdes_powerdown = intel_serdes_powerdown; + plat->get_pcs_neg_mode = intel_get_pcs_neg_mode; + plat->config_serdes = intel_config_serdes; + intel_priv->pid_modphy = PID_MODPHY1; + + return adln_common_data(pdev, plat); +} + +static struct stmmac_pci_info adln_sgmii1g_phy0_info = { + .setup = adln_sgmii_phy0_data, +}; + static const struct stmmac_pci_func_data galileo_stmmac_func_data[] = { { .func = 6, @@ -1374,7 +1421,7 @@ static const struct pci_device_id intel_eth_pci_id_table[] = { { PCI_DEVICE_DATA(INTEL, TGLH_SGMII1G_1, &tgl_sgmii1g_phy1_info) }, { PCI_DEVICE_DATA(INTEL, ADLS_SGMII1G_0, &adls_sgmii1g_phy0_info) }, { PCI_DEVICE_DATA(INTEL, ADLS_SGMII1G_1, &adls_sgmii1g_phy1_info) }, - { PCI_DEVICE_DATA(INTEL, ADLN_SGMII1G, &tgl_sgmii1g_phy0_info) }, + { PCI_DEVICE_DATA(INTEL, ADLN_SGMII1G, &adln_sgmii1g_phy0_info) }, { PCI_DEVICE_DATA(INTEL, RPLP_SGMII1G, &tgl_sgmii1g_phy0_info) }, {} }; diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h index 093eed977ab0..2c6b50958988 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h @@ -124,8 +124,10 @@ static const struct pmc_serdes_regs pid_modphy1_2p5g_regs[] = { {} }; +static const int adln_tsn_lane_registers[] = {6}; static const int ehl_tsn_lane_registers[] = {7, 8, 9, 10, 11}; #else +static const int adln_tsn_lane_registers[] = {}; static const int ehl_tsn_lane_registers[] = {}; #endif /* CONFIG_INTEL_PMC_IPC */