From patchwork Tue Jan 30 09:28:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Gantois X-Patchwork-Id: 13537078 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 139535DF1E; Tue, 30 Jan 2024 09:28:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706606899; cv=none; b=Q52J3yfJmp8N4aKZMmx+GuCmw3HFcljRT/2A/iyx3HV/p/QbUsWEgQAE3lveJMx7B2l95MnUk9aTK/gXPHuG5tfaYh5Nanox8BT2ItVyPlzBsH4byd5OX0gkyMHXNrq01OAnUB3frhaIf6IKLWvE9f/S5d9bi6s0j/7bk7++MW8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706606899; c=relaxed/simple; bh=tkt73i+1cw48XGfzOyOl+3GyajYYCmuIG+3FGbLC78M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ILplzJ++Z3xLaxkqrTYGqzGNpu+qbgxyYLvPJlOVmmpY1dDIXnOtYiTHx5hAF+TqQk07cd72hMie9q2yNQfmGL46nWPXj9D9wIlURRVBZJalFynxYyKNuHKZ6iIJHcmivhJ5kWzBcCpbvD5M4HerGxi+oGl4fQlHDXvFvw6aIlE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=GnlAE1xE; arc=none smtp.client-ip=217.70.183.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="GnlAE1xE" Received: by mail.gandi.net (Postfix) with ESMTPSA id 5CEA46000D; Tue, 30 Jan 2024 09:28:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1706606895; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=z5O20HcAEwbcwvmGvpmwDURpDyrqr9bQSjxWrUXZWn8=; b=GnlAE1xENwaIwsGVIRnoLrfTLR3bnZr4e0/SBriECbPlnR0TKm4MeELAPNJs+NH6WcLyOl l2i6waDAjVjYchEwS8B3/4vOx7PFrmbAY9Vwn4tAfXi2HSd6SVGYRzaQchA2SsD5K3yNkm CEqmoAOreNoaU1G6HvdhpUXnhJ0ZhVei8V9D3UCdBkCbdnERC+iQQFRIpHhDaKi0tDhUmp Pyoq/0deGUUJ49SWkY/OzEbzSty7TvZamTqgiOkUbkmSYIZ+feP02uwDtJEutnkEB6Pc7O +9MdBSXoPmmtX/cxNWeHPhH7L5YptdyIA1i2NC4CDkRkrhlZcgM5yENN1cB/dw== From: Romain Gantois Date: Tue, 30 Jan 2024 10:28:36 +0100 Subject: [PATCH net-next v2 1/7] net: phy: add PHY_F_RXC_ALWAYS_ON to PHY dev flags Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240130-rxc_bugfix-v2-1-5e6c3168e5f0@bootlin.com> References: <20240130-rxc_bugfix-v2-0-5e6c3168e5f0@bootlin.com> In-Reply-To: <20240130-rxc_bugfix-v2-0-5e6c3168e5f0@bootlin.com> To: Russell King , Andrew Lunn , Heiner Kallweit , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexandre Torgue , Jose Abreu , Maxime Coquelin , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Cc: Maxime Chevallier , Miquel Raynal , Thomas Petazzoni , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Romain Gantois X-Mailer: b4 0.12.4 X-GND-Sasl: romain.gantois@bootlin.com From: Russell King Some MAC controllers (e.g. stmmac) require their connected PHY to continuously provide a receive clock signal. This can cause issues in two cases: 1. The clock signal hasn't been started yet by the time the MAC driver initializes its hardware. This can make the initialization fail, as in the case of the rzn1 GMAC1 driver. 2. The clock signal is cut during a power saving event. By the time the MAC is brought back up, the clock signal is still not active since phylink_start hasn't been called yet. This brings us back to case 1. If a PHY driver reads this flag, it should ensure that the receive clock signal is started as soon as possible, and that it isn't brought down when the PHY goes into suspend. Signed-off-by: Russell King [rgantois: commit log] Signed-off-by: Romain Gantois --- drivers/net/phy/phylink.c | 10 +++++++++- include/linux/phy.h | 1 + include/linux/phylink.h | 4 ++++ 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index ed0b4ccaa6a6..851049096488 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -1923,6 +1923,8 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, phy_interface_t interface) { + u32 flags = 0; + if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || (pl->cfg_link_an_mode == MLO_AN_INBAND && phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) @@ -1931,7 +1933,10 @@ static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, if (pl->phydev) return -EBUSY; - return phy_attach_direct(pl->netdev, phy, 0, interface); + if (pl->config->mac_requires_rxc) + flags |= PHY_F_RXC_ALWAYS_ON; + + return phy_attach_direct(pl->netdev, phy, flags, interface); } /** @@ -2034,6 +2039,9 @@ int phylink_fwnode_phy_connect(struct phylink *pl, pl->link_config.interface = pl->link_interface; } + if (pl->config->mac_requires_rxc) + flags |= PHY_F_RXC_ALWAYS_ON; + ret = phy_attach_direct(pl->netdev, phy_dev, flags, pl->link_interface); phy_device_free(phy_dev); diff --git a/include/linux/phy.h b/include/linux/phy.h index c9994a59ca2e..3ef30f035bc0 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -768,6 +768,7 @@ struct phy_device { /* Generic phy_device::dev_flags */ #define PHY_F_NO_IRQ 0x80000000 +#define PHY_F_RXC_ALWAYS_ON BIT(30) static inline struct phy_device *to_phy_device(const struct device *dev) { diff --git a/include/linux/phylink.h b/include/linux/phylink.h index d589f89c612c..fcee99632964 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -138,6 +138,9 @@ enum phylink_op_type { * @poll_fixed_state: if true, starts link_poll, * if MAC link is at %MLO_AN_FIXED mode. * @mac_managed_pm: if true, indicate the MAC driver is responsible for PHY PM. + * @mac_requires_rxc: if true, the MAC always requires a receive clock from PHY. + * The PHY driver should start the clock signal as soon as + * possible and avoid stopping it during suspend events. * @ovr_an_inband: if true, override PCS to MLO_AN_INBAND * @get_fixed_state: callback to execute to determine the fixed link state, * if MAC link is at %MLO_AN_FIXED mode. @@ -150,6 +153,7 @@ struct phylink_config { enum phylink_op_type type; bool poll_fixed_state; bool mac_managed_pm; + bool mac_requires_rxc; bool ovr_an_inband; void (*get_fixed_state)(struct phylink_config *config, struct phylink_link_state *state); From patchwork Tue Jan 30 09:28:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Gantois X-Patchwork-Id: 13537079 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E7B1A5D8F7; Tue, 30 Jan 2024 09:28:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706606900; cv=none; b=PiKwmZrInu7pjQfH0AjU5rv5SJRe8VPlFd31kCKtMX8SUS7J1yn08m/qg4BDNPx0QqzTefQr6eHh9bxVrieKXL0oCsn3GEhImsE5ibrIV3/iyJ0+wASgKsrHvxnDUhd5g6zchR0/NMSQwc+cmZFQsCKUcD+SkhSKSjlloRlmU+w= ARC-Message-Signature: i=1; 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Tue, 30 Jan 2024 09:28:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1706606896; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NYbj9ZVqjUqid2LItQs/24ZkvrJTrCLr517cM+GIkLQ=; b=B2H72HhxAkqONydFV9GQv2DBQgQ41FBaPe5MwL/oNenchv6JUAAWdGvyIvvfnKgdqfM32j GnhMBTjK+wNXqLkEmBLkZQDYBDEXH1gsGpHE3/X3j3TO91si7DCJAi6TbZEsHsRwB3k3IH 42wuX0z7YIsVOgkWoatJCEwPAzsrGZaSS4i0hs//XXIDz/SivqvzHM7mYSsf0Q2hvcXzqZ axpmih6ULVqVWsMS28OgttHrv6rxDrsY7ah9rXnfMmUbusi80lgXu+GQ3zMaUKyKGvjQdj /Xo2uMJV4PZGlwAWl4kbq89x2xYcd2Obyfwoseth/7DyR3A82dgsZZUAgqzbWw== From: Romain Gantois Date: Tue, 30 Jan 2024 10:28:37 +0100 Subject: [PATCH net-next v2 2/7] net: phy: add rxc_always_on flag to phylink_pcs Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240130-rxc_bugfix-v2-2-5e6c3168e5f0@bootlin.com> References: <20240130-rxc_bugfix-v2-0-5e6c3168e5f0@bootlin.com> In-Reply-To: <20240130-rxc_bugfix-v2-0-5e6c3168e5f0@bootlin.com> To: Russell King , Andrew Lunn , Heiner Kallweit , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexandre Torgue , Jose Abreu , Maxime Coquelin , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Cc: Maxime Chevallier , Miquel Raynal , Thomas Petazzoni , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Romain Gantois X-Mailer: b4 0.12.4 X-GND-Sasl: romain.gantois@bootlin.com Some MAC drivers (e.g. stmmac) require a continuous receive clock signal to be generated by a PCS that is handled by a standalone PCS driver. Such a PCS driver does not have access to a PHY device, thus cannot check the PHY_F_RXC_ALWAYS_ON flag. They cannot check max_requires_rxc in the phylink config either, since it is a private member. Therefore, a new flag is needed to signal to the PCS that it should keep the RX clock signal up at all times. Suggested-by: Russell King Signed-off-by: Romain Gantois --- drivers/net/phy/phylink.c | 14 ++++++++++++++ include/linux/phylink.h | 11 +++++++++++ 2 files changed, 25 insertions(+) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 851049096488..6fcc0a8ba122 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -1042,6 +1042,20 @@ static void phylink_pcs_poll_start(struct phylink *pl) mod_timer(&pl->link_poll, jiffies + HZ); } +int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) +{ + int ret = 0; + + /* Signal to PCS driver that MAC requires RX clock for init */ + if (pl->config->mac_requires_rxc) + pcs->rxc_always_on = true; + + if (pcs->ops->pcs_pre_init) + ret = pcs->ops->pcs_pre_init(pcs, pl->link_config.interface); + + return ret; +} + static void phylink_mac_config(struct phylink *pl, const struct phylink_link_state *state) { diff --git a/include/linux/phylink.h b/include/linux/phylink.h index fcee99632964..71e970271fd3 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -396,6 +396,10 @@ struct phylink_pcs_ops; * @phylink: pointer to &struct phylink_config * @neg_mode: provide PCS neg mode via "mode" argument * @poll: poll the PCS for link changes + * @rxc_always_on: The MAC driver requires the reference clock + * to always be on. Standalone PCS drivers which + * do not have access to a PHY device can check + * this instead of PHY_F_RXC_ALWAYS_ON. * * This structure is designed to be embedded within the PCS private data, * and will be passed between phylink and the PCS. @@ -408,6 +412,7 @@ struct phylink_pcs { struct phylink *phylink; bool neg_mode; bool poll; + bool rxc_always_on; }; /** @@ -422,6 +427,8 @@ struct phylink_pcs { * @pcs_an_restart: restart 802.3z BaseX autonegotiation. * @pcs_link_up: program the PCS for the resolved link configuration * (where necessary). + * @pcs_pre_init: configure PCS components necessary for MAC hardware + * initialization e.g. RX clock for stmmac. */ struct phylink_pcs_ops { int (*pcs_validate)(struct phylink_pcs *pcs, unsigned long *supported, @@ -441,6 +448,8 @@ struct phylink_pcs_ops { void (*pcs_an_restart)(struct phylink_pcs *pcs); void (*pcs_link_up)(struct phylink_pcs *pcs, unsigned int neg_mode, phy_interface_t interface, int speed, int duplex); + int (*pcs_pre_init)(struct phylink_pcs *pcs, + phy_interface_t interface); }; #if 0 /* For kernel-doc purposes only. */ @@ -568,6 +577,8 @@ void phylink_disconnect_phy(struct phylink *); void phylink_mac_change(struct phylink *, bool up); void phylink_pcs_change(struct phylink_pcs *, bool up); +int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs); + void phylink_start(struct phylink *); void phylink_stop(struct phylink *); From patchwork Tue Jan 30 09:28:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Gantois X-Patchwork-Id: 13537080 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA729604B7; Tue, 30 Jan 2024 09:28:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706606900; cv=none; b=euMxLF41B1Ibx/FHbFN8Wx0M8SsIwRguAX5MiIZh3IHvtX/Kv4g2BmgB7P0EBvfuv0bI9kO8hFfw7cNemglSMZcQHWH5G8T+g5dP3CQVjy9VlcxzscGKX1+Cgz2PZobHbNdTauEvYHzq8iBv0gx+AZL/Fzogy/9OsZAL5vm4ftw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706606900; c=relaxed/simple; bh=69LIq5fAqa6dEr5+ztIQByCimMRhSNd0FmgOOfon8lM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Q6FLVSU5VvcbJdeN1PfjibiFXQPTok1vXVwI9y4S0WaBZTqNQkvTKHHi0vxZK1PsAellYZfAW94lLWUk9uLxIXlbbwsuOrV2paTSrHh8FxoB+WZqTkEI4xWob25+tinT361s7B2hb0tsWl+kAxMsfRsyD3iiaeMYyFVHM6tMo5c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=m1T7nW+b; arc=none smtp.client-ip=217.70.183.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="m1T7nW+b" Received: by mail.gandi.net (Postfix) with ESMTPSA id 3B95D6000E; Tue, 30 Jan 2024 09:28:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1706606897; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Z1rEc2x1Xw5kU2zMQPLLg1FffYOTNZVyoqaN2YLglyM=; b=m1T7nW+b5TG09bRQv/t3Olu40lXYDbburKAes2pyi2pN4ODnjTZjLMk4lIIIA6+BBdNEqN 0oGDUqEN4yktpP2fEYrCxhvp1Om9q9XZ7Bq04QPqJmwhsT1gaA5WfAMdm5zJUBZA4wxKzu yb05XBIIjvRSp83U5FYM0nC8aU6ugY6LZn0pMRVGTJglzGi/aD9gdPtnPm/IPgGn5iMuGJ jLfe1L//8Hmu+Dx9UknY/I0YsQntzZjT9etQypex2CpYGLk2Zk5BHF8HIqs6PBvYf40Inr 5UZzPzePY+ix4gZY+8nXOdgYxaE+rF7ETM+KaLIcosM0BvusobgYSBW2iX7+cQ== From: Romain Gantois Date: Tue, 30 Jan 2024 10:28:38 +0100 Subject: [PATCH net-next v2 3/7] net: stmmac: don't rely on lynx_pcs presence to check for a PHY Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240130-rxc_bugfix-v2-3-5e6c3168e5f0@bootlin.com> References: <20240130-rxc_bugfix-v2-0-5e6c3168e5f0@bootlin.com> In-Reply-To: <20240130-rxc_bugfix-v2-0-5e6c3168e5f0@bootlin.com> To: Russell King , Andrew Lunn , Heiner Kallweit , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexandre Torgue , Jose Abreu , Maxime Coquelin , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Cc: Maxime Chevallier , Miquel Raynal , Thomas Petazzoni , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Romain Gantois X-Mailer: b4 0.12.4 X-GND-Sasl: romain.gantois@bootlin.com From: Maxime Chevallier When initializing attached PHYs, there are some cases where we don't expect any PHY to be connected. The logic uses conditions based on various local PCS configuration, but also calls-in phylink_expects_phy() via stmmac_init_phy(), which is enough to ensure we don't try to initialize a PHY when using a Lynx PCS, as long as we have the phy_interface set to a 802.3z mode and are using inband negociation. Drop the lynx check, making the stmmac generic code more pcs_lynx-agnostic. Signed-off-by: Maxime Chevallier [rgantois: commit log] Signed-off-by: Romain Gantois --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index b334eb16da23..7f0900f53248 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -3918,8 +3918,7 @@ static int __stmmac_open(struct net_device *dev, if (priv->hw->pcs != STMMAC_PCS_TBI && priv->hw->pcs != STMMAC_PCS_RTBI && (!priv->hw->xpcs || - xpcs_get_an_mode(priv->hw->xpcs, mode) != DW_AN_C73) && - !priv->hw->lynx_pcs) { + xpcs_get_an_mode(priv->hw->xpcs, mode) != DW_AN_C73)) { ret = stmmac_init_phy(dev); if (ret) { netdev_err(priv->dev, From patchwork Tue Jan 30 09:28:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Gantois X-Patchwork-Id: 13537081 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D3C7C5915B; Tue, 30 Jan 2024 09:28:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706606902; cv=none; b=e7x/xWgnsc77wZk54EKiQ6oETL/dqX9sSxL6rhE4w8rxjkOec8XOy2tD6htR9wytJiCL2oitcf17dhUDl4CetIFQweVGtc6FotqPLOwXqh5megnjWdLBt5gWxTPd5S7kAQKyuO2WvRi/moy75P+WZVmZjQ5Js16TSRhb3J5B8GA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706606902; c=relaxed/simple; bh=EAMqCKiXGdRHlagD9RIjZMQgLhM62uz4XFlvbcYQmj0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=VDVYyOeIWRuAGQwhEpBWc+PP1NqWBEIxCd+HmEA7Ep0k2plgXSLLxgMYqqX+CdedhtPPwSHHUvIorqj3ae6eR6En5IO0AF2VB0U+fwieOucGZxkDx1zXyFadgZXxFHuMKpzaTlCdckovrPMY/vehH0pZAsFUWF73kzVId7co+6M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=lBWI0Vx9; arc=none smtp.client-ip=217.70.183.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="lBWI0Vx9" Received: by mail.gandi.net (Postfix) with ESMTPSA id 22C4160010; Tue, 30 Jan 2024 09:28:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1706606897; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=pLQfN2Tdko4UPRL5zaHsLOgQcHV6OkMoJDrz6HtlNCo=; b=lBWI0Vx9H0RxcJErx/FjWPt7KO/H5BoC3AjWN8y4mnuaW0AUFLE2zpW3vNwi/TPEzuJVbK moxjQmIUPt78yW6Mj7EHCwJa6a2OwM5T4tzGqv09Ky+qzSjwP0tn2/g7ZU6YXjRZ//XU1H GWwejrJF2HvO6kfGV/p4uoG4FsN62lMY9DenClLTP7KnCEI0vrn+UU4UynsMVmITMQ/e5Z YaS12dfguMRCbpycL5PmvWYuElX4kY6/o8gSiS9X1fRP0q2KJhtIxiCa4nU9QV1WbogwEG a1cpGVMV/3fQzjZ0mndOFgM7fbbmuihR+uG+yJQB667KhpwtFKg66rNbhXa1HQ== From: Romain Gantois Date: Tue, 30 Jan 2024 10:28:39 +0100 Subject: [PATCH net-next v2 4/7] net: stmmac: Support a generic PCS field in mac_device_info Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240130-rxc_bugfix-v2-4-5e6c3168e5f0@bootlin.com> References: <20240130-rxc_bugfix-v2-0-5e6c3168e5f0@bootlin.com> In-Reply-To: <20240130-rxc_bugfix-v2-0-5e6c3168e5f0@bootlin.com> To: Russell King , Andrew Lunn , Heiner Kallweit , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexandre Torgue , Jose Abreu , Maxime Coquelin , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Cc: Maxime Chevallier , Miquel Raynal , Thomas Petazzoni , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Romain Gantois X-Mailer: b4 0.12.4 X-GND-Sasl: romain.gantois@bootlin.com Global stmmac support for early initialization of PCS devices requires a generic PCS reference that can be passed to phylink_pcs_pre_init(). Currently, the mac_device_info struct contains only one PCS field, which is specific to the Lynx model. As PCS models are hardware-specific, it is more appropriate to have a generic PCS field in the mac_device_info struct. Refactor the lynx_pcs field into a generic phylink_pcs field. Signed-off-by: Romain Gantois --- drivers/net/ethernet/stmicro/stmmac/common.h | 2 +- drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 8 ++++---- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 5 +---- 3 files changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h index 721c1f8e892f..318a70d6b330 100644 --- a/drivers/net/ethernet/stmicro/stmmac/common.h +++ b/drivers/net/ethernet/stmicro/stmmac/common.h @@ -565,7 +565,7 @@ struct mac_device_info { const struct stmmac_mmc_ops *mmc; const struct stmmac_est_ops *est; struct dw_xpcs *xpcs; - struct phylink_pcs *lynx_pcs; /* Lynx external PCS */ + struct phylink_pcs *phylink_pcs; struct mii_regs mii; /* MII register Addresses */ struct mac_link link; void __iomem *pcsr; /* vpointer to device CSRs */ diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c index 68f85e4605cb..12b4a80ea3aa 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c @@ -479,9 +479,9 @@ static int socfpga_dwmac_probe(struct platform_device *pdev) goto err_dvr_remove; } - stpriv->hw->lynx_pcs = lynx_pcs_create_mdiodev(pcs_bus, 0); - if (IS_ERR(stpriv->hw->lynx_pcs)) { - ret = PTR_ERR(stpriv->hw->lynx_pcs); + stpriv->hw->phylink_pcs = lynx_pcs_create_mdiodev(pcs_bus, 0); + if (IS_ERR(stpriv->hw->phylink_pcs)) { + ret = PTR_ERR(stpriv->hw->phylink_pcs); goto err_dvr_remove; } } @@ -498,7 +498,7 @@ static void socfpga_dwmac_remove(struct platform_device *pdev) { struct net_device *ndev = platform_get_drvdata(pdev); struct stmmac_priv *priv = netdev_priv(ndev); - struct phylink_pcs *pcs = priv->hw->lynx_pcs; + struct phylink_pcs *pcs = priv->hw->phylink_pcs; stmmac_pltfr_remove(pdev); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 7f0900f53248..72e02ef0ee6b 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -944,10 +944,7 @@ static struct phylink_pcs *stmmac_mac_select_pcs(struct phylink_config *config, if (priv->hw->xpcs) return &priv->hw->xpcs->pcs; - if (priv->hw->lynx_pcs) - return priv->hw->lynx_pcs; - - return NULL; + return priv->hw->phylink_pcs; } static void stmmac_mac_config(struct phylink_config *config, unsigned int mode, From patchwork Tue Jan 30 09:28:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Romain Gantois X-Patchwork-Id: 13537082 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D88860BBB; Tue, 30 Jan 2024 09:28:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706606902; cv=none; b=UeELWVqimhCwf3OWtJlFT5cjbbij6EqrMoYIuloToCS0WmnjJJd/h+MeNway4WBJu0lrXhDllrgI8gpKzDAhdMm9a6rxm3QYPJK98FjzJcB1sBvm+mvMVyOOxtk21C8IPVIyGAM4q1/UHGICnH9phwiXVzs5bh5UN9HkOT+3bvo= ARC-Message-Signature: i=1; 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Tue, 30 Jan 2024 09:28:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1706606898; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JCIN9PC5AsOKdJhE1Swz0j+trKxzzOsLjLL1WNO/OqY=; b=HU5gZCH6CXQVHnfIq3Vvhyl5nAG6Igh4uDVusx1iMqEvkXZbQtsVqDwoMgNGd32mKEbBHE moYX3f18TPUtVSb3ueEgVe1NoBNHZSTQcudeJ6QSfkGlFn0cXdRrBsFsqBk8MYxm2ZGrD6 1yMrE5eJfGx7lmI4PCzeFIgBSM2ki3KebrKfsTqX6NiUdo2TjStLLsxRYW9hJ9j1v6CHAP OMVTM1baaTQGBXcIFaE8tThrlvXHxW6yWS4rXKpGrExZwZn2je+Kqg/8igvQMDsFVMwt5Y yI5FM7E48EatQtLmLazotQ72v08O2F0Ppjbpox8XJboWCrw0c0BuPkBpw5pAaw== From: Romain Gantois Date: Tue, 30 Jan 2024 10:28:40 +0100 Subject: [PATCH net-next v2 5/7] net: stmmac: Signal to PHY/PCS drivers to keep RX clock on Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240130-rxc_bugfix-v2-5-5e6c3168e5f0@bootlin.com> References: <20240130-rxc_bugfix-v2-0-5e6c3168e5f0@bootlin.com> In-Reply-To: <20240130-rxc_bugfix-v2-0-5e6c3168e5f0@bootlin.com> To: Russell King , Andrew Lunn , Heiner Kallweit , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexandre Torgue , Jose Abreu , Maxime Coquelin , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Cc: Maxime Chevallier , Miquel Raynal , Thomas Petazzoni , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Clark Wang , Romain Gantois X-Mailer: b4 0.12.4 X-GND-Sasl: romain.gantois@bootlin.com There is a reocurring issue with stmmac controllers where the MAC fails to initialize its hardware if an RX clock signal isn't provided on the MAC/PHY link. This causes issues when PHY or PCS devices either go into suspend while cutting the RX clock or do not bring the clock signal up early enough for the MAC to initialize successfully. Set the mac_requires_rxc flag in the stmmac phylink config so that PHY/PCS drivers know to keep the RX clock up at all times. Reported-by: Clark Wang Link: https://lore.kernel.org/all/20230202081559.3553637-1-xiaoning.wang@nxp.com/ Reported-by: Clément Léger Link: https://lore.kernel.org/linux-arm-kernel/20230116103926.276869-4-clement.leger@bootlin.com/ Suggested-by: Russell King Signed-off-by: Romain Gantois --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 72e02ef0ee6b..7345e3fa07c4 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -1218,6 +1218,9 @@ static int stmmac_phy_setup(struct stmmac_priv *priv) priv->phylink_config.type = PHYLINK_NETDEV; priv->phylink_config.mac_managed_pm = true; + /* Stmmac always requires an RX clock for hardware initialization */ + priv->phylink_config.mac_requires_rxc = true; + mdio_bus_data = priv->plat->mdio_bus_data; if (mdio_bus_data) priv->phylink_config.ovr_an_inband = @@ -3402,6 +3405,10 @@ static int stmmac_hw_setup(struct net_device *dev, bool ptp_register) u32 chan; int ret; + /* Make sure RX clock is enabled */ + if (priv->hw->phylink_pcs) + phylink_pcs_pre_init(priv->phylink, priv->hw->phylink_pcs); + /* DMA initialization and SW reset */ ret = stmmac_init_dma_engine(priv); if (ret < 0) { From patchwork Tue Jan 30 09:28:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Gantois X-Patchwork-Id: 13537083 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 856905D8F7; Tue, 30 Jan 2024 09:28:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706606903; cv=none; b=YN/hT7heasi/ritLT0KNYiULA+rKwcaynM4Pnx8i6eewfkigq/IaD7Cr0Tq0YSnG+X3jvr4tSqy7IA/dceQretmVTiHx5/J0Brl6d+fcSEaCyhqxHu9SuJJuCVoSg6C8lP5xYGy0X8pHWGnCltu9qN8R58Sx2mzIIMiK2T18c20= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706606903; c=relaxed/simple; bh=GrAEfjjCPdqyCpyRBwS0a7Gcf/jDBY2vXHbe6FtpqD4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=jXd3mszChPEX9c4OK1878A1WqXK5JnY1mIUo5ykLNloARKHsoQeadoaeHYYWJHww+iPOMfTnXgdd4G5i+PHIdoRl4XztpUUcShlIoDDYTnqZZlfqM44Ljj4pbIRwsaygIzKUFSC/MVqJAUqGd5AImwKRNzSaD90NdAc/lj021QM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=afy97cw7; arc=none smtp.client-ip=217.70.183.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="afy97cw7" Received: by mail.gandi.net (Postfix) with ESMTPSA id E5E766000B; Tue, 30 Jan 2024 09:28:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1706606899; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=659Q4W8azKnN0NL3XJSqa+ypYYVmj/XL2tJEr9VDJX8=; b=afy97cw7XMyiosoW0oOMFKcGD1vXE5jENd2SXWG8oKO3NpkIEQOSVSBOOzO/jWMe104+BR 6/xIkeaFw9t+pJr9QVkYr7MurlxpWXNy/b4Zg8KbDHcw1Jgd6CEDzvj5Zkcx2J4pTtiOCu x4qcS7dcgQZzv9FuInCDmU9yQ8wnoh0RqTkyVnQy7KFu4LjnxN4m4kovNRLJeB7Z6RoRFS wvSaI702jrZjxPGHUihvoEGOHh40yhO29m9Nlb29CJkSf4fFh0ijHbivf3m8Y0ridGlkJb 61pwRlR1Iujg+mmMm4lNY1WG0dr8qWEaQV4cHJhxqE6QGrqrGq8Bevs0hYv//A== From: Romain Gantois Date: Tue, 30 Jan 2024 10:28:41 +0100 Subject: [PATCH net-next v2 6/7] net: phy: at803x: Avoid hibernating if MAC requires RX clock Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240130-rxc_bugfix-v2-6-5e6c3168e5f0@bootlin.com> References: <20240130-rxc_bugfix-v2-0-5e6c3168e5f0@bootlin.com> In-Reply-To: <20240130-rxc_bugfix-v2-0-5e6c3168e5f0@bootlin.com> To: Russell King , Andrew Lunn , Heiner Kallweit , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexandre Torgue , Jose Abreu , Maxime Coquelin , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Cc: Maxime Chevallier , Miquel Raynal , Thomas Petazzoni , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Clark Wang , Romain Gantois X-Mailer: b4 0.12.4 X-GND-Sasl: romain.gantois@bootlin.com From: Russell King Stmmac controllers connected to an at803x PHY cannot resume properly after suspend when WoL is enabled. This happens because the MAC requires an RX clock generated by the PHY to initialize its hardware properly. But the RX clock is cut when the PHY suspends and isn't brought up until the MAC driver resumes the phylink. Prevent the at803x PHY driver from going into suspend if the attached MAC driver always requires an RX clock signal. Reported-by: Clark Wang Link: https://lore.kernel.org/all/20230202081559.3553637-1-xiaoning.wang@nxp.com/ Signed-off-by: Russell King [rgantois: commit log] Signed-off-by: Romain Gantois --- drivers/net/phy/at803x.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index 9c07a6cc6e67..5d8d6b89a162 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -895,7 +895,8 @@ static int at803x_hibernation_mode_config(struct phy_device *phydev) /* The default after hardware reset is hibernation mode enabled. After * software reset, the value is retained. */ - if (!(priv->flags & AT803X_DISABLE_HIBERNATION_MODE)) + if (!(priv->flags & AT803X_DISABLE_HIBERNATION_MODE) && + !(phydev->dev_flags & PHY_F_RXC_ALWAYS_ON)) return 0; return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_HIB_CTRL, From patchwork Tue Jan 30 09:28:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Romain Gantois X-Patchwork-Id: 13537084 X-Patchwork-Delegate: geert@linux-m68k.org Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6CD1960DED; Tue, 30 Jan 2024 09:28:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706606904; cv=none; b=H7BMjp8BN9MlqMn2N8eiJC0hU/Rxb1QYVmMcJ6C9+7p7yMbtVB2jx7Ez3LeW4z7CEFvvP7lqTgp3Rc8/YmEagmzypbrLRLU/5aR3OvwD0UXkmXtVWBwBIpgkMxUONDfsnLFyIvDMboDVFi5g+VTH5pbSPtsopPujmS7CUJ+A8zg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706606904; c=relaxed/simple; bh=EnKWCZNENG8M7+4V7YuqDTo7EmxFpDJHQ5fyB6a8q6o=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XD6ZZbun2a1GlVOllvXsonoXUODDfK9t7EdokODWz2Z/nuCwm0LJQT20rHO3x9SRH6PaFffIKwAPIlDlohAD1mqdF/GCpO2YeSfrefQaWJ3D5xa6i3ySx94y6gtIoXbD87G/Zl0+WmhJlVA/zIxyOO31rG79eNi8qNh8EjpTIPM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=mrdnLgpt; arc=none smtp.client-ip=217.70.183.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="mrdnLgpt" Received: by mail.gandi.net (Postfix) with ESMTPSA id CFB8D60004; Tue, 30 Jan 2024 09:28:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1706606900; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3gKaAiVBHTky8x6tO+lB4wo7nzgYAtCMdg1nH6ZUPFM=; b=mrdnLgptKHzGeU00hlkrhRzHICkwGQ2dIHWouMrJCgEKRY6HwBxIxa6NqoTVYsD4j9Itej 0WfIjhI4K3XzQ7o1GOUC4o7DARIUFztoEJqY/cvrEG1vwo/6d4VvLweo0O0OSZUEcA4pF0 6dY1KM9huhedRbcBZbk+K35KRmFbtC80Adkl43kDaOtvQJM3m81bMON1sQSX9FoCQwxXaq 5973v+/qVloAKXPE9S6CFuEDktqikwZxlsOAuAdLMndsnKjNOIhiq/CW508PGEliHR+gpE OzNZBNTdxt80LAJeE42T69O9hopzGQxC+EbPrW/VaNA6C7es7u3ZEoWNOaJbxw== From: Romain Gantois Date: Tue, 30 Jan 2024 10:28:42 +0100 Subject: [PATCH net-next v2 7/7] net: pcs: rzn1-miic: Init RX clock early if MAC requires it Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240130-rxc_bugfix-v2-7-5e6c3168e5f0@bootlin.com> References: <20240130-rxc_bugfix-v2-0-5e6c3168e5f0@bootlin.com> In-Reply-To: <20240130-rxc_bugfix-v2-0-5e6c3168e5f0@bootlin.com> To: Russell King , Andrew Lunn , Heiner Kallweit , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexandre Torgue , Jose Abreu , Maxime Coquelin , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Cc: Maxime Chevallier , Miquel Raynal , Thomas Petazzoni , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Romain Gantois X-Mailer: b4 0.12.4 X-GND-Sasl: romain.gantois@bootlin.com The GMAC1 controller in the RZN1 IP requires the RX MII clock signal to be started before it initializes its own hardware, thus before it calls phylink_start. Check the rxc_always_on pcs flag and enable the clock signal during the link validation phase. Reported-by: Clément Léger Link: https://lore.kernel.org/linux-arm-kernel/20230116103926.276869-4-clement.leger@bootlin.com/ Signed-off-by: Romain Gantois --- drivers/net/pcs/pcs-rzn1-miic.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/net/pcs/pcs-rzn1-miic.c b/drivers/net/pcs/pcs-rzn1-miic.c index d93f84fbb1fd..7ca10b7330ef 100644 --- a/drivers/net/pcs/pcs-rzn1-miic.c +++ b/drivers/net/pcs/pcs-rzn1-miic.c @@ -279,10 +279,26 @@ static int miic_validate(struct phylink_pcs *pcs, unsigned long *supported, return -EINVAL; } +static int miic_pre_init(struct phylink_pcs *pcs, + phy_interface_t interface) +{ + int ret = 0; + + /* Start RX clock if required */ + if (pcs->rxc_always_on) { + ret = miic_config(pcs, 0, interface, NULL, false); + if (ret) + pr_err("Error: Failed to init RX clock in RZN1 MIIC PCS!"); + } + + return ret; +} + static const struct phylink_pcs_ops miic_phylink_ops = { .pcs_validate = miic_validate, .pcs_config = miic_config, .pcs_link_up = miic_link_up, + .pcs_pre_init = miic_pre_init, }; struct phylink_pcs *miic_create(struct device *dev, struct device_node *np)