From patchwork Wed Feb 7 20:22:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 13549031 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D3165C4829E for ; Wed, 7 Feb 2024 20:23:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=vhDnhmJUUV5wX1dESyntn4QPrBaq6fD1GSWEV/EnBEM=; b=ALwXDVwEM8cZ9L RjsVDV4CJA7ei9jlsyHPzoAsjkeisocV9Gad0i37yQ6DFfSGl//vNw3M0ZXlDhb/jChGkrNdOPtnK hJO3OxvhrQmVh83jh23qj8C4mc7VIy4vHd8exRL3uIGINg9kfsYAAVhvlQl1I81iTGN7TnHo3n3yE WxUH4dfCOEO3hSxS79S87NeKGYbzNVj7/hTZyh81tT6dUwmg9PQgXxgscYvglh8CUDNN9Bckm4ZZv DA8G4dGZykmMkwtNHnqNlUc1eiEZNU7eaFEPnwJKyIx7XkJbaVDnYq5/epxKi3x1k4JJJ5SFUdOoE vK9tqeisYSkxXrPgPb6A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rXoS7-0000000BhoG-3nzB; Wed, 07 Feb 2024 20:23:27 +0000 Received: from relay.smtp-ext.broadcom.com ([192.19.144.205]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rXoS5-0000000BhnS-2a3c; Wed, 07 Feb 2024 20:23:26 +0000 Received: from mail-lvn-it-01.lvn.broadcom.net (mail-lvn-it-01.lvn.broadcom.net [10.36.132.253]) by relay.smtp-ext.broadcom.com (Postfix) with ESMTP id 1AE71C0000EA; Wed, 7 Feb 2024 12:23:24 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 1AE71C0000EA DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337404; bh=dD5CiEBNHUt0N9vBp3Iuh/sIzIg6rQGjDXZDEISTQvk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=j+L+Xr5u5YndSrR2wOyMNOhK7B/MmGQXbh9Bfpn2CU/l57PH0ocqBmRVUbSeBvEK4 O6NHVXs9CQ3os+3gVuuqteEpWkswLyzs/62d7Z0wBLcRdnvmrTZ3szKxYrUxMbXuVI jV58wuEvooE537rPfKq6i8ruIuxumwpiGNNSuE/A= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id 751F518041CAC4; Wed, 7 Feb 2024 12:23:22 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , David Regan , Rob Herring , devicetree@vger.kernel.org, Brian Norris , linux-kernel@vger.kernel.org, Conor Dooley , Krzysztof Kozlowski , Vignesh Raghavendra , Miquel Raynal , Richard Weinberger , Kamal Dasu , Rob Herring Subject: [PATCH v5 01/12] dt-bindings: mtd: brcmnand: Updates for bcmbca SoCs Date: Wed, 7 Feb 2024 12:22:46 -0800 Message-Id: <20240207202257.271784-2-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240207_122325_858347_8783ACB2 X-CRM114-Status: GOOD ( 15.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Update the descriptions to reflect different families of broadband SoC and use the general name bcmbca for ARM based SoC. Remove the requirement of interrupts property to reflect the driver code and only require interrupt-names when interrupts property present. Also add myself to the list of maintainers. Signed-off-by: William Zhang Reviewed-by: David Regan Reviewed-by: Rob Herring Reviewed-by: Florian Fainelli --- Changes in v5: - Add reviewed-by tag Changes in v4: - Split the yaml changes into three patches. This is the first one Changes in v3: - Update brcm,nand-use-wp description - Revert the description change to BCM63168 SoC-specific NAND controller Changes in v2: - Revert the new compatible string nand-bcmbca - Drop the BCM63168 compatible fix to avoid any potential ABI incompatibility issue - Simplify the explanation for brcm,nand-use-wp - Keep the interrupt name requirement when interrupt number is specified .../devicetree/bindings/mtd/brcm,brcmnand.yaml | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml index f57e96374e67..e54ca08a798a 100644 --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml @@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller maintainers: - Brian Norris - Kamal Dasu + - William Zhang description: | The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND @@ -18,9 +19,10 @@ description: | supports basic PROGRAM and READ functions, among other features. This controller was originally designed for STB SoCs (BCM7xxx) but is now - available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and - iProc/Cygnus. Its history includes several similar (but not fully register - compatible) versions. + available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based + Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus. + Its history includes several similar (but not fully register compatible) + versions. -- Additional SoC-specific NAND controller properties -- @@ -53,7 +55,7 @@ properties: - brcm,brcmnand-v7.2 - brcm,brcmnand-v7.3 - const: brcm,brcmnand - - description: BCM63138 SoC-specific NAND controller + - description: BCMBCA SoC-specific NAND controller items: - const: brcm,nand-bcm63138 - enum: @@ -177,6 +179,8 @@ allOf: - const: iproc-idm - const: iproc-ext - if: + required: + - interrupts properties: interrupts: minItems: 2 @@ -189,7 +193,6 @@ unevaluatedProperties: false required: - reg - reg-names - - interrupts examples: - | From patchwork Wed Feb 7 20:22:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 13549032 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8D247C4828D for ; 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Wed, 7 Feb 2024 12:23:26 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , devicetree@vger.kernel.org, Brian Norris , linux-kernel@vger.kernel.org, Conor Dooley , Krzysztof Kozlowski , Vignesh Raghavendra , Miquel Raynal , Richard Weinberger , Kamal Dasu , Rob Herring Subject: [PATCH v5 02/12] dt-bindings: mtd: brcmnand: Add WP pin connection property Date: Wed, 7 Feb 2024 12:22:47 -0800 Message-Id: <20240207202257.271784-3-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240207_122329_389795_BA94034A X-CRM114-Status: GOOD ( 12.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add brcm,wp-not-connected property to have an option for disabling this feature on broadband board design that does not connect WP pin. Signed-off-by: William Zhang Reviewed-by: Conor Dooley Reviewed-by: Florian Fainelli --- Changes in v5: - Update the description of this new property Changes in v4: - Move the WP pin property to this separate patch and change it to boolean type. Changes in v3: None Changes in v2: None Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml index e54ca08a798a..6a717bcedfd3 100644 --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml @@ -113,6 +113,13 @@ properties: earlier versions of this core that include WP type: boolean + brcm,wp-not-connected: + description: + Use this property when WP pin is not physically wired to the NAND chip. + Write protection feature cannot be used. By default, controller assumes + the pin is connected and feature is used. + $ref: /schemas/types.yaml#/definitions/flag + patternProperties: "^nand@[a-f0-9]$": type: object From patchwork Wed Feb 7 20:22:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 13549033 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1E581C4828F for ; Wed, 7 Feb 2024 20:23:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rTDr1mMDjYjlEP2Z73fo7EKfT4qYDpaQtvvXV4iXX9U=; b=bApxhgWkbi0Tpm 1CSVKUedQA2ym8+wbq8MJkptdHD4cRebPBAdKnZf3dOo9KZ6j9pNE/ewjipptHxagSTgJaPbLC3HO hqccYTR2KhMJqiwM1g9MfBxSMbgI2Z+nNDMQqO5TuffraYhLQydQUgYfV3Nj2fyC9fsc3huBGVbEJ 1UpX040cDmgHf3G35XbUfhUn+VamYNXYOvJeAlFcBUXBG00HgIR+UVcM12qJsyoSks09Z1eez2tew zkdcdjuXExzmrqtjZUdaTzBMcwG0TEIwI9PfECijIItJ1SX3TZTAPwaauO2BWTF6UkEvM4hMj9v0v +kwsMVnhmdqQukxREwWw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rXoSJ-0000000BhwQ-3VfH; Wed, 07 Feb 2024 20:23:39 +0000 Received: from lpdvsmtp11.broadcom.com ([192.19.166.231] helo=relay.smtp-ext.broadcom.com) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rXoSF-0000000BhsB-2QCS; Wed, 07 Feb 2024 20:23:37 +0000 Received: from mail-lvn-it-01.lvn.broadcom.net (mail-lvn-it-01.lvn.broadcom.net [10.36.132.253]) by relay.smtp-ext.broadcom.com (Postfix) with ESMTP id 2C616C002E08; Wed, 7 Feb 2024 12:23:35 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 2C616C002E08 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337415; bh=tkkKLCiY+CmMh/9fyV9TP9Qpf1i/v+KHxHF98/KxN+U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ix1v4o9bKQFqE4Iq/7WQfxDfx2qYveU8FtEqQHEPNaNYdCYT5IM5bJE59Thpp+1fU N3mVgwVY7/aetVlvupau5v6F1Xu2oNkutjYM1hhd9zaNT5Y6NSwhag2LcWJoyOiZAU 9dnxC7ZPD4zTY1BFOQRaD+dmuN/wsu05Rn1R5w/Y= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id BB3FF18041CAC4; Wed, 7 Feb 2024 12:23:33 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , devicetree@vger.kernel.org, Brian Norris , linux-kernel@vger.kernel.org, Conor Dooley , Krzysztof Kozlowski , Vignesh Raghavendra , Miquel Raynal , Richard Weinberger , Kamal Dasu , Rob Herring Subject: [PATCH v5 03/12] dt-bindings: mtd: brcmnand: Add ecc strap property Date: Wed, 7 Feb 2024 12:22:48 -0800 Message-Id: <20240207202257.271784-4-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240207_122335_697858_944F685D X-CRM114-Status: GOOD ( 12.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add brcm,nand-ecc-use-strap to get ecc and spare area size settings from board boot strap for broadband board designs because they do not specify ecc setting in dts but rather using the strap setting. Signed-off-by: William Zhang Reviewed-by: Conor Dooley --- Changes in v5: - Update the description for this ecc strap property - Add check to make sure brcm,nand-ecc-use-strap and nand-ecc-strength/brcm,nand-oob-sector-size can not be used at the same time Changes in v4: - Move ecc strap property to this separate patch and remove some non-binding related text from the description Changes in v3: None Changes in v2: None .../bindings/mtd/brcm,brcmnand.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml index 6a717bcedfd3..52a4c993b6f1 100644 --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml @@ -146,6 +146,13 @@ patternProperties: layout. $ref: /schemas/types.yaml#/definitions/uint32 + brcm,nand-ecc-use-strap: + description: + This property requires the host system to get the ECC strength + and step size from the SoC NAND boot strap setting. This is a + common hardware design on BCMBCA based boards. + $ref: /schemas/types.yaml#/definitions/flag + unevaluatedProperties: false allOf: @@ -195,6 +202,18 @@ allOf: required: - interrupt-names + - if: + patternProperties: + "^nand@[a-f0-9]$": + required: + - brcm,nand-ecc-use-strap + then: + patternProperties: + "^nand@[a-f0-9]$": + properties: + nand-ecc-strength: false + brcm,nand-oob-sector-size: false + unevaluatedProperties: false required: From patchwork Wed Feb 7 20:22:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 13549034 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 26102C4828D for ; Wed, 7 Feb 2024 20:24:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=8gGKb5fe0pSXbdhe7LzHOXfSpfrAw2N9CRgTtnG7rso=; b=r/I8JAdrMvpTE3 UhXmDZrfPHW5WowBKlub8ZeM97UrMUhAPh+8L/97ZAZuBhvg4Fyme+uQIw4OnsOmRI6ZMN0/ZJV++ qkZ32OICeDd/6m3D1dt3qltwG73154UHI7IkxgXB9HTPDBOKmsfyEypds6vV2Jyn83vSxPcHsYOwu SeODBr9FxXYonYvKXROiHVF13G/cptB2+wVsak8ohWny1eDVwbR+gq+GEQh4Jg55Iqgbk+aCiWLYx mxu5URc3gc0ZKWFjHRHA3x9WaEC7R1nw9UJUoltUpYIs3dMAkQRFB7VyQepLwRrsSPNdyoocMFBKz eU1Hv3yyO9RBMACftR4w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rXoSY-0000000Bi80-15zk; Wed, 07 Feb 2024 20:23:54 +0000 Received: from relay.smtp-ext.broadcom.com ([192.19.144.205]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rXoSK-0000000Bhws-2Ucq; Wed, 07 Feb 2024 20:23:47 +0000 Received: from mail-lvn-it-01.lvn.broadcom.net (mail-lvn-it-01.lvn.broadcom.net [10.36.132.253]) by relay.smtp-ext.broadcom.com (Postfix) with ESMTP id 6E28BC0000EA; Wed, 7 Feb 2024 12:23:39 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 6E28BC0000EA DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337419; bh=xrjHqRQqx0g6rBr73TAGrCtRzRCgcdLYP2VfpF+cUQk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=wFRFFSWhnM357K9YfYjewk9NJBhpLYsKH2MhgAoUOldhlaz1vMVXfgtzx4kzOhynW Bbs/HOEjZ8H5FhHjOKE+kxLR/pUaMWEs0aYwmHEkJnpWAyZ0PZeSTXWR8pNqpfhFTG zkQIZ3vk3Mt/NyRX9B1+9BIwQ0z0y0m6DPSC6OV8= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id CCEE418041CAC4; Wed, 7 Feb 2024 12:23:37 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , David Regan , devicetree@vger.kernel.org, Conor Dooley , Andre Przywara , linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Rob Herring , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Florian Fainelli , Alexandre TORGUE , Shawn Guo Subject: [PATCH v5 04/12] ARM: dts: broadcom: bcmbca: Add NAND controller node Date: Wed, 7 Feb 2024 12:22:49 -0800 Message-Id: <20240207202257.271784-5-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240207_122341_163171_9728A229 X-CRM114-Status: GOOD ( 11.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for Broadcom STB NAND controller in BCMBCA ARMv7 chip dts files. Signed-off-by: William Zhang Reviewed-by: David Regan --- Changes in v5: None Changes in v4: - Move the board related dts setting from SoC dtsi to board dts Changes in v3: None Changes in v2: None arch/arm/boot/dts/broadcom/bcm47622.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm63138.dtsi | 7 ++++++- arch/arm/boot/dts/broadcom/bcm63148.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm63178.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm6756.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm6846.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm6855.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm6878.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/broadcom/bcm947622.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm963138.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm963138dvt.dts | 14 +++++++------- arch/arm/boot/dts/broadcom/bcm963148.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm963178.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm96756.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm96846.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm96855.dts | 10 ++++++++++ arch/arm/boot/dts/broadcom/bcm96878.dts | 10 ++++++++++ 17 files changed, 191 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/broadcom/bcm47622.dtsi b/arch/arm/boot/dts/broadcom/bcm47622.dtsi index 7cd38de118c3..485863f9c420 100644 --- a/arch/arm/boot/dts/broadcom/bcm47622.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm47622.dtsi @@ -138,6 +138,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/broadcom/bcm63138.dtsi b/arch/arm/boot/dts/broadcom/bcm63138.dtsi index 4ef02283612b..e74ba6bf370d 100644 --- a/arch/arm/boot/dts/broadcom/bcm63138.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm63138.dtsi @@ -229,7 +229,12 @@ nand_controller: nand-controller@2000 { reg-names = "nand", "nand-int-base"; status = "disabled"; interrupts = ; - interrupt-names = "nand"; + interrupt-names = "nand_ctlrdy"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; }; serial@4400 { diff --git a/arch/arm/boot/dts/broadcom/bcm63148.dtsi b/arch/arm/boot/dts/broadcom/bcm63148.dtsi index 24431de1810e..53703827ee3f 100644 --- a/arch/arm/boot/dts/broadcom/bcm63148.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm63148.dtsi @@ -119,5 +119,19 @@ hsspi: spi@1000 { num-cs = <8>; status = "disabled"; }; + + nand_controller: nand-controller@2000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x2000 0x600>, <0xf0 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; }; }; diff --git a/arch/arm/boot/dts/broadcom/bcm63178.dtsi b/arch/arm/boot/dts/broadcom/bcm63178.dtsi index 3f9aed96babf..6d8d33498983 100644 --- a/arch/arm/boot/dts/broadcom/bcm63178.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm63178.dtsi @@ -129,6 +129,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/broadcom/bcm6756.dtsi b/arch/arm/boot/dts/broadcom/bcm6756.dtsi index 1d8d957d65dd..6433f8fa5eff 100644 --- a/arch/arm/boot/dts/broadcom/bcm6756.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm6756.dtsi @@ -139,6 +139,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/broadcom/bcm6846.dtsi b/arch/arm/boot/dts/broadcom/bcm6846.dtsi index cf92cf8c4693..ee361cb00b7c 100644 --- a/arch/arm/boot/dts/broadcom/bcm6846.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm6846.dtsi @@ -119,5 +119,19 @@ hsspi: spi@1000 { num-cs = <8>; status = "disabled"; }; + + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; }; }; diff --git a/arch/arm/boot/dts/broadcom/bcm6855.dtsi b/arch/arm/boot/dts/broadcom/bcm6855.dtsi index 52d6bc89f9f8..52915ec6f339 100644 --- a/arch/arm/boot/dts/broadcom/bcm6855.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm6855.dtsi @@ -129,6 +129,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/broadcom/bcm6878.dtsi b/arch/arm/boot/dts/broadcom/bcm6878.dtsi index 2c5d706bac7e..70cf23a65fdb 100644 --- a/arch/arm/boot/dts/broadcom/bcm6878.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm6878.dtsi @@ -120,6 +120,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/broadcom/bcm947622.dts b/arch/arm/boot/dts/broadcom/bcm947622.dts index 93b8ce22678d..6241485408d3 100644 --- a/arch/arm/boot/dts/broadcom/bcm947622.dts +++ b/arch/arm/boot/dts/broadcom/bcm947622.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm963138.dts b/arch/arm/boot/dts/broadcom/bcm963138.dts index 1b405c249213..7fd87e05ec20 100644 --- a/arch/arm/boot/dts/broadcom/bcm963138.dts +++ b/arch/arm/boot/dts/broadcom/bcm963138.dts @@ -29,3 +29,13 @@ &serial0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm963138dvt.dts b/arch/arm/boot/dts/broadcom/bcm963138dvt.dts index b5af61853a07..f60d09908ab9 100644 --- a/arch/arm/boot/dts/broadcom/bcm963138dvt.dts +++ b/arch/arm/boot/dts/broadcom/bcm963138dvt.dts @@ -32,15 +32,15 @@ &serial1 { }; &nand_controller { + brcm,wp-not-connected; status = "okay"; +}; - nand@0 { - compatible = "brcm,nandcs"; - reg = <0>; - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; - brcm,nand-oob-sectors-size = <16>; - }; +&nandcs { + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + brcm,nand-oob-sector-size = <16>; + nand-on-flash-bbt; }; &ahci { diff --git a/arch/arm/boot/dts/broadcom/bcm963148.dts b/arch/arm/boot/dts/broadcom/bcm963148.dts index 1f5d6d783f09..44bca063a327 100644 --- a/arch/arm/boot/dts/broadcom/bcm963148.dts +++ b/arch/arm/boot/dts/broadcom/bcm963148.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm963178.dts b/arch/arm/boot/dts/broadcom/bcm963178.dts index d036e99dd8d1..098a222cd71a 100644 --- a/arch/arm/boot/dts/broadcom/bcm963178.dts +++ b/arch/arm/boot/dts/broadcom/bcm963178.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm96756.dts b/arch/arm/boot/dts/broadcom/bcm96756.dts index 8b104f3fb14a..402038d3cd0c 100644 --- a/arch/arm/boot/dts/broadcom/bcm96756.dts +++ b/arch/arm/boot/dts/broadcom/bcm96756.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm96846.dts b/arch/arm/boot/dts/broadcom/bcm96846.dts index 55852c229608..943896afb7cc 100644 --- a/arch/arm/boot/dts/broadcom/bcm96846.dts +++ b/arch/arm/boot/dts/broadcom/bcm96846.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm96855.dts b/arch/arm/boot/dts/broadcom/bcm96855.dts index 2ad880af2104..571663d9a1ea 100644 --- a/arch/arm/boot/dts/broadcom/bcm96855.dts +++ b/arch/arm/boot/dts/broadcom/bcm96855.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm/boot/dts/broadcom/bcm96878.dts b/arch/arm/boot/dts/broadcom/bcm96878.dts index b7af8ade7a9d..8d6eddd54c6e 100644 --- a/arch/arm/boot/dts/broadcom/bcm96878.dts +++ b/arch/arm/boot/dts/broadcom/bcm96878.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; From patchwork Wed Feb 7 20:22:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 13549087 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A6A68C4828D for ; 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Wed, 7 Feb 2024 12:23:42 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , David Regan , devicetree@vger.kernel.org, Conor Dooley , linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Rob Herring , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Florian Fainelli Subject: [PATCH v5 05/12] arm64: dts: broadcom: bcmbca: Add NAND controller node Date: Wed, 7 Feb 2024 12:22:50 -0800 Message-Id: <20240207202257.271784-6-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240207_122345_368511_9B846A13 X-CRM114-Status: GOOD ( 12.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for Broadcom STB NAND controller in BCMBCA ARMv8 chip dts files. Signed-off-by: William Zhang Reviewed-by: David Regan --- Changes in v5: None Changes in v4: - Move the board related dts setting from SoC dtsi to board dts Changes in v3: None Changes in v2: - Add nand controller node label for 4908 so it is consistent with other SoCs and can be referenced by board dts file arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 4 ++-- arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts | 10 ++++++++++ arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts | 10 ++++++++++ 14 files changed, 156 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi index 2f124b027bbf..336016e334d9 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi @@ -589,7 +589,7 @@ hsspi: spi@1000 { status = "disabled"; }; - nand-controller@1800 { + nand_controller: nand-controller@1800 { #address-cells = <1>; #size-cells = <0>; compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; @@ -597,7 +597,7 @@ nand-controller@1800 { reg-names = "nand", "nand-int-base"; interrupts = ; interrupt-names = "nand_ctlrdy"; - status = "okay"; + status = "disabled"; nandcs: nand@0 { compatible = "brcm,nandcs"; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi index d658c81f7285..14b2adfb817c 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi @@ -138,6 +138,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi index 4f474d47022e..589b8a1efc72 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi @@ -119,6 +119,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi index 909f254dc47d..48d618e75866 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi @@ -137,6 +137,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi index 685ae32951c9..1d1303cf90f3 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi @@ -138,6 +138,20 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi index 820553ce541b..00c62c1e5df0 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi @@ -119,5 +119,19 @@ hsspi: spi@1000 { num-cs = <8>; status = "disabled"; }; + + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; }; }; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi index 0eb93c298297..caeaf428dc15 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi @@ -156,5 +156,19 @@ hsspi: spi@1000 { num-cs = <8>; status = "disabled"; }; + + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + }; + }; }; }; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts index c4e6e71f6310..030ffa5364fb 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts index e69cd683211a..4b779e6c22e1 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts index db2c82d6dfd8..2851e8e41bf4 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts index 25c12bc63545..17dc594fe83f 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts index faba21f03120..34832a734734 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts index 9808331eede2..e1396b5544b7 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts index 1f561c8e13b0..30bbf6f2917e 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts @@ -32,3 +32,13 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + +&nandcs { + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; +}; From patchwork Wed Feb 7 20:22:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 13549037 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3B008C4829A for ; Wed, 7 Feb 2024 20:24:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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bh=aYqxL4BBe2rAkKvxSn/snRDQonR+FFPllbJPIAsOqLk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=E1pS0UF2re5sLE5NhE8w83gdk+v0S2bGOfO/+ZKu2hGZMJg5ffuzCbhrx1VI81whO fXjD7AbnocYRZCitxyssyYgkPaDl9jGra/XRKt61IUbX/+vLOvLE4Xs0Tn+vHhfdNr Fws8s1be5lDzsbwBtM6KN/GZ8vf5sLTojvdvRgME= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id BF58118041CAC4; Wed, 7 Feb 2024 12:23:53 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , devicetree@vger.kernel.org, Conor Dooley , linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Rob Herring , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Florian Fainelli Subject: [PATCH v5 06/12] arm64: dts: broadcom: bcmbca: Update router boards Date: Wed, 7 Feb 2024 12:22:51 -0800 Message-Id: <20240207202257.271784-7-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240207_202402_637467_C3471B88 X-CRM114-Status: GOOD ( 10.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Enable the nand controller and add WP pin connection property in actual board dts as they are board level properties now that they are disabled and moved out from SoC dtsi. Also remove the unnecessary brcm,nand-has-wp property from AC5300 board. This property is only needed for some old controller that this board does not apply. Signed-off-by: William Zhang --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None .../boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts | 5 +++++ .../dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts | 5 +++++ .../boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts | 6 +++++- 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts index 78204d71ecd2..999d93730240 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts @@ -125,6 +125,11 @@ port@7 { }; }; +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + &nandcs { nand-ecc-strength = <4>; nand-ecc-step-size = <512>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts index fcf092c81b59..19fc03ef47a0 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts @@ -155,6 +155,11 @@ port@7 { }; }; +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + &nandcs { nand-ecc-strength = <4>; nand-ecc-step-size = <512>; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts index d94a53d68320..52f928dbfa3c 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts @@ -166,11 +166,15 @@ led@19 { }; }; +&nand_controller { + brcm,wp-not-connected; + status = "okay"; +}; + &nandcs { nand-ecc-strength = <4>; nand-ecc-step-size = <512>; nand-on-flash-bbt; - brcm,nand-has-wp; #address-cells = <1>; #size-cells = <0>; From patchwork Wed Feb 7 20:22:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 13549036 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C39FAC4828F for ; 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Wed, 7 Feb 2024 12:24:00 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , David Regan , Florian Fainelli , Miquel Raynal , linux-kernel@vger.kernel.org, Vignesh Raghavendra , Brian Norris , Richard Weinberger , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= Subject: [PATCH v5 07/12] mtd: rawnand: brcmnand: Rename bcm63138 nand driver Date: Wed, 7 Feb 2024 12:22:52 -0800 Message-Id: <20240207202257.271784-8-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240207_122403_224560_592CEAB4 X-CRM114-Status: GOOD ( 21.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In preparing to support multiple BCMBCA SoCs, rename bcm63138 to bcmbca in the driver code and driver file name. Signed-off-by: William Zhang Reviewed-by: David Regan Acked-by: Florian Fainelli --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None drivers/mtd/nand/raw/brcmnand/Makefile | 2 +- drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c | 99 ------------------- drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c | 99 +++++++++++++++++++ 3 files changed, 100 insertions(+), 100 deletions(-) delete mode 100644 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c create mode 100644 drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index 9907e3ec4bb2..0536568c6467 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -2,7 +2,7 @@ # link order matters; don't link the more generic brcmstb_nand.o before the # more specific iproc_nand.o, for instance obj-$(CONFIG_MTD_NAND_BRCMNAND_IPROC) += iproc_nand.o -obj-$(CONFIG_MTD_NAND_BRCMNAND_BCMBCA) += bcm63138_nand.o +obj-$(CONFIG_MTD_NAND_BRCMNAND_BCMBCA) += bcmbca_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND_BCM63XX) += bcm6368_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND_BRCMSTB) += brcmstb_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND) += brcmnand.o diff --git a/drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c deleted file mode 100644 index 968c5b674b08..000000000000 --- a/drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c +++ /dev/null @@ -1,99 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright © 2015 Broadcom Corporation - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "brcmnand.h" - -struct bcm63138_nand_soc { - struct brcmnand_soc soc; - void __iomem *base; -}; - -#define BCM63138_NAND_INT_STATUS 0x00 -#define BCM63138_NAND_INT_EN 0x04 - -enum { - BCM63138_CTLRDY = BIT(4), -}; - -static bool bcm63138_nand_intc_ack(struct brcmnand_soc *soc) -{ - struct bcm63138_nand_soc *priv = - container_of(soc, struct bcm63138_nand_soc, soc); - void __iomem *mmio = priv->base + BCM63138_NAND_INT_STATUS; - u32 val = brcmnand_readl(mmio); - - if (val & BCM63138_CTLRDY) { - brcmnand_writel(val & ~BCM63138_CTLRDY, mmio); - return true; - } - - return false; -} - -static void bcm63138_nand_intc_set(struct brcmnand_soc *soc, bool en) -{ - struct bcm63138_nand_soc *priv = - container_of(soc, struct bcm63138_nand_soc, soc); - void __iomem *mmio = priv->base + BCM63138_NAND_INT_EN; - u32 val = brcmnand_readl(mmio); - - if (en) - val |= BCM63138_CTLRDY; - else - val &= ~BCM63138_CTLRDY; - - brcmnand_writel(val, mmio); -} - -static int bcm63138_nand_probe(struct platform_device *pdev) -{ - struct device *dev = &pdev->dev; - struct bcm63138_nand_soc *priv; - struct brcmnand_soc *soc; - - priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; - soc = &priv->soc; - - priv->base = devm_platform_ioremap_resource_byname(pdev, "nand-int-base"); - if (IS_ERR(priv->base)) - return PTR_ERR(priv->base); - - soc->ctlrdy_ack = bcm63138_nand_intc_ack; - soc->ctlrdy_set_enabled = bcm63138_nand_intc_set; - - return brcmnand_probe(pdev, soc); -} - -static const struct of_device_id bcm63138_nand_of_match[] = { - { .compatible = "brcm,nand-bcm63138" }, - {}, -}; -MODULE_DEVICE_TABLE(of, bcm63138_nand_of_match); - -static struct platform_driver bcm63138_nand_driver = { - .probe = bcm63138_nand_probe, - .remove_new = brcmnand_remove, - .driver = { - .name = "bcm63138_nand", - .pm = &brcmnand_pm_ops, - .of_match_table = bcm63138_nand_of_match, - } -}; -module_platform_driver(bcm63138_nand_driver); - -MODULE_LICENSE("GPL v2"); -MODULE_AUTHOR("Brian Norris"); -MODULE_DESCRIPTION("NAND driver for BCM63138"); diff --git a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c new file mode 100644 index 000000000000..3e2f3b79788d --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright © 2015 Broadcom Corporation + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "brcmnand.h" + +struct bcmbca_nand_soc { + struct brcmnand_soc soc; + void __iomem *base; +}; + +#define BCMBCA_NAND_INT_STATUS 0x00 +#define BCMBCA_NAND_INT_EN 0x04 + +enum { + BCMBCA_CTLRDY = BIT(4), +}; + +static bool bcmbca_nand_intc_ack(struct brcmnand_soc *soc) +{ + struct bcmbca_nand_soc *priv = + container_of(soc, struct bcmbca_nand_soc, soc); + void __iomem *mmio = priv->base + BCMBCA_NAND_INT_STATUS; + u32 val = brcmnand_readl(mmio); + + if (val & BCMBCA_CTLRDY) { + brcmnand_writel(val & ~BCMBCA_CTLRDY, mmio); + return true; + } + + return false; +} + +static void bcmbca_nand_intc_set(struct brcmnand_soc *soc, bool en) +{ + struct bcmbca_nand_soc *priv = + container_of(soc, struct bcmbca_nand_soc, soc); + void __iomem *mmio = priv->base + BCMBCA_NAND_INT_EN; + u32 val = brcmnand_readl(mmio); + + if (en) + val |= BCMBCA_CTLRDY; + else + val &= ~BCMBCA_CTLRDY; + + brcmnand_writel(val, mmio); +} + +static int bcmbca_nand_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct bcmbca_nand_soc *priv; + struct brcmnand_soc *soc; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + soc = &priv->soc; + + priv->base = devm_platform_ioremap_resource_byname(pdev, "nand-int-base"); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + soc->ctlrdy_ack = bcmbca_nand_intc_ack; + soc->ctlrdy_set_enabled = bcmbca_nand_intc_set; + + return brcmnand_probe(pdev, soc); +} + +static const struct of_device_id bcmbca_nand_of_match[] = { + { .compatible = "brcm,nand-bcm63138" }, + {}, +}; +MODULE_DEVICE_TABLE(of, bcmbca_nand_of_match); + +static struct platform_driver bcmbca_nand_driver = { + .probe = bcmbca_nand_probe, + .remove_new = brcmnand_remove, + .driver = { + .name = "bcmbca_nand", + .pm = &brcmnand_pm_ops, + .of_match_table = bcmbca_nand_of_match, + } +}; +module_platform_driver(bcmbca_nand_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Brian Norris"); +MODULE_DESCRIPTION("NAND driver for BCMBCA"); From patchwork Wed Feb 7 20:22:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 13549038 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 33694C4828F for ; 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Wed, 7 Feb 2024 12:24:03 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , David Regan , Miquel Raynal , linux-kernel@vger.kernel.org, Vignesh Raghavendra , Brian Norris , Richard Weinberger , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Florian Fainelli Subject: [PATCH v5 08/12] mtd: rawnand: brcmnand: Add BCMBCA read data bus interface Date: Wed, 7 Feb 2024 12:22:53 -0800 Message-Id: <20240207202257.271784-9-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240207_122406_497559_795875A7 X-CRM114-Status: GOOD ( 22.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The BCMBCA broadband SoC integrates the NAND controller differently than STB, iProc and other SoCs. It has different endianness for NAND cache data. Add a SoC read data bus shim for BCMBCA to meet the specific SoC need and performance improvement using the optimized memcpy function on NAND cache memory. Signed-off-by: William Zhang Reviewed-by: David Regan --- Changes in v5: None Changes in v4: None Changes in v3: - Updated bcmbca_read_data_bus comment Changes in v2: - Drop the is_param argument to the read data bus function now that we have the exec_op API to read the parameter page and ONFI data - Remove be32_to_cpu from brcmnand_read_data_bus drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c | 27 +++++++++++++++++++++ drivers/mtd/nand/raw/brcmnand/brcmnand.c | 20 ++++++++++++--- drivers/mtd/nand/raw/brcmnand/brcmnand.h | 2 ++ 3 files changed, 46 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c index 3e2f3b79788d..7ad3e7a98f97 100644 --- a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c +++ b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c @@ -26,6 +26,18 @@ enum { BCMBCA_CTLRDY = BIT(4), }; +#if defined(CONFIG_ARM64) +#define ALIGN_REQ 8 +#else +#define ALIGN_REQ 4 +#endif + +static inline bool bcmbca_nand_is_buf_aligned(void *flash_cache, void *buffer) +{ + return IS_ALIGNED((uintptr_t)buffer, ALIGN_REQ) && + IS_ALIGNED((uintptr_t)flash_cache, ALIGN_REQ); +} + static bool bcmbca_nand_intc_ack(struct brcmnand_soc *soc) { struct bcmbca_nand_soc *priv = @@ -56,6 +68,20 @@ static void bcmbca_nand_intc_set(struct brcmnand_soc *soc, bool en) brcmnand_writel(val, mmio); } +static void bcmbca_read_data_bus(struct brcmnand_soc *soc, + void __iomem *flash_cache, u32 *buffer, int fc_words) +{ + /* + * memcpy can do unaligned aligned access depending on source + * and dest address, which is incompatible with nand cache. Fallback + * to the memcpy_fromio in such case + */ + if (bcmbca_nand_is_buf_aligned((void *)flash_cache, buffer)) + memcpy((void *)buffer, (void *)flash_cache, fc_words * 4); + else + memcpy_fromio((void *)buffer, flash_cache, fc_words * 4); +} + static int bcmbca_nand_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -73,6 +99,7 @@ static int bcmbca_nand_probe(struct platform_device *pdev) soc->ctlrdy_ack = bcmbca_nand_intc_ack; soc->ctlrdy_set_enabled = bcmbca_nand_intc_set; + soc->read_data_bus = bcmbca_read_data_bus; return brcmnand_probe(pdev, soc); } diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 8faca43ae1ff..73fdf7ce21aa 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -851,6 +851,20 @@ static inline u32 edu_readl(struct brcmnand_controller *ctrl, return brcmnand_readl(ctrl->edu_base + offs); } +static inline void brcmnand_read_data_bus(struct brcmnand_controller *ctrl, + void __iomem *flash_cache, u32 *buffer, int fc_words) +{ + struct brcmnand_soc *soc = ctrl->soc; + int i; + + if (soc->read_data_bus) { + soc->read_data_bus(soc, flash_cache, buffer, fc_words); + } else { + for (i = 0; i < fc_words; i++) + buffer[i] = brcmnand_read_fc(ctrl, i); + } +} + static void brcmnand_clear_ecc_addr(struct brcmnand_controller *ctrl) { @@ -1975,7 +1989,7 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, { struct brcmnand_host *host = nand_get_controller_data(chip); struct brcmnand_controller *ctrl = host->ctrl; - int i, j, ret = 0; + int i, ret = 0; brcmnand_clear_ecc_addr(ctrl); @@ -1988,8 +2002,8 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, if (likely(buf)) { brcmnand_soc_data_bus_prepare(ctrl->soc, false); - for (j = 0; j < FC_WORDS; j++, buf++) - *buf = brcmnand_read_fc(ctrl, j); + brcmnand_read_data_bus(ctrl, ctrl->nand_fc, buf, FC_WORDS); + buf += FC_WORDS; brcmnand_soc_data_bus_unprepare(ctrl->soc, false); } diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.h b/drivers/mtd/nand/raw/brcmnand/brcmnand.h index 928114c0be5e..7261a69989fe 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.h +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.h @@ -24,6 +24,8 @@ struct brcmnand_soc { void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en); void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare, bool is_param); + void (*read_data_bus)(struct brcmnand_soc *soc, void __iomem *flash_cache, + u32 *buffer, int fc_words); const struct brcmnand_io_ops *ops; }; From patchwork Wed Feb 7 20:22:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 13549039 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E655CC4828D for ; Wed, 7 Feb 2024 20:25:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337447; bh=1Yh76Q4bafQj8j8zmFp3LQ71wEoIHitjS2PH4qKEFkw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mh5eTHW3ecA8+Yd5hfuEAI6bzxkyankIbx4jjFcQK5LNCrnYe8YT5HgfHSByl+OMW Mp5X/1wxKS8XM0lm4MxP1zUwOTvZidsNnkB7frF+6AMMmquNlUHUixMkQG7g48gmMa JsPb7d+uovlY1Q9FMVvmDNaIDFxEzDT8Y2mSBMTE= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id 6B45618041CAC4; Wed, 7 Feb 2024 12:24:06 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , David Regan , Miquel Raynal , linux-kernel@vger.kernel.org, Vignesh Raghavendra , Brian Norris , Richard Weinberger Subject: [PATCH v5 09/12] mtd: rawnand: brcmnand: Add support for getting ecc setting from strap Date: Wed, 7 Feb 2024 12:22:54 -0800 Message-Id: <20240207202257.271784-10-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240207_122409_112413_379198A9 X-CRM114-Status: GOOD ( 21.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org BCMBCA broadband SoC based board design does not specify ecc setting in dts but rather use the SoC NAND strap info to obtain the ecc strength and spare area size setting. Add brcm,nand-ecc-use-strap dts propety for this purpose and update driver to support this option. The generic nand ecc settings still take precedence over this flag. For example, if nand-ecc-strength is set in the dts, the driver ignores the strap setting and falls back to original behavior. This makes sure that the existing BCMBCA board dts still works the old way even the strap flag is set in the BCMBCA chip dtsi. Signed-off-by: William Zhang Reviewed-by: David Regan --- Changes in v5: None Changes in v4: - Update the comments for ecc setting selection Changes in v3: None Changes in v2: - Minor cosmetic fixes drivers/mtd/nand/raw/brcmnand/brcmnand.c | 83 ++++++++++++++++++++++-- 1 file changed, 76 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 73fdf7ce21aa..efeee9e80213 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -1038,6 +1038,19 @@ static inline int brcmnand_sector_1k_shift(struct brcmnand_controller *ctrl) return -1; } +static int brcmnand_get_sector_size_1k(struct brcmnand_host *host) +{ + struct brcmnand_controller *ctrl = host->ctrl; + int shift = brcmnand_sector_1k_shift(ctrl); + u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, + BRCMNAND_CS_ACC_CONTROL); + + if (shift < 0) + return 0; + + return (nand_readreg(ctrl, acc_control_offs) >> shift) & 0x1; +} + static void brcmnand_set_sector_size_1k(struct brcmnand_host *host, int val) { struct brcmnand_controller *ctrl = host->ctrl; @@ -1055,6 +1068,38 @@ static void brcmnand_set_sector_size_1k(struct brcmnand_host *host, int val) nand_writereg(ctrl, acc_control_offs, tmp); } +static int brcmnand_get_spare_size(struct brcmnand_host *host) +{ + struct brcmnand_controller *ctrl = host->ctrl; + u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, + BRCMNAND_CS_ACC_CONTROL); + u32 acc = nand_readreg(ctrl, acc_control_offs); + + return (acc & brcmnand_spare_area_mask(ctrl)); +} + +static int brcmnand_get_ecc_strength(struct brcmnand_host *host) +{ + struct brcmnand_controller *ctrl = host->ctrl; + u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, + BRCMNAND_CS_ACC_CONTROL); + int sector_size_1k = brcmnand_get_sector_size_1k(host); + int spare_area_size, ecc_level, ecc_strength; + u32 acc; + + spare_area_size = brcmnand_get_spare_size(host); + acc = nand_readreg(ctrl, acc_control_offs); + ecc_level = (acc & brcmnand_ecc_level_mask(ctrl)) >> ctrl->ecc_level_shift; + if (sector_size_1k) + ecc_strength = ecc_level * 2; + else if (spare_area_size == 16 && ecc_level == 15) + ecc_strength = 1; /* hamming */ + else + ecc_strength = ecc_level; + + return ecc_strength; +} + /*********************************************************************** * CS_NAND_SELECT ***********************************************************************/ @@ -2622,19 +2667,43 @@ static int brcmnand_setup_dev(struct brcmnand_host *host) nanddev_get_memorg(&chip->base); struct brcmnand_controller *ctrl = host->ctrl; struct brcmnand_cfg *cfg = &host->hwcfg; - char msg[128]; + struct device_node *np = nand_get_flash_node(chip); u32 offs, tmp, oob_sector; - int ret; + int ret, sector_size_1k = 0; + bool use_strap = false; + char msg[128]; memset(cfg, 0, sizeof(*cfg)); + use_strap = of_property_read_bool(np, "brcm,nand-ecc-use-strap"); - ret = of_property_read_u32(nand_get_flash_node(chip), - "brcm,nand-oob-sector-size", + /* + * Set ECC size and strength based on hw configuration from strap + * if brcm,nand-ecc-use-strap is set. However if nand-ecc-strength + * is set, its value will be used and ignore the strap setting. + */ + if (chip->ecc.strength) + use_strap = 0; + + if (use_strap) { + chip->ecc.strength = brcmnand_get_ecc_strength(host); + sector_size_1k = brcmnand_get_sector_size_1k(host); + if (chip->ecc.size == 0) { + if (sector_size_1k < 0) + chip->ecc.size = 512; + else + chip->ecc.size = 512 << sector_size_1k; + } + } + + ret = of_property_read_u32(np, "brcm,nand-oob-sector-size", &oob_sector); if (ret) { - /* Use detected size */ - cfg->spare_area_size = mtd->oobsize / - (mtd->writesize >> FC_SHIFT); + if (use_strap) + cfg->spare_area_size = brcmnand_get_spare_size(host); + else + /* Use detected size */ + cfg->spare_area_size = mtd->oobsize / + (mtd->writesize >> FC_SHIFT); } else { cfg->spare_area_size = oob_sector; } From patchwork Wed Feb 7 20:22:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 13549088 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E7814C4828F for ; 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Wed, 07 Feb 2024 20:24:16 +0000 Received: from mail-lvn-it-01.lvn.broadcom.net (mail-lvn-it-01.lvn.broadcom.net [10.36.132.253]) by relay.smtp-ext.broadcom.com (Postfix) with ESMTP id D7BADC002E04; Wed, 7 Feb 2024 12:24:11 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com D7BADC002E04 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337451; bh=LUvXfylQz7V0uRO9qJXNQP+bE5k1kmYrwKzlIAWOYL8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TlirzqhuOg4tzEbiBkiwG77jPDzlr/bygIvtETqRJAeJSvGAkBKcdW74oig5H971m +TASW5kxTqfJ/6Xr8yMbDxWyWItcj20C4moqq7sQYUl8fEhl9ACvmN0OBcvMqf3Eov 5ycU0qevpNPAqMh/f7IHSu9ryvTDNWpCqmYmBIUg= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id 72E8618041CAC4; Wed, 7 Feb 2024 12:24:10 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , Florian Fainelli , David Regan , Miquel Raynal , linux-kernel@vger.kernel.org, Vignesh Raghavendra , Brian Norris , Richard Weinberger Subject: [PATCH v5 10/12] mtd: rawnand: brcmnand: Support write protection setting from dts Date: Wed, 7 Feb 2024 12:22:55 -0800 Message-Id: <20240207202257.271784-11-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240207_202414_636817_0542095A X-CRM114-Status: GOOD ( 13.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The write protection feature is controlled by the module parameter wp_on with default set to enabled. But not all the board use this feature especially in BCMBCA broadband board. And module parameter is not sufficient as different board can have different option. Add a device tree property and allow this feature to be configured through the board dts on per board basis. Signed-off-by: William Zhang Reviewed-by: Florian Fainelli Reviewed-by: Kamal Dasu Reviewed-by: David Regan --- Changes in v5: None Changes in v4: - Use the new brcm,wp-not-connected property based on the dts binding change Changes in v3: None Changes in v2: None drivers/mtd/nand/raw/brcmnand/brcmnand.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index efeee9e80213..8c1489ff7bd6 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -3218,6 +3218,10 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) /* Disable XOR addressing */ brcmnand_rmw_reg(ctrl, BRCMNAND_CS_XOR, 0xff, 0, 0); + /* Check if the board connects the WP pin */ + if (of_property_read_bool(dn, "brcm,wp-not-connected")) + wp_on = 0; + if (ctrl->features & BRCMNAND_HAS_WP) { /* Permanently disable write protection */ if (wp_on == 2) From patchwork Wed Feb 7 20:22:56 2024 Content-Type: text/plain; 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a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337455; bh=LJwvyvOKR5RJUCQ82QvQcFaSQlghSut08Ka3BcQ0Pc8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=wITfm5rYzDUAMutE/vaLo4aGl2F+KOQ93Xuw1i6tNJ/JyeBft+7D9NzmayFClBqiT do8ErGbitG+vXXW8pCli70B7FjPPLXexdf7kZwxTYPJnY8a/sdELyGjdCkglsQouFj Ed7yEp+Wnam2x8OxTQx7e82CXIrxoxGFTxNPx/BY= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id F3F5018041CAC4; Wed, 7 Feb 2024 12:24:13 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, David Regan , Dan Carpenter , William Zhang , Miquel Raynal , linux-kernel@vger.kernel.org, Vignesh Raghavendra , Brian Norris , Richard Weinberger Subject: [PATCH v5 11/12] mtd: rawnand: brcmnand: exec_op helper functions return type fixes Date: Wed, 7 Feb 2024 12:22:56 -0800 Message-Id: <20240207202257.271784-12-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240207_122416_754577_5414E163 X-CRM114-Status: GOOD ( 15.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: David Regan fix return type for exec_op reset and status detect helper functions Reported-by: Dan Carpenter Closes: http://lists.infradead.org/pipermail/linux-mtd/2023-December/102423.html Fixes: 3c8260ce7663 ("mtd: rawnand: brcmnand: exec_op implementation") Signed-off-by: David Regan Signed-off-by: William Zhang Reviewed-by: William Zhang --- Changes in v5: None Changes in v4: - Fix the commit id in the fixes tag Changes in v3: None Changes in v2: - Added to patch series drivers/mtd/nand/raw/brcmnand/brcmnand.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 8c1489ff7bd6..7ce2b267676f 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -625,7 +625,7 @@ enum { /* Only for v7.2 */ #define ACC_CONTROL_ECC_EXT_SHIFT 13 -static u8 brcmnand_status(struct brcmnand_host *host); +static int brcmnand_status(struct brcmnand_host *host); static inline bool brcmnand_non_mmio_ops(struct brcmnand_controller *ctrl) { @@ -1749,7 +1749,7 @@ static int brcmnand_waitfunc(struct nand_chip *chip) INTFC_FLASH_STATUS; } -static u8 brcmnand_status(struct brcmnand_host *host) +static int brcmnand_status(struct brcmnand_host *host) { struct nand_chip *chip = &host->chip; struct mtd_info *mtd = nand_to_mtd(chip); @@ -1760,7 +1760,7 @@ static u8 brcmnand_status(struct brcmnand_host *host) return brcmnand_waitfunc(chip); } -static u8 brcmnand_reset(struct brcmnand_host *host) +static int brcmnand_reset(struct brcmnand_host *host) { struct nand_chip *chip = &host->chip; @@ -2492,11 +2492,14 @@ static int brcmnand_exec_op(struct nand_chip *chip, if (brcmnand_op_is_status(op)) { status = op->instrs[1].ctx.data.buf.in; - *status = brcmnand_status(host); + ret = brcmnand_status(host); + if (ret < 0) + return ret; + + *status = ret & 0xFF; return 0; - } - else if (brcmnand_op_is_reset(op)) { + } else if (brcmnand_op_is_reset(op)) { ret = brcmnand_reset(host); if (ret < 0) return ret; From patchwork Wed Feb 7 20:22:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 13549040 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 08993C4828F for ; Wed, 7 Feb 2024 20:25:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1707337459; bh=SEUbGpLY/kY+cXDOt4nGhWXvuLxy9O4W4aujYHBLgx4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZIPVbQpSX+4Q7HG6G31j2tj52V5Arp1KquoQWdsWog6U5WWgkqi3EuS9Mb/mfm/vG iupk/k2CeHLXY/uNw7oSFDFmxis6bDppBvoExe0bmXBT+N5/i7Qn9vW2LW7esNO+9E FaBYjVXDts+CWijp8FMkWVhw49fT3YEFF79dJKEA= Received: from bcacpedev-irv-3.lvn.broadcom.net (bcacpedev-irv-3.lvn.broadcom.net [10.173.232.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id 3286918041CAC4; Wed, 7 Feb 2024 12:24:18 -0800 (PST) From: William Zhang To: Linux MTD List , Linux ARM List , Broadcom Kernel List Cc: f.fainelli@gmail.com, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, David Regan , William Zhang , Miquel Raynal , linux-kernel@vger.kernel.org, Vignesh Raghavendra , Brian Norris , Richard Weinberger Subject: [PATCH v5 12/12] mtd: rawnand: brcmnand: update log level messages Date: Wed, 7 Feb 2024 12:22:57 -0800 Message-Id: <20240207202257.271784-13-william.zhang@broadcom.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240207202257.271784-1-william.zhang@broadcom.com> References: <20240207202257.271784-1-william.zhang@broadcom.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240207_122421_392517_BB5C031D X-CRM114-Status: GOOD ( 14.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: David Regan Update log level messages so that more critical messages can be logged to console and help the troubleshooting with field devices. Signed-off-by: David Regan Signed-off-by: William Zhang Reviewed-by: William Zhang --- Changes in v5: - Update the commit message Changes in v4: - Revert the log level change for correctable ecc error Changes in v3: None Changes in v2: - Added to patch series drivers/mtd/nand/raw/brcmnand/brcmnand.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 7ce2b267676f..e50582b45182 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -1143,7 +1143,7 @@ static int bcmnand_ctrl_poll_status(struct brcmnand_host *host, if ((val & mask) == expected_val) return 0; - dev_warn(ctrl->dev, "timeout on status poll (expected %x got %x)\n", + dev_err(ctrl->dev, "timeout on status poll (expected %x got %x)\n", expected_val, val & mask); return -ETIMEDOUT; @@ -2196,7 +2196,7 @@ static int brcmnand_read(struct mtd_info *mtd, struct nand_chip *chip, return err; } - dev_dbg(ctrl->dev, "uncorrectable error at 0x%llx\n", + dev_err(ctrl->dev, "uncorrectable error at 0x%llx\n", (unsigned long long)err_addr); mtd->ecc_stats.failed++; /* NAND layer expects zero on ECC errors */