From patchwork Fri Feb 9 13:45:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13551238 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC8AF3D0DD; Fri, 9 Feb 2024 13:45:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.196 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707486357; cv=none; b=iF1L1YOOZFYc/AFsGUwlqZoVooOrQtryezkc8rui6UUUKgSotitYbMGjF0Iz1uDPEP+MS9zOWNuIxCK/BvkGlGHjWq8AztZLIOZ/lTm11idq0t9h2H+AxJbG67jo1sc/w3d7CHMOebfTmUl3GQd5S+uIJjCL2agJIv1VOlOM95M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707486357; c=relaxed/simple; bh=Mlu7vr7ccML9k5U1wNxC85TsfulmH0bH6bck85b5lTg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=MuZUQI5wLrcBq04ZDZW4aWBuWWyxc0QnOlSgdFyw+owgVEHKWHs5EB1/Wvbl/QlYgmzhY3YMHDKvziixW1eIuRZalpe2H/o1fOIDaRFxLeD08o5JP6agolVjc4YwU1JFxkVz/gSApnDx9AhJ793qTY0/sDVjp+mNfawnbbbeG1Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=R9n/DPM0; arc=none smtp.client-ip=217.70.183.196 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="R9n/DPM0" Received: by mail.gandi.net (Postfix) with ESMTPSA id 8AFDBE0008; Fri, 9 Feb 2024 13:45:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707486353; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=4SqxWl/i5uX0bLJjW8/zyRNlnWT7m4GMIsHrHc5Dq4Y=; b=R9n/DPM0/Sm2ibKK7ibZ4iCOBEn6TEswhd8v12CdgNiE+4W32JnCSNQMHhOxT4+fNAMvbA +KrWM5HbcwKiqNkRwO4RUoYr0UUS0DbTtWN8Y16qlSSikUPIiCpUh6ma2nyaNFrCSFBbOm /gaaWy3qgXga3CVMvFBoSWNlm+l/toSP3wExrhLvl0OfyR95Vsj2Qh38pO2WFJ+5UXY4/6 p2q+NnLSM63MgbvWIXTmBYvUMVSeYUxWfJR/5MfoFyDhQoyjxj3QvXhHtQfMOnEYywUa0r 7rYLNJfDJ2FLRgMHkl6CBrsEcvr+a4seClejYSX+XYuDwNFBIrM/CxGwv3YAIw== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 09 Feb 2024 14:45:30 +0100 Subject: [PATCH 1/4] spi: cadence-qspi: assert each subnode flash CS is valid Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240209-cdns-qspi-cs-v1-1-a4f9dfed9ab4@bootlin.com> References: <20240209-cdns-qspi-cs-v1-0-a4f9dfed9ab4@bootlin.com> In-Reply-To: <20240209-cdns-qspi-cs-v1-0-a4f9dfed9ab4@bootlin.com> To: Mark Brown Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Dhruva Gole , Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com Check each flash CS against the num-cs property from devicetree. Fallback to the driver max supported value (CQSPI_MAX_CHIPSELECT) if num-cs isn't present. cqspi->num_chipselect is set in cqspi_of_get_pdata() to the num-cs devicetree property, or to CQSPI_MAX_CHIPSELECT if num-cs is not set. Signed-off-by: Théo Lebrun Reviewed-by: Dhruva Gole --- drivers/spi/spi-cadence-quadspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index d44a0c501879..7ba4d5d16fd2 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1635,7 +1635,7 @@ static int cqspi_setup_flash(struct cqspi_st *cqspi) return ret; } - if (cs >= CQSPI_MAX_CHIPSELECT) { + if (cs >= cqspi->num_chipselect) { dev_err(dev, "Chip select %d out of range.\n", cs); of_node_put(np); return -EINVAL; From patchwork Fri Feb 9 13:45:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13551239 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 32C823D3AC; Fri, 9 Feb 2024 13:45:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.196 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707486358; cv=none; b=WDJRN7XPk0u6FrGofOkAC6ysWfW5ZhaX5+EzFPPlaKSUiBnBNO4yP4aIhB1QOZh/bXuWNfYYiImhHQ2oPaHMcOrbjLv+nXSXesRZVf5z3onm+MPQVrZSSHZHxd17Tvb/eOpImTi4tIhoSds1I9+P5OSk4fXHERvPn7WUNdp9mqA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707486358; c=relaxed/simple; bh=RauYGwEB1YTMpsZjqNvUtZ7wglKUkFfCZNOF/rIy9m0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ru1CcOP27RFiN+KMqBqFEkijpvl4PabadXjb7IvtJ8owZJkMj+EBK8Cwnw+iqFB+RBe7SgncbM94H04zbIXBTxpTvk/vQx/Igbf7OTprVzYCRGWaRAjw0T6kJvPhZX83xrJVVfeT6NYBk6FMhmXq6AFMMK5cQnf7StgbL8MmF/U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=OYRH+1h9; arc=none smtp.client-ip=217.70.183.196 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="OYRH+1h9" Received: by mail.gandi.net (Postfix) with ESMTPSA id 7C8F1E000B; Fri, 9 Feb 2024 13:45:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707486354; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PRUo6H47Gz8Zmp7Xe0Xi3761MV2avrUEkqq7NMqRIuM=; b=OYRH+1h9ENpOHuQSFbJek3Szzd6unm4XfTm4qZ7EfMiTv9GVWX+RmykyAIHxqijMDTBR99 CteuS62tAnrQrLQmyCDC5qbJu41AYAg9+5p18kkH1IhkJAdvghysHeGk2L6zCcvz0j6YYd fbxwHehejLTbwhRiNJpZecWqlDH1M5Biafh0EwufTQw7TJIDUR+A7vQAp7WggA4f8EhXOx xKeNj1vs4zVVfCjrcPGIICH+KLXa/BXY5eEOxQ+O4GqANA898GXJse7x/BRjHQUVBWD7OP xrWApLTIIvs8JwuyWafrkbEc1qAupScCt9Ie9zVs9Q4avNQhgTo0rEONcKqXQg== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 09 Feb 2024 14:45:31 +0100 Subject: [PATCH 2/4] spi: cadence-qspi: set maximum chip-select to 4 Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240209-cdns-qspi-cs-v1-2-a4f9dfed9ab4@bootlin.com> References: <20240209-cdns-qspi-cs-v1-0-a4f9dfed9ab4@bootlin.com> In-Reply-To: <20240209-cdns-qspi-cs-v1-0-a4f9dfed9ab4@bootlin.com> To: Mark Brown Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Dhruva Gole , Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com Change the maximum chip-select count in cadence-qspi to 4 instead of 16. The value gets used as default ->num_chipselect when the num-cs DT property isn't received from devicetree. It also determines the cqspi->f_pdata array size. Hardware only supports values up to 4; see cqspi_chipselect() that sets CS using a one-bit-per-CS 4-bit register field. Add a static_assert() call as a defensive measure to ensure we stay under the SPI subsystem limit. It got set to 4 when introduced in 4d8ff6b0991d ("spi: Add multi-cs memories support in SPI core") and later increased to 16 in 2f8c7c3715f2 ("spi: Raise limit on number of chip selects"). Signed-off-by: Théo Lebrun --- drivers/spi/spi-cadence-quadspi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 7ba4d5d16fd2..e9e3abd2142c 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -31,7 +31,9 @@ #include #define CQSPI_NAME "cadence-qspi" -#define CQSPI_MAX_CHIPSELECT 16 +#define CQSPI_MAX_CHIPSELECT 4 + +static_assert(CQSPI_MAX_CHIPSELECT <= SPI_CS_CNT_MAX); /* Quirks */ #define CQSPI_NEEDS_WR_DELAY BIT(0) From patchwork Fri Feb 9 13:45:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13551240 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 316AD3CF69; Fri, 9 Feb 2024 13:45:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.196 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707486359; cv=none; b=rOemVSM/AaaMPjJBwrVkbIxYcjwjzqI5gCOi98I1IU01ztCfmxnYUIKfzoYOOMRxECtXPGYEwJDNsr5g5QfHog0lN/demUdd/EMQqsqLvuJWzLzBhmIJoLlfBC/gsr2BYIlahzxmEEpAZhXBJSTe+p/WUkpbq9w64AUAdEP1yu4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707486359; c=relaxed/simple; bh=8g0h2Rpw/9qFXCPzfQOZOoSloJvsAQxCz0t/+7F6CHQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=MeGDB8Y2/4BYsAsSwaXHRgEutOb3SUc+0AI98Db3Q/l1vkx8yIDWTCjYTVPYldBVcNDoJKpnBG6UQq+jIQnncS4CkuTkVCv4LGI7AWMnIvzAe2ofsr016rjx4O+VpBIjftINnd1vOgAxyWygWDfLdVBlXUMhECJt/n2/wuFYglQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=PzCGfNxf; arc=none smtp.client-ip=217.70.183.196 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="PzCGfNxf" Received: by mail.gandi.net (Postfix) with ESMTPSA id 7A77EE0009; Fri, 9 Feb 2024 13:45:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707486355; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=TEFUds+rZrQHnppzDuzVbdDoYn+ud5dF52AFwoFYbLI=; b=PzCGfNxfVkN8VxxqWWz5mDuH2H7UiDyNGJVIPmYXu9G58ZFf/GdY3rAmTUbIzAim9Qkca8 eHkA94i6LKT+YYX+cCHL0OKo6gxGqmvfjblnT3kGCotarsE3aJ+X7IG35KI70Wo7AQRZgv d24ppidtfc7jXS/z29/NYgXW3WpYqihXmRPKo7utVwyzrvdo8RIwypV0/br5CWRL7nNn7u /0mjSJfoY0pZDsHKgsIXNvlJMZFLwkYKPELIXCpOIrI/g5CW0/GPvDSmiNIT6uX9hj5khV 6cVjbRLNLYr99GNeBb6MkG7FKTrfE+nZ/dwubR60nGLnv0IfriXlEVnz+VD5Mg== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 09 Feb 2024 14:45:32 +0100 Subject: [PATCH 3/4] spi: cadence-qspi: report correct number of chip-select Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240209-cdns-qspi-cs-v1-3-a4f9dfed9ab4@bootlin.com> References: <20240209-cdns-qspi-cs-v1-0-a4f9dfed9ab4@bootlin.com> In-Reply-To: <20240209-cdns-qspi-cs-v1-0-a4f9dfed9ab4@bootlin.com> To: Mark Brown Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Dhruva Gole , Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com Set the ->num_chipselect field in struct cqspi_st and struct spi_controller to the current number of chip-select. The value is dependent on declared flashes in devicetree. Previously, the num-cs property from devicetree or the maximum value was being reported. Signed-off-by: Théo Lebrun --- drivers/spi/spi-cadence-quadspi.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index e9e3abd2142c..895c950e7fd6 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1621,6 +1621,7 @@ static const struct spi_controller_mem_caps cqspi_mem_caps = { static int cqspi_setup_flash(struct cqspi_st *cqspi) { + unsigned int max_cs = cqspi->num_chipselect - 1; struct platform_device *pdev = cqspi->pdev; struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; @@ -1641,6 +1642,8 @@ static int cqspi_setup_flash(struct cqspi_st *cqspi) dev_err(dev, "Chip select %d out of range.\n", cs); of_node_put(np); return -EINVAL; + } else if (cs < max_cs) { + max_cs = cs; } f_pdata = &cqspi->f_pdata[cs]; @@ -1654,6 +1657,7 @@ static int cqspi_setup_flash(struct cqspi_st *cqspi) } } + cqspi->num_chipselect = max_cs + 1; return 0; } @@ -1865,14 +1869,14 @@ static int cqspi_probe(struct platform_device *pdev) cqspi->current_cs = -1; cqspi->sclk = 0; - host->num_chipselect = cqspi->num_chipselect; - ret = cqspi_setup_flash(cqspi); if (ret) { dev_err(dev, "failed to setup flash parameters %d\n", ret); goto probe_setup_failed; } + host->num_chipselect = cqspi->num_chipselect; + if (cqspi->use_direct_mode) { ret = cqspi_request_mmap_dma(cqspi); if (ret == -EPROBE_DEFER) From patchwork Fri Feb 9 13:45:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13551241 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 676F73F9F1; Fri, 9 Feb 2024 13:45:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.196 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707486361; cv=none; b=WLV29M67eEaOZVyMxzrtS/FI2AxPB9cbEea/0J76RaaUSj3+6XbcCcLIVcFtzcNCcL1zZxksNHzAUNVbT95yWSd6S2ikArq1fK8LkIkRcnPLSXvzMKu4gji0i/0BTV0l3nkyiGnapsynh3elnBRLyMuB2MDEged4uSlKURInblI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707486361; c=relaxed/simple; bh=x5yS+e1whkCcW1X010hyPSw0T9R1J+tGq/AJHUt+taI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XCJhEHsEpcx7sRzbGDPYb657kom8m8vlByhyBZhzImcvu9hyjfhalMEPQwy4hY8Ik0X4J4b89V0QhBcGwximBI+mio4OekeKm8HC6Dbjyix9lCCX35CXQvMCaDhgEIXuzaQwVGfc7PuiEP0QgcHvMxQoKzekPMIKIdnZfJCkA6U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=oozC31nL; arc=none smtp.client-ip=217.70.183.196 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="oozC31nL" Received: by mail.gandi.net (Postfix) with ESMTPSA id 8726DE000A; Fri, 9 Feb 2024 13:45:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1707486356; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WmJR6rtP7JOiSMvD1eVy/J8FgmNvCY5EiCZrsGZDPYk=; b=oozC31nL1eJOZ2+j1mLC/Dcu2XlJA3UDbLJPJgGQQUAiXyVKDbeVHfEBkr2DhtnUs0b15I 6p+mu2FEkt/Xquhr2tsY2APlkhWWq0dZd0wO9GA3J7EX9vZhMzIECvS+ZE+iTHWbhwxmLs P7LEN6FgpBjXzFjjFmNGk+avzNv8/P62ZgMktanVfhtCXKZlFp108mxXaxxEs5f42yS40O fuGO8pLEAFc3/dQBU/V/oOfi7+10tgJfZ+AktOjuVmAg9ysMbBScsh9AzG/aPvGTl1BV78 c79HG/G3C5/QpL/vlheCqy7A2vF9OhkiYPnTnyS/JP0+itLynLov8E5Cj4nigA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 09 Feb 2024 14:45:33 +0100 Subject: [PATCH 4/4] spi: cadence-qspi: switch from legacy names to modern ones Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240209-cdns-qspi-cs-v1-4-a4f9dfed9ab4@bootlin.com> References: <20240209-cdns-qspi-cs-v1-0-a4f9dfed9ab4@bootlin.com> In-Reply-To: <20240209-cdns-qspi-cs-v1-0-a4f9dfed9ab4@bootlin.com> To: Mark Brown Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Dhruva Gole , Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com Both spi_master_get_devdata() and the ->master field in struct spi_device are part of the compatibility layer provided by . Switch away from them. Signed-off-by: Théo Lebrun --- drivers/spi/spi-cadence-quadspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 895c950e7fd6..7ae3b2329089 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1412,7 +1412,7 @@ static int cqspi_mem_process(struct spi_mem *mem, const struct spi_mem_op *op) static int cqspi_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { int ret; - struct cqspi_st *cqspi = spi_master_get_devdata(mem->spi->master); + struct cqspi_st *cqspi = spi_controller_get_devdata(mem->spi->controller); struct device *dev = &cqspi->pdev->dev; ret = pm_runtime_resume_and_get(dev);