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[93.34.89.13]) by smtp.googlemail.com with ESMTPSA id r17-20020adfe691000000b0033aeb0afa8fsm4969194wrm.39.2024.02.11.12.27.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Feb 2024 12:27:18 -0800 (PST) From: Christian Marangi To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH] ARM: dts: qcom: ipq4019: add QCA8075 PHY Package nodes Date: Sun, 11 Feb 2024 21:26:55 +0100 Message-ID: <20240211202700.17810-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add QCA8075 PHY Package nodes. The PHY nodes that were previously defined never worked and actually never had a driver to correctly setup these PHY. Now that we have a correct driver, correctly add the PHY Package node and set the default value of 300mw for tx driver strength following specification of ipq4019 SoC. Signed-off-by: Christian Marangi --- arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi | 35 +++++++++++++++--------- 1 file changed, 22 insertions(+), 13 deletions(-) diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi index f989bd741cd1..6c97d852d342 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi @@ -603,24 +603,33 @@ mdio: mdio@90000 { reg = <0x90000 0x64>; status = "disabled"; - ethphy0: ethernet-phy@0 { + ethernet-phy-package@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "qcom,qca8075-package"; reg = <0>; - }; - ethphy1: ethernet-phy@1 { - reg = <1>; - }; + qcom,tx-drive-strength-milliwatt = <300>; - ethphy2: ethernet-phy@2 { - reg = <2>; - }; + ethphy0: ethernet-phy@0 { + reg = <0>; + }; - ethphy3: ethernet-phy@3 { - reg = <3>; - }; + ethphy1: ethernet-phy@1 { + reg = <1>; + }; + + ethphy2: ethernet-phy@2 { + reg = <2>; + }; + + ethphy3: ethernet-phy@3 { + reg = <3>; + }; - ethphy4: ethernet-phy@4 { - reg = <4>; + ethphy4: ethernet-phy@4 { + reg = <4>; + }; }; };