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pr=C From: Henry Wang To: CC: Henry Wang , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" Subject: [PATCH] xen/arm: Set correct per-cpu cpu_core_mask Date: Mon, 26 Feb 2024 11:01:46 +0800 Message-ID: <20240226030146.179465-1-xin.wang2@amd.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: None (SATLEXMB04.amd.com: xin.wang2@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001CC:EE_|DS0PR12MB7678:EE_ X-MS-Office365-Filtering-Correlation-Id: 93a58300-57cd-4f5c-c4b6-08dc367748bd X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: nxRUaZoVmBj4tGx+iH7zBh5CxNrWO2qDiEYg80ZgzTYWR1oAYHZV2VYuG19MlYvvb6jlE8Tm0y/v9rT85IKz//lfY/BTKSL89kK1LB7jkNnTKC6acKUNElztJbML2UtnYPE+V41YKNcwCQaZLcwdehlQJdLhK7G5qFIUJAyLZDnt9ReOMHgnn67oSKPjN30xn3yy8k61IMtzv1RxbPEL9y4X1OC7iBL+aRdQ+KHfTg5v5YW86ttOIi/DlDDgbVJcNt2a9iHT8Qa8Idpuf7e65Wbt+bD4iUCY7r2C2TTH0TiKu3PDN21nGSFSTS/uyPexkNkoGuRybK1PEbHTA1FXWCqFfl25lhyFxcPq+CYXSgTvqNFwXXz1SMuoZtETbr7KJo6nYJWsMTW7Br/bWT4opxKeYEjRCGD3Y9CzgQpMskUvHkxETl2QzFSK0TCS0lzY4sz74IxgdT0FXmOz2IXd+DRo/LkF7Lpnd7+KWSaMSkqrHj1OaglqPuCetCOCdjxjfMT0ibAn+wHJWdkZVNX3YaCyW61nrQB6ZkV8EY1V7yxc6s4uAYB/2SxPFfcyzt+9mRnFcn0y47N/lDHnkxfGLKDuaSAE8ihxz0t1jgJj3s6dVNFKaf/bnLA+pU7nRZHAnYUeLR4p3gsxIPSwgSZlcwEq9DBI2XfOlVu07/mceMQ90rnV+HQwwnCUas1jhiEnsrQrk0kfdgxu6ER+BluT+m0byfys+SC3VuZUj15A7Ls0njHCbzQDY8hoDXZUx3K2 X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(36860700004);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Feb 2024 03:01:52.8078 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 93a58300-57cd-4f5c-c4b6-08dc367748bd X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001CC.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7678 In the common sysctl command XEN_SYSCTL_physinfo, the value of cores_per_socket is calculated based on the cpu_core_mask of CPU0. Currently on Arm this is a fixed value 1 (can be checked via xl info), which is not correct. This is because during the Arm CPU online process at boot time, setup_cpu_sibling_map() only sets the per-cpu cpu_core_mask for itself. cores_per_socket refers to the number of cores that belong to the same socket (NUMA node). Currently Xen on Arm does not support physical CPU hotplug and NUMA. Therefore if the MT bit (bit 24) in MPIDR_EL1 is 0, cores_per_socket means all possible CPUs detected from the device tree. Setting the per-cpu cpu_core_mask in setup_cpu_sibling_map() accordingly. Drop the in-code comment which seems to be outdated. Signed-off-by: Henry Wang Reviewed-by: Michal Orzel --- xen/arch/arm/smpboot.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index a84e706d77..d616778655 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -66,7 +66,6 @@ static bool cpu_is_dead; /* ID of the PCPU we're running on */ DEFINE_PER_CPU(unsigned int, cpu_id); -/* XXX these seem awfully x86ish... */ /* representing HT siblings of each logical CPU */ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_mask); /* representing HT and core siblings of each logical CPU */ @@ -89,6 +88,11 @@ static int setup_cpu_sibling_map(int cpu) cpumask_set_cpu(cpu, per_cpu(cpu_sibling_mask, cpu)); cpumask_set_cpu(cpu, per_cpu(cpu_core_mask, cpu)); + /* PE not implemented using a multithreading type approach. */ + if ( system_cpuinfo.mpidr.mt == 0 ) + cpumask_or(per_cpu(cpu_core_mask, cpu), + per_cpu(cpu_core_mask, cpu), &cpu_possible_map); + return 0; }