From patchwork Wed Feb 28 11:27:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575209 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4120D12EBF2; Wed, 28 Feb 2024 11:28:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119701; cv=none; b=DjjOM7RHiiF0ShxwxZwnOVueTretlzHzORZJyFb+HVKTmF5Hg1uLhKxzEmKkJVUnjgqOb+4g21X6R00neVmq+s2yZHPtLOZapYFuz6Zrwvk6LvYH0Ige+8GsNexUSaUeaEZ8jtwlc16Zv5B1GGyj+uuQNcSQVIB+NBrOT5avre8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119701; c=relaxed/simple; bh=Vz9SPJE8farhIihvENIryv9IAcRYm/mAPepMAz2P3kE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=u5jdQZ4omk0J9FBa1kB+LoYCjIgnwCi1l8QNtw1V69JHG/cuI3TZN+x36jIiMIISmd0/EAgtHeGLBxXOgtjseV/lrL52Nm/112DrUyTAL50sST+CNioDVzlnW+cJ/5TWT5o3ju0iF+4urRoVTr4Jwo9i4PEuyGgEjGxjpMn//Uc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=pBoQZ29x; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="pBoQZ29x" Received: by mail.gandi.net (Postfix) with ESMTPSA id CD8DC1BF204; Wed, 28 Feb 2024 11:28:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119691; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=d+8O51qGAeyL9mM1QtsKVOAqzV8blYa5X3FlS/3MyRU=; b=pBoQZ29x7JzynEauavVMcRHTUx9I2fRW982GdqGJnzY/EjCA6mKjSCCPNY/asIg7JqOvm4 XDmMdt43MthuDDY4qNbXXD/P3pAwlbROlOJ1L8DfmkbFJ0GChOpVoX9+oBU9q+HWM2zKIh 93YM5GN7rcjOMQ8eAaQsMMaG95uhVO8StoeB85At8TVNB8JGvRAelV3wkinqtJmEgfq4S0 ZD4s63d4UzZK21L/UvohgUdv7kI53Lg3sorcQJLtvny3fvAd+R05/YJYNxbus1wDwjG/To WMGBJXV8RLWl9p7ZA2/uIONLA0UZmSJ9/932z8u7XJ8UcZtDfxPPq9oH843YEg== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:27:59 +0100 Subject: [PATCH v2 01/30] dt-bindings: gpio: nomadik: convert into yaml format Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-1-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Create gpio/st,nomadik-gpio.yaml json-schema dt-bindings file as a direct translation from gpio-nmk.txt. Remove the txt file. Add clocks and gpio-ranges properties which were missing and are being used in Nomadik devicetrees. Reviewed-by: Linus Walleij Signed-off-by: Théo Lebrun Reviewed-by: Conor Dooley --- .../devicetree/bindings/gpio/gpio-nmk.txt | 31 --------- .../devicetree/bindings/gpio/st,nomadik-gpio.yaml | 76 ++++++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 77 insertions(+), 31 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/gpio-nmk.txt b/Documentation/devicetree/bindings/gpio/gpio-nmk.txt deleted file mode 100644 index 8315ac7780ef..000000000000 --- a/Documentation/devicetree/bindings/gpio/gpio-nmk.txt +++ /dev/null @@ -1,31 +0,0 @@ -Nomadik GPIO controller - -Required properties: -- compatible : Should be "st,nomadik-gpio". -- reg : Physical base address and length of the controller's registers. -- interrupts : The interrupt outputs from the controller. -- #gpio-cells : Should be two: - The first cell is the pin number. - The second cell is used to specify optional parameters: - - bits[3:0] trigger type and level flags: - 1 = low-to-high edge triggered. - 2 = high-to-low edge triggered. - 4 = active high level-sensitive. - 8 = active low level-sensitive. -- gpio-controller : Marks the device node as a GPIO controller. -- interrupt-controller : Marks the device node as an interrupt controller. -- gpio-bank : Specifies which bank a controller owns. -- st,supports-sleepmode : Specifies whether controller can sleep or not - -Example: - - gpio1: gpio@8012e080 { - compatible = "st,nomadik-gpio"; - reg = <0x8012e080 0x80>; - interrupts = <0 120 0x4>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; - st,supports-sleepmode; - gpio-bank = <1>; - }; diff --git a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml new file mode 100644 index 000000000000..69774f36e03f --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/st,nomadik-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nomadik GPIO controller + +description: + The Nomadik GPIO driver handles Nomadik SoC GPIO blocks. This block has also + been called ST STA2X11. On the Nomadik platform, this driver is intertwined + with pinctrl-nomadik. + +maintainers: + - Linus Walleij + +properties: + $nodename: + pattern: "^gpio@[0-9a-f]+$" + + compatible: + const: st,nomadik-gpio + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#gpio-cells": + const: 2 + + gpio-controller: true + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + gpio-bank: + description: System-wide GPIO bank index. + $ref: /schemas/types.yaml#/definitions/uint32 + + st,supports-sleepmode: + description: Whether the controller can sleep or not. + $ref: /schemas/types.yaml#/definitions/flag + + clocks: + maxItems: 1 + + gpio-ranges: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - "#gpio-cells" + - gpio-controller + - interrupt-controller + - gpio-bank + +unevaluatedProperties: false + +examples: + - | + gpio1: gpio@8012e080 { + compatible = "st,nomadik-gpio"; + reg = <0x8012e080 0x80>; + interrupts = <0 120 0x4>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + st,supports-sleepmode; + gpio-bank = <1>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 73bd2851eb4c..854b41ee4dcc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2465,6 +2465,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik.git F: Documentation/devicetree/bindings/arm/ste-* F: Documentation/devicetree/bindings/arm/ux500.yaml F: Documentation/devicetree/bindings/arm/ux500/ +F: Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml F: Documentation/devicetree/bindings/i2c/st,nomadik-i2c.yaml F: arch/arm/boot/dts/st/ste-* F: arch/arm/mach-nomadik/ From patchwork Wed Feb 28 11:28:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575212 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BE3C912F362; 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Express that in devicetree using an optional, generic property. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Linus Walleij Signed-off-by: Théo Lebrun --- Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml index 69774f36e03f..4080e94702d5 100644 --- a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml @@ -51,6 +51,10 @@ properties: gpio-ranges: maxItems: 1 + ngpios: + minimum: 0 + maximum: 32 + required: - compatible - reg From patchwork Wed Feb 28 11:28:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575213 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B876212F38F; Wed, 28 Feb 2024 11:28:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119703; cv=none; b=nYXF+kQeENJvxgi2SUsdOq51/kQPgJkYPMfT9pFBYTqZEaABZb0pFEUoKo3tdQksTY8JeWPQoBWFm9JzpR9a8EBcBvG9AjpgvXdHzKTiWuSXR1Kg50jcB+fom7fZi4ZbKntjenPdhuegqp5ijA1T464C8e5N3dhPI6pEJ1uO+OU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119703; c=relaxed/simple; bh=5/D2H8iA6Ufzd19sWQrvOhKy6ggsMPXM93NQPtmqEFw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dI1HaRmha7bKOJ2hdIQX9cXp32wo0d6bQV0wk61iUoVl/9QCw6bDuFHuWvOSO3pGEczg6RjCy8s8amdx13AV0Zf4VR/0UhWiBuVCGuusFK/uyd0IIdVNGKiR7vdR85ItNfFDSur82/nM1bUEuARZbsnRhpjk8Sb66LTEA4xPX8E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=ZE6bK4sj; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="ZE6bK4sj" Received: by mail.gandi.net (Postfix) with ESMTPSA id 5A7E11BF205; Wed, 28 Feb 2024 11:28:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119693; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hnc2fMbNDrMwlNP05nuoqg0x6uxvqA1VAcuazwBJ2Z4=; b=ZE6bK4sj1PDrbNqpeHte/TwxmSIvNGIUOpi1iQ419L/ddj9l2qejh+6gfw0it6BXMc/GxO OvsA22huB7hpbqPfn7QCWKUwbmGUomvZGIDFivvmiM30+fR+CsARDtWS4J0MB9KuTqj8Ho NvsBgLE4R9JOp8i9MW7GWQOG5GMAUff2+00b/SQPm83aQ9LEWW4y65TlP4n/apqn0vFh4L TFkWLBZWZmKmKN8aN1ay9sy7xvlnvkjF7pJcn8Z+8l/RmQvw5sYN2sKaHC3Y7X3lw3g3Yi BRckKp0BrZDMBBgDmx0f2CQER3ZK+it4IFTIrPMsQWPOgdi/Fd+I592NDuQuWA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:01 +0100 Subject: [PATCH v2 03/30] dt-bindings: gpio: nomadik: add mobileye,eyeq5-gpio compatible Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-3-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com This GPIO controller is used on the Mobileye EyeQ5 SoC. Add its compatible to the dt-bindings. One difference is that the block as integrated on EyeQ5 does not support sleep-mode. Signed-off-by: Théo Lebrun Acked-by: Conor Dooley --- .../devicetree/bindings/gpio/st,nomadik-gpio.yaml | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml index 4080e94702d5..8e7f21988e9e 100644 --- a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml @@ -19,7 +19,9 @@ properties: pattern: "^gpio@[0-9a-f]+$" compatible: - const: st,nomadik-gpio + enum: + - st,nomadik-gpio + - mobileye,eyeq5-gpio reg: maxItems: 1 @@ -66,6 +68,16 @@ required: unevaluatedProperties: false +allOf: + - if: + properties: + compatible: + contains: + const: mobileye,eyeq5-gpio + then: + properties: + st,supports-sleepmode: false + examples: - | gpio1: gpio@8012e080 { From patchwork Wed Feb 28 11:28:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575214 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5921A135A6A; Wed, 28 Feb 2024 11:28:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119703; cv=none; b=Hl0kN15KHz4fteDfFXQGSz0rlwCNjk2IF5lwNZIUvmtS9SxmLCs28UfMyYKiHNbtYccAqligXPnLucgnqU+JkAMl/zgY33BFnd8x41PA/FREkFXxeFkjEXlozjMZOJkpfCO7Gb0Wpel6/IzemALWelZJ1QO4JsZjOaFUjMiHPU0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119703; c=relaxed/simple; bh=fPuVHwU5jX5nD+1h/6YNzAbeSmVDgb8M6NG+eaZfqUw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=sgP+0ITPEk8XOiFnn2mvKFm6KWKleigzWS8Ly4zhxNfu/GWBDf/x/wy3vFpH7j15tUPNDOx9qOEx2iCOINOqZ12dMSRIF9obZCKLSbbh3Thk3vA7hAKwpAwWKc/4Jc2F7e1FwQizQNlKB/SZCk8jkTIZ99emDj8Nb9UuxPcV5c0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Z2DQtAtQ; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Z2DQtAtQ" Received: by mail.gandi.net (Postfix) with ESMTPSA id 1EDA51BF212; Wed, 28 Feb 2024 11:28:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119693; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6E8DyiuB0JvDBPML9y1oxUYBvvH5OXltksY0VNJeeX0=; b=Z2DQtAtQ/Z4UKund46HCYaEDp8axA0eOhy8BCqhZJhdHckIabRJZYpreOlUqr4SS5II31Z Q+6fZO7OBa0Ea5fsbpiQzpBBVFf2WdgAOOkYpWWqH/wglnvoJmhF7Vc7jFrk+JefHT2gwg GeFDjuc8jljVv7gXk1Y6+pdEcQaSuorOHGHhBo5yLmbDqJI6d1cU+NJtrZZxirZr5SqKQe idMlXm5t0/8SjjEImSuUdTjYiOJ0FhlKanexvuRkaodJdZqtM73ctQybmfhgMAc7Vz/ha8 g0BV1Ntm2HGvF4FrZv1S/prMUJG7ljZwa9RTUySxAVWXpOmIyzvCNEjeeReo6Q== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:02 +0100 Subject: [PATCH v2 04/30] dt-bindings: gpio: nomadik: add optional reset property Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-4-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= , Krzysztof Kozlowski X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Add optional reset device-tree property to the Nomadik GPIO controller. Acked-by: Krzysztof Kozlowski Reviewed-by: Linus Walleij Signed-off-by: Théo Lebrun --- Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml index 8e7f21988e9e..c624e20c3ed3 100644 --- a/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml @@ -57,6 +57,9 @@ properties: minimum: 0 maximum: 32 + resets: + maxItems: 1 + required: - compatible - reg From patchwork Wed Feb 28 11:28:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575215 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 59257135A6B; Wed, 28 Feb 2024 11:28:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119703; cv=none; b=JCpsiTmRAZTcadD63zKqKnw+g6hSCLDcP1orPmZ676zV8cdP2ha3OnvD9BXjqpRTtUR6Wr0AVBljdcbRbdMqkUM2/pChSuOgc2ZJQvxL3FIeXgWQd0XyKmej+kFfBeAjXdJRvZZlD478s34acYvmJvphXCS2Vb3f8znwcKDSxJg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119703; c=relaxed/simple; bh=aS4vsmKOiyXUzu/gtsh1LG1nA/WQDCKMrN7hnt9Q3Pw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=n+3AnWdaW+M7cKHKkTZ8YRjFnvqABN6vWG/gQYfDgb0auJBosLZXnZDnEZPBTqXig9TeaegQo/da2an3TVyeB1JGaJ6ijm2ZWu1sGORDQGITnSodm9XZR5z8SJJxEwCwoQgggWztDUtUnaHEQqPsVfmejzCUf8Eyqda0Ye0WPvM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=UY4k68Fm; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="UY4k68Fm" Received: by mail.gandi.net (Postfix) with ESMTPSA id D60371BF207; Wed, 28 Feb 2024 11:28:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119694; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=obEsZr5TqYQ+s6w0haLqPuWmQvfUOmeEY6NOi1OIfoc=; b=UY4k68Fmjuo+t50X2+k2fLHa0B33dKhPVDyu/+wbj+/NL9OdUOXrCDuFHyahShKI6kP2A+ fEDyx5UVsjQZgPhLVSNwUNa3NeFkg28U4lyIYJtLAiKGHsjLzWRQv56HGwZUwzo+4Et5Yg 4wjXYZQu7nsTZG3jLYsg6zFBZr9qeJDKo83dSbju/C3c7fj8uMaIq+vtpYd6YaCxzHs59H TT3ilkazvII1wpQ1rn4UhX8+6pmMgQQAQWGq8dImgjVfF1BV6epGb46HtN+lt6VnwrPHN1 bl36D8DRnLJjske06uyabkqYtXZSXF7af0WfLp569fp7Si7Ihk0jR2GDq6JiDQ== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:03 +0100 Subject: [PATCH v2 05/30] gpio: nomadik: fix offset bug in nmk_pmx_set() Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-5-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Previously, the statement looked like: slpm[x] &= ~BIT(g->grp.pins[i]); Where: - slpm is a unsigned int pointer; - g->grp.pins[i] is a pin number. It can grow to more than 32. The expected shift amount is a pin bank offset. This bug does not occur on every group or pin: the altsetting must be NMK_GPIO_ALT_C and the pin must be 32 or above. It might have occured. For example, in pinctrl-nomadik-db8500.c, pin group i2c3_c_2 has the right altsetting and pins 229 and 230. Fixes: dbfe8ca259e1 ("pinctrl/nomadik: implement pin multiplexing") Reviewed-by: Linus Walleij Signed-off-by: Théo Lebrun --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 7911353ac97d..4f7c4af4f93c 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1579,8 +1579,10 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, * Then mask the pins that need to be sleeping now when we're * switching to the ALT C function. */ - for (i = 0; i < g->grp.npins; i++) - slpm[g->grp.pins[i] / NMK_GPIO_PER_CHIP] &= ~BIT(g->grp.pins[i]); + for (i = 0; i < g->grp.npins; i++) { + unsigned int bit = g->grp.pins[i] % NMK_GPIO_PER_CHIP; + slpm[g->grp.pins[i] / NMK_GPIO_PER_CHIP] &= ~BIT(bit); + } nmk_gpio_glitch_slpm_init(slpm); } From patchwork Wed Feb 28 11:28:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575224 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 48C9B13A86F; Wed, 28 Feb 2024 11:28:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119707; cv=none; b=Slcd0H2kR09Tb2YncasSvDOUvwQPV7vJe4UfaGdCU1v4Sr79b4gWqDHccRAG/PC4Y5tQNEyWGxqxg8iLcI6P6guKeQJb+xFBgiVc99vg6FxsxpAax8tRforM4nxJzFQJ/xdDC76gD9i7pFoENLXni8j6bBK1z9F7+6L6+aBdPho= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119707; c=relaxed/simple; bh=Ri/d1vMpjMPgMD9153AJ8XGTEorpUYn9b3u6QnyK0ys=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eV1JKK9rQZFhtAOfqBSD3f1q0s4um7miLkHXFBL8kr0L1EhJpYMwGYHeWx7tHCA7uYZPUQsHK3kwhped/QGzckcN0lalre62JXBofLe8uVgZu2bruhBpnzjreLR3PFOOG8onMWEoOqDqLVnLhr8c/Nr1VsUr0+OXWAlad4RpOBs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=iEcEB5nv; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="iEcEB5nv" Received: by mail.gandi.net (Postfix) with ESMTPSA id 9F9061BF217; Wed, 28 Feb 2024 11:28:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119695; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PfclauG6FiROWhZPVsgdSsTzW/5hIO8cFkLBtWgRcPU=; b=iEcEB5nvURa4IZu07F9dnfi8xWa31fCk+S6ii3GMLwI3D5cN7v/Gq+Xt35xCbfnzfEOi9C lEUK5VqUPjExoP7vA3+4Yh/pu1EIv9zhm+IocxFmLq/g99wVZcQxI1jObC2Q6vSXLTJ+WF xGc5zg3ViWq4wrj9pkf8/Hs3kh0jh9uEob5ZwNRKJH8/fZH7mIhDdWy4kIDwc6eI9M/DQ8 rqka1f39RWqY3dEluo3wVW9JME558Va+NiRHnGRtO9NOXHM3HsLX0pCFnNBkHwazdZx6kG KGXT+ffRSFAZSt57uLC+1z/eZTsZFU0LxzWKyph8VJwLmvIEa3n2uEKc2PD//A== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:04 +0100 Subject: [PATCH v2 06/30] gpio: nomadik: extract GPIO platform driver from drivers/pinctrl/nomadik/ Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-6-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Previously, drivers/pinctrl/nomadik/pinctrl-nomadik.c registered two platform drivers: pinctrl & GPIO. Move the GPIO aspect to the drivers/gpio/ folder, as would be expected. Both drivers are intertwined for a reason; pinctrl requires access to GPIO registers for pinmuxing, pull-disable, disabling interrupts while setting the muxing and wakeup control. Information sharing is done through a shared array containing GPIO chips and a few helper functions. That shared array is not touched from gpio-nomadik when CONFIG_PINCTRL_NOMADIK is not defined. Make no change to the code that moved into gpio-nomadik; there should be no behavior change following. A few functions are shared and header comments are added. Checkpatch warnings are addressed. NUM_BANKS is renamed to NMK_MAX_BANKS. It is supported to compile gpio-nomadik without pinctrl-nomadik. The opposite is not true. Signed-off-by: Théo Lebrun --- MAINTAINERS | 1 + drivers/gpio/Kconfig | 12 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-nomadik.c | 660 +++++++++++++++++++ drivers/pinctrl/nomadik/Kconfig | 5 +- drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c | 3 +- drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c | 3 +- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 722 +-------------------- .../linux/gpio/gpio-nomadik.h | 122 +++- 9 files changed, 804 insertions(+), 725 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 854b41ee4dcc..5a207d19d7c2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2474,6 +2474,7 @@ F: drivers/clk/clk-nomadik.c F: drivers/clocksource/clksrc-dbx500-prcmu.c F: drivers/dma/ste_dma40* F: drivers/pmdomain/st/ste-ux500-pm-domain.c +F: drivers/gpio/gpio-nomadik.c F: drivers/hwspinlock/u8500_hsem.c F: drivers/i2c/busses/i2c-nomadik.c F: drivers/iio/adc/ab8500-gpadc.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 1301cec94f12..ff83371251c1 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -478,6 +478,18 @@ config GPIO_MXS select GPIO_GENERIC select GENERIC_IRQ_CHIP +config GPIO_NOMADIK + bool "Nomadik GPIO driver" + depends on ARCH_U8500 || ARCH_NOMADIK || COMPILE_TEST + select OF_GPIO + select GPIOLIB_IRQCHIP + help + Say yes here to support the Nomadik SoC GPIO block. + + It handles up to 32 GPIOs per bank, that can all be interrupt sources. + It is deeply interconnected with the associated pinctrl driver as GPIO + registers handle muxing ("alternate functions") as well. + config GPIO_NPCM_SGPIO bool "Nuvoton SGPIO support" depends on ARCH_NPCM || COMPILE_TEST diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 9e40af196aae..9fc2f5931b22 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -116,6 +116,7 @@ obj-$(CONFIG_GPIO_MT7621) += gpio-mt7621.o obj-$(CONFIG_GPIO_MVEBU) += gpio-mvebu.o obj-$(CONFIG_GPIO_MXC) += gpio-mxc.o obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o +obj-$(CONFIG_GPIO_NOMADIK) += gpio-nomadik.o obj-$(CONFIG_GPIO_NPCM_SGPIO) += gpio-npcm-sgpio.o obj-$(CONFIG_GPIO_OCTEON) += gpio-octeon.o obj-$(CONFIG_GPIO_OMAP) += gpio-omap.o diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c new file mode 100644 index 000000000000..e39477e1a58f --- /dev/null +++ b/drivers/gpio/gpio-nomadik.c @@ -0,0 +1,660 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * GPIO driver for the IP block found in the Nomadik SoC; it is an AMBA device, + * managing 32 pins with alternate functions. It can also handle the STA2X11 + * block from ST. + * + * The GPIO chips are shared with pinctrl-nomadik if used; it needs access for + * pinmuxing functionality and others. + * + * Copyright (C) 2008,2009 STMicroelectronics + * Copyright (C) 2009 Alessandro Rubini + * Rewritten based on work by Prafulla WADASKAR + * Copyright (C) 2011-2013 Linus Walleij + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#ifndef CONFIG_PINCTRL_NOMADIK +static DEFINE_SPINLOCK(nmk_gpio_slpm_lock); +#endif + +void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, unsigned int offset, + enum nmk_gpio_slpm mode) +{ + u32 slpm; + + slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC); + if (mode == NMK_GPIO_SLPM_NOCHANGE) + slpm |= BIT(offset); + else + slpm &= ~BIT(offset); + writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC); +} + +static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip, + unsigned int offset, int val) +{ + if (val) + writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATS); + else + writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATC); +} + +void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip, + unsigned int offset, int val) +{ + writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRS); + __nmk_gpio_set_output(nmk_chip, offset, val); +} + +/* IRQ functions */ + +static void nmk_gpio_irq_ack(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + clk_enable(nmk_chip->clk); + writel(BIT(d->hwirq), nmk_chip->addr + NMK_GPIO_IC); + clk_disable(nmk_chip->clk); +} + +enum nmk_gpio_irq_type { + NORMAL, + WAKE, +}; + +static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, + int offset, enum nmk_gpio_irq_type which, + bool enable) +{ + u32 *rimscval; + u32 *fimscval; + u32 rimscreg; + u32 fimscreg; + + if (which == NORMAL) { + rimscreg = NMK_GPIO_RIMSC; + fimscreg = NMK_GPIO_FIMSC; + rimscval = &nmk_chip->rimsc; + fimscval = &nmk_chip->fimsc; + } else { + rimscreg = NMK_GPIO_RWIMSC; + fimscreg = NMK_GPIO_FWIMSC; + rimscval = &nmk_chip->rwimsc; + fimscval = &nmk_chip->fwimsc; + } + + /* we must individually set/clear the two edges */ + if (nmk_chip->edge_rising & BIT(offset)) { + if (enable) + *rimscval |= BIT(offset); + else + *rimscval &= ~BIT(offset); + writel(*rimscval, nmk_chip->addr + rimscreg); + } + if (nmk_chip->edge_falling & BIT(offset)) { + if (enable) + *fimscval |= BIT(offset); + else + *fimscval &= ~BIT(offset); + writel(*fimscval, nmk_chip->addr + fimscreg); + } +} + +static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip, + int offset, bool on) +{ + /* + * Ensure WAKEUP_ENABLE is on. No need to disable it if wakeup is + * disabled, since setting SLPM to 1 increases power consumption, and + * wakeup is anyhow controlled by the RIMSC and FIMSC registers. + */ + if (nmk_chip->sleepmode && on) { + __nmk_gpio_set_slpm(nmk_chip, offset, + NMK_GPIO_SLPM_WAKEUP_ENABLE); + } + + __nmk_gpio_irq_modify(nmk_chip, offset, WAKE, on); +} + +static void nmk_gpio_irq_maskunmask(struct nmk_gpio_chip *nmk_chip, + struct irq_data *d, bool enable) +{ + unsigned long flags; + + clk_enable(nmk_chip->clk); + spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); + spin_lock(&nmk_chip->lock); + + __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, enable); + + if (!(nmk_chip->real_wake & BIT(d->hwirq))) + __nmk_gpio_set_wake(nmk_chip, d->hwirq, enable); + + spin_unlock(&nmk_chip->lock); + spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); + clk_disable(nmk_chip->clk); +} + +static void nmk_gpio_irq_mask(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + nmk_gpio_irq_maskunmask(nmk_chip, d, false); + gpiochip_disable_irq(gc, irqd_to_hwirq(d)); +} + +static void nmk_gpio_irq_unmask(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + gpiochip_enable_irq(gc, irqd_to_hwirq(d)); + nmk_gpio_irq_maskunmask(nmk_chip, d, true); +} + +static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + unsigned long flags; + + clk_enable(nmk_chip->clk); + spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); + spin_lock(&nmk_chip->lock); + + if (irqd_irq_disabled(d)) + __nmk_gpio_set_wake(nmk_chip, d->hwirq, on); + + if (on) + nmk_chip->real_wake |= BIT(d->hwirq); + else + nmk_chip->real_wake &= ~BIT(d->hwirq); + + spin_unlock(&nmk_chip->lock); + spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); + clk_disable(nmk_chip->clk); + + return 0; +} + +static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + bool enabled = !irqd_irq_disabled(d); + bool wake = irqd_is_wakeup_set(d); + unsigned long flags; + + if (type & IRQ_TYPE_LEVEL_HIGH) + return -EINVAL; + if (type & IRQ_TYPE_LEVEL_LOW) + return -EINVAL; + + clk_enable(nmk_chip->clk); + spin_lock_irqsave(&nmk_chip->lock, flags); + + if (enabled) + __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, false); + + if (enabled || wake) + __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false); + + nmk_chip->edge_rising &= ~BIT(d->hwirq); + if (type & IRQ_TYPE_EDGE_RISING) + nmk_chip->edge_rising |= BIT(d->hwirq); + + nmk_chip->edge_falling &= ~BIT(d->hwirq); + if (type & IRQ_TYPE_EDGE_FALLING) + nmk_chip->edge_falling |= BIT(d->hwirq); + + if (enabled) + __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, true); + + if (enabled || wake) + __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, true); + + spin_unlock_irqrestore(&nmk_chip->lock, flags); + clk_disable(nmk_chip->clk); + + return 0; +} + +static unsigned int nmk_gpio_irq_startup(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + clk_enable(nmk_chip->clk); + nmk_gpio_irq_unmask(d); + return 0; +} + +static void nmk_gpio_irq_shutdown(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + nmk_gpio_irq_mask(d); + clk_disable(nmk_chip->clk); +} + +static void nmk_gpio_irq_handler(struct irq_desc *desc) +{ + struct irq_chip *host_chip = irq_desc_get_chip(desc); + struct gpio_chip *chip = irq_desc_get_handler_data(desc); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + u32 status; + + chained_irq_enter(host_chip, desc); + + clk_enable(nmk_chip->clk); + status = readl(nmk_chip->addr + NMK_GPIO_IS); + clk_disable(nmk_chip->clk); + + while (status) { + int bit = __ffs(status); + + generic_handle_domain_irq(chip->irq.domain, bit); + status &= ~BIT(bit); + } + + chained_irq_exit(host_chip, desc); +} + +/* I/O Functions */ + +static int nmk_gpio_get_dir(struct gpio_chip *chip, unsigned int offset) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + int dir; + + clk_enable(nmk_chip->clk); + + dir = readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset); + + clk_disable(nmk_chip->clk); + + if (dir) + return GPIO_LINE_DIRECTION_OUT; + + return GPIO_LINE_DIRECTION_IN; +} + +static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned int offset) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + + clk_enable(nmk_chip->clk); + + writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRC); + + clk_disable(nmk_chip->clk); + + return 0; +} + +static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned int offset) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + int value; + + clk_enable(nmk_chip->clk); + + value = !!(readl(nmk_chip->addr + NMK_GPIO_DAT) & BIT(offset)); + + clk_disable(nmk_chip->clk); + + return value; +} + +static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned int offset, + int val) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + + clk_enable(nmk_chip->clk); + + __nmk_gpio_set_output(nmk_chip, offset, val); + + clk_disable(nmk_chip->clk); +} + +static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned int offset, + int val) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + + clk_enable(nmk_chip->clk); + + __nmk_gpio_make_output(nmk_chip, offset, val); + + clk_disable(nmk_chip->clk); + + return 0; +} + +#ifdef CONFIG_DEBUG_FS + +static int nmk_gpio_get_mode(struct nmk_gpio_chip *nmk_chip, int offset) +{ + u32 afunc, bfunc; + + clk_enable(nmk_chip->clk); + + afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & BIT(offset); + bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & BIT(offset); + + clk_disable(nmk_chip->clk); + + return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0); +} + +void nmk_gpio_dbg_show_one(struct seq_file *s, struct pinctrl_dev *pctldev, + struct gpio_chip *chip, unsigned int offset, + unsigned int gpio) +{ + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); + int mode; + bool is_out; + bool data_out; + bool pull; + static const char * const modes[] = { + [NMK_GPIO_ALT_GPIO] = "gpio", + [NMK_GPIO_ALT_A] = "altA", + [NMK_GPIO_ALT_B] = "altB", + [NMK_GPIO_ALT_C] = "altC", + [NMK_GPIO_ALT_C + 1] = "altC1", + [NMK_GPIO_ALT_C + 2] = "altC2", + [NMK_GPIO_ALT_C + 3] = "altC3", + [NMK_GPIO_ALT_C + 4] = "altC4", + }; + + char *label = gpiochip_dup_line_label(chip, offset); + if (IS_ERR(label)) + return; + + clk_enable(nmk_chip->clk); + is_out = !!(readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset)); + pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & BIT(offset)); + data_out = !!(readl(nmk_chip->addr + NMK_GPIO_DAT) & BIT(offset)); + mode = nmk_gpio_get_mode(nmk_chip, offset); +#ifdef CONFIG_PINCTRL_NOMADIK + if (mode == NMK_GPIO_ALT_C && pctldev) + mode = nmk_prcm_gpiocr_get_mode(pctldev, gpio); +#endif + + if (is_out) { + seq_printf(s, " gpio-%-3d (%-20.20s) out %s %s", + gpio, + label ?: "(none)", + data_out ? "hi" : "lo", + (mode < 0) ? "unknown" : modes[mode]); + } else { + int irq = chip->to_irq(chip, offset); + const int pullidx = pull ? 1 : 0; + int val; + static const char * const pulls[] = { + "none ", + "pull enabled", + }; + + seq_printf(s, " gpio-%-3d (%-20.20s) in %s %s", + gpio, + label ?: "(none)", + pulls[pullidx], + (mode < 0) ? "unknown" : modes[mode]); + + val = nmk_gpio_get_input(chip, offset); + seq_printf(s, " VAL %d", val); + + /* + * This races with request_irq(), set_irq_type(), + * and set_irq_wake() ... but those are "rare". + */ + if (irq > 0 && irq_has_action(irq)) { + char *trigger; + bool wake; + + if (nmk_chip->edge_rising & BIT(offset)) + trigger = "edge-rising"; + else if (nmk_chip->edge_falling & BIT(offset)) + trigger = "edge-falling"; + else + trigger = "edge-undefined"; + + wake = !!(nmk_chip->real_wake & BIT(offset)); + + seq_printf(s, " irq-%d %s%s", + irq, trigger, wake ? " wakeup" : ""); + } + } + clk_disable(nmk_chip->clk); +} + +static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) +{ + unsigned int i, gpio = chip->base; + + for (i = 0; i < chip->ngpio; i++, gpio++) { + nmk_gpio_dbg_show_one(s, NULL, chip, i, gpio); + seq_puts(s, "\n"); + } +} + +#else + +static inline void nmk_gpio_dbg_show_one(struct seq_file *s, + struct pinctrl_dev *pctldev, + struct gpio_chip *chip, + unsigned int offset, + unsigned int gpio) +{ +} + +#define nmk_gpio_dbg_show NULL + +#endif + +/* + * We will allocate memory for the state container using devm* allocators + * binding to the first device reaching this point, it doesn't matter if + * it is the pin controller or GPIO driver. However we need to use the right + * platform device when looking up resources so pay attention to pdev. + */ +struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, + struct platform_device *pdev) +{ + struct nmk_gpio_chip *nmk_chip; + struct platform_device *gpio_pdev; + struct gpio_chip *chip; + struct resource *res; + struct clk *clk; + void __iomem *base; + u32 id; + + gpio_pdev = of_find_device_by_node(np); + if (!gpio_pdev) { + pr_err("populate \"%pOFn\": device not found\n", np); + return ERR_PTR(-ENODEV); + } + if (of_property_read_u32(np, "gpio-bank", &id)) { + dev_err(&pdev->dev, "populate: gpio-bank property not found\n"); + platform_device_put(gpio_pdev); + return ERR_PTR(-EINVAL); + } + +#ifdef CONFIG_PINCTRL_NOMADIK + /* Already populated? */ + nmk_chip = nmk_gpio_chips[id]; + if (nmk_chip) { + platform_device_put(gpio_pdev); + return nmk_chip; + } +#endif + + nmk_chip = devm_kzalloc(&pdev->dev, sizeof(*nmk_chip), GFP_KERNEL); + if (!nmk_chip) { + platform_device_put(gpio_pdev); + return ERR_PTR(-ENOMEM); + } + + nmk_chip->bank = id; + chip = &nmk_chip->chip; + chip->base = id * NMK_GPIO_PER_CHIP; + chip->ngpio = NMK_GPIO_PER_CHIP; + chip->label = dev_name(&gpio_pdev->dev); + chip->parent = &gpio_pdev->dev; + + res = platform_get_resource(gpio_pdev, IORESOURCE_MEM, 0); + base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(base)) { + platform_device_put(gpio_pdev); + return ERR_CAST(base); + } + nmk_chip->addr = base; + + clk = clk_get(&gpio_pdev->dev, NULL); + if (IS_ERR(clk)) { + platform_device_put(gpio_pdev); + return (void *)clk; + } + clk_prepare(clk); + nmk_chip->clk = clk; + +#ifdef CONFIG_PINCTRL_NOMADIK + BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips)); + nmk_gpio_chips[id] = nmk_chip; +#endif + return nmk_chip; +} + +static void nmk_gpio_irq_print_chip(struct irq_data *d, struct seq_file *p) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); + + seq_printf(p, "nmk%u-%u-%u", nmk_chip->bank, + gc->base, gc->base + gc->ngpio - 1); +} + +static const struct irq_chip nmk_irq_chip = { + .irq_ack = nmk_gpio_irq_ack, + .irq_mask = nmk_gpio_irq_mask, + .irq_unmask = nmk_gpio_irq_unmask, + .irq_set_type = nmk_gpio_irq_set_type, + .irq_set_wake = nmk_gpio_irq_set_wake, + .irq_startup = nmk_gpio_irq_startup, + .irq_shutdown = nmk_gpio_irq_shutdown, + .irq_print_chip = nmk_gpio_irq_print_chip, + .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + +static int nmk_gpio_probe(struct platform_device *dev) +{ + struct device_node *np = dev->dev.of_node; + struct nmk_gpio_chip *nmk_chip; + struct gpio_chip *chip; + struct gpio_irq_chip *girq; + bool supports_sleepmode; + int irq; + int ret; + + nmk_chip = nmk_gpio_populate_chip(np, dev); + if (IS_ERR(nmk_chip)) { + dev_err(&dev->dev, "could not populate nmk chip struct\n"); + return PTR_ERR(nmk_chip); + } + + supports_sleepmode = + of_property_read_bool(np, "st,supports-sleepmode"); + + /* Correct platform device ID */ + dev->id = nmk_chip->bank; + + irq = platform_get_irq(dev, 0); + if (irq < 0) + return irq; + + /* + * The virt address in nmk_chip->addr is in the nomadik register space, + * so we can simply convert the resource address, without remapping + */ + nmk_chip->sleepmode = supports_sleepmode; + spin_lock_init(&nmk_chip->lock); + + chip = &nmk_chip->chip; + chip->parent = &dev->dev; + chip->request = gpiochip_generic_request; + chip->free = gpiochip_generic_free; + chip->get_direction = nmk_gpio_get_dir; + chip->direction_input = nmk_gpio_make_input; + chip->get = nmk_gpio_get_input; + chip->direction_output = nmk_gpio_make_output; + chip->set = nmk_gpio_set_output; + chip->dbg_show = nmk_gpio_dbg_show; + chip->can_sleep = false; + chip->owner = THIS_MODULE; + + girq = &chip->irq; + gpio_irq_chip_set_chip(girq, &nmk_irq_chip); + girq->parent_handler = nmk_gpio_irq_handler; + girq->num_parents = 1; + girq->parents = devm_kcalloc(&dev->dev, 1, + sizeof(*girq->parents), + GFP_KERNEL); + if (!girq->parents) + return -ENOMEM; + girq->parents[0] = irq; + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_edge_irq; + + clk_enable(nmk_chip->clk); + nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI); + clk_disable(nmk_chip->clk); + + ret = gpiochip_add_data(chip, nmk_chip); + if (ret) + return ret; + + platform_set_drvdata(dev, nmk_chip); + + dev_info(&dev->dev, "chip registered\n"); + + return 0; +} + +static const struct of_device_id nmk_gpio_match[] = { + { .compatible = "st,nomadik-gpio", }, + {} +}; + +static struct platform_driver nmk_gpio_driver = { + .driver = { + .name = "gpio", + .of_match_table = nmk_gpio_match, + }, + .probe = nmk_gpio_probe, +}; + +static int __init nmk_gpio_init(void) +{ + return platform_driver_register(&nmk_gpio_driver); +} +subsys_initcall(nmk_gpio_init); diff --git a/drivers/pinctrl/nomadik/Kconfig b/drivers/pinctrl/nomadik/Kconfig index 0fea167c283f..f47f0755a835 100644 --- a/drivers/pinctrl/nomadik/Kconfig +++ b/drivers/pinctrl/nomadik/Kconfig @@ -22,11 +22,10 @@ if (ARCH_U8500 || ARCH_NOMADIK) config PINCTRL_NOMADIK bool "Nomadik pin controller driver" - depends on OF && GPIOLIB + depends on OF select PINMUX select PINCONF - select OF_GPIO - select GPIOLIB_IRQCHIP + select GPIO_NOMADIK config PINCTRL_STN8815 bool "STN8815 pin controller driver" diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c b/drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c index 490e0959e8be..0b4a3dd9d8c7 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c @@ -3,8 +3,9 @@ #include #include +#include -#include "pinctrl-nomadik.h" +#include /* All the pins that can be used for GPIO and some other functions */ #define _GPIO(offset) (offset) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c b/drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c index 1552222ac68e..c5a52fcaba30 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik-stn8815.c @@ -3,8 +3,9 @@ #include #include +#include -#include "pinctrl-nomadik.h" +#include /* All the pins that can be used for GPIO and some other functions */ #define _GPIO(offset) (offset) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 4f7c4af4f93c..16d836157f74 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1,6 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Generic GPIO driver for logic cells found in the Nomadik SoC + * Pinmux & pinconf driver for the IP block found in the Nomadik SoC. This + * depends on gpio-nomadik and some handling is intertwined; see nmk_gpio_chips + * which is used by this driver to access the GPIO banks array. * * Copyright (C) 2008,2009 STMicroelectronics * Copyright (C) 2009 Alessandro Rubini @@ -25,6 +27,7 @@ #include #include #include +#include /* Since we request GPIOs from ourself */ #include @@ -36,15 +39,7 @@ #include "../core.h" #include "../pinctrl-utils.h" -#include "pinctrl-nomadik.h" - -/* - * The GPIO module in the Nomadik family of Systems-on-Chip is an - * AMBA device, managing 32 pins and alternate functions. The logic block - * is currently used in the Nomadik and ux500. - * - * Symbols in this file are called "nmk_gpio" for "nomadik gpio" - */ +#include /* * pin configurations are represented by 32-bit integers: @@ -200,75 +195,6 @@ typedef unsigned long pin_cfg_t; (PIN_CFG_DEFAULT |\ (PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val)) -/* - * "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving - * the "gpio" namespace for generic and cross-machine functions - */ - -#define GPIO_BLOCK_SHIFT 5 -#define NMK_GPIO_PER_CHIP (1 << GPIO_BLOCK_SHIFT) -#define NMK_MAX_BANKS DIV_ROUND_UP(512, NMK_GPIO_PER_CHIP) - -/* Register in the logic block */ -#define NMK_GPIO_DAT 0x00 -#define NMK_GPIO_DATS 0x04 -#define NMK_GPIO_DATC 0x08 -#define NMK_GPIO_PDIS 0x0c -#define NMK_GPIO_DIR 0x10 -#define NMK_GPIO_DIRS 0x14 -#define NMK_GPIO_DIRC 0x18 -#define NMK_GPIO_SLPC 0x1c -#define NMK_GPIO_AFSLA 0x20 -#define NMK_GPIO_AFSLB 0x24 -#define NMK_GPIO_LOWEMI 0x28 - -#define NMK_GPIO_RIMSC 0x40 -#define NMK_GPIO_FIMSC 0x44 -#define NMK_GPIO_IS 0x48 -#define NMK_GPIO_IC 0x4c -#define NMK_GPIO_RWIMSC 0x50 -#define NMK_GPIO_FWIMSC 0x54 -#define NMK_GPIO_WKS 0x58 -/* These appear in DB8540 and later ASICs */ -#define NMK_GPIO_EDGELEVEL 0x5C -#define NMK_GPIO_LEVEL 0x60 - - -/* Pull up/down values */ -enum nmk_gpio_pull { - NMK_GPIO_PULL_NONE, - NMK_GPIO_PULL_UP, - NMK_GPIO_PULL_DOWN, -}; - -/* Sleep mode */ -enum nmk_gpio_slpm { - NMK_GPIO_SLPM_INPUT, - NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT, - NMK_GPIO_SLPM_NOCHANGE, - NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE, -}; - -struct nmk_gpio_chip { - struct gpio_chip chip; - void __iomem *addr; - struct clk *clk; - unsigned int bank; - void (*set_ioforce)(bool enable); - spinlock_t lock; - bool sleepmode; - /* Keep track of configured edges */ - u32 edge_rising; - u32 edge_falling; - u32 real_wake; - u32 rwimsc; - u32 fwimsc; - u32 rimsc; - u32 fimsc; - u32 pull_up; - u32 lowemi; -}; - /** * struct nmk_pinctrl - state container for the Nomadik pin controller * @dev: containing device pointer @@ -283,11 +209,10 @@ struct nmk_pinctrl { void __iomem *prcm_base; }; -static struct nmk_gpio_chip *nmk_gpio_chips[NMK_MAX_BANKS]; +/* See nmk_gpio_populate_chip() that fills this array. */ +struct nmk_gpio_chip *nmk_gpio_chips[NMK_MAX_BANKS]; -static DEFINE_SPINLOCK(nmk_gpio_slpm_lock); - -#define NUM_BANKS ARRAY_SIZE(nmk_gpio_chips) +DEFINE_SPINLOCK(nmk_gpio_slpm_lock); static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip, unsigned offset, int gpio_mode) @@ -304,19 +229,6 @@ static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip, writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB); } -static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, - unsigned offset, enum nmk_gpio_slpm mode) -{ - u32 slpm; - - slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC); - if (mode == NMK_GPIO_SLPM_NOCHANGE) - slpm |= BIT(offset); - else - slpm &= ~BIT(offset); - writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC); -} - static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip, unsigned offset, enum nmk_gpio_pull pull) { @@ -364,22 +276,6 @@ static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip, writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRC); } -static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip, - unsigned offset, int val) -{ - if (val) - writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATS); - else - writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATC); -} - -static void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip, - unsigned offset, int val) -{ - writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRS); - __nmk_gpio_set_output(nmk_chip, offset, val); -} - static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip, unsigned offset, int gpio_mode, bool glitch) @@ -548,7 +444,7 @@ static void nmk_gpio_glitch_slpm_init(unsigned int *slpm) { int i; - for (i = 0; i < NUM_BANKS; i++) { + for (i = 0; i < NMK_MAX_BANKS; i++) { struct nmk_gpio_chip *chip = nmk_gpio_chips[i]; unsigned int temp = slpm[i]; @@ -566,7 +462,7 @@ static void nmk_gpio_glitch_slpm_restore(unsigned int *slpm) { int i; - for (i = 0; i < NUM_BANKS; i++) { + for (i = 0; i < NMK_MAX_BANKS; i++) { struct nmk_gpio_chip *chip = nmk_gpio_chips[i]; if (!chip) @@ -578,7 +474,8 @@ static void nmk_gpio_glitch_slpm_restore(unsigned int *slpm) } } -static int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpio) +/* Only called by gpio-nomadik but requires knowledge of struct nmk_pinctrl. */ +int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpio) { int i; u16 reg; @@ -610,576 +507,6 @@ static int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, return NMK_GPIO_ALT_C; } -/* IRQ functions */ - -static void nmk_gpio_irq_ack(struct irq_data *d) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - clk_enable(nmk_chip->clk); - writel(BIT(d->hwirq), nmk_chip->addr + NMK_GPIO_IC); - clk_disable(nmk_chip->clk); -} - -enum nmk_gpio_irq_type { - NORMAL, - WAKE, -}; - -static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, - int offset, enum nmk_gpio_irq_type which, - bool enable) -{ - u32 *rimscval; - u32 *fimscval; - u32 rimscreg; - u32 fimscreg; - - if (which == NORMAL) { - rimscreg = NMK_GPIO_RIMSC; - fimscreg = NMK_GPIO_FIMSC; - rimscval = &nmk_chip->rimsc; - fimscval = &nmk_chip->fimsc; - } else { - rimscreg = NMK_GPIO_RWIMSC; - fimscreg = NMK_GPIO_FWIMSC; - rimscval = &nmk_chip->rwimsc; - fimscval = &nmk_chip->fwimsc; - } - - /* we must individually set/clear the two edges */ - if (nmk_chip->edge_rising & BIT(offset)) { - if (enable) - *rimscval |= BIT(offset); - else - *rimscval &= ~BIT(offset); - writel(*rimscval, nmk_chip->addr + rimscreg); - } - if (nmk_chip->edge_falling & BIT(offset)) { - if (enable) - *fimscval |= BIT(offset); - else - *fimscval &= ~BIT(offset); - writel(*fimscval, nmk_chip->addr + fimscreg); - } -} - -static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip, - int offset, bool on) -{ - /* - * Ensure WAKEUP_ENABLE is on. No need to disable it if wakeup is - * disabled, since setting SLPM to 1 increases power consumption, and - * wakeup is anyhow controlled by the RIMSC and FIMSC registers. - */ - if (nmk_chip->sleepmode && on) { - __nmk_gpio_set_slpm(nmk_chip, offset, - NMK_GPIO_SLPM_WAKEUP_ENABLE); - } - - __nmk_gpio_irq_modify(nmk_chip, offset, WAKE, on); -} - -static void nmk_gpio_irq_maskunmask(struct nmk_gpio_chip *nmk_chip, - struct irq_data *d, bool enable) -{ - unsigned long flags; - - clk_enable(nmk_chip->clk); - spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); - spin_lock(&nmk_chip->lock); - - __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, enable); - - if (!(nmk_chip->real_wake & BIT(d->hwirq))) - __nmk_gpio_set_wake(nmk_chip, d->hwirq, enable); - - spin_unlock(&nmk_chip->lock); - spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); - clk_disable(nmk_chip->clk); -} - -static void nmk_gpio_irq_mask(struct irq_data *d) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - nmk_gpio_irq_maskunmask(nmk_chip, d, false); - gpiochip_disable_irq(gc, irqd_to_hwirq(d)); -} - -static void nmk_gpio_irq_unmask(struct irq_data *d) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - gpiochip_enable_irq(gc, irqd_to_hwirq(d)); - nmk_gpio_irq_maskunmask(nmk_chip, d, true); -} - -static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - unsigned long flags; - - clk_enable(nmk_chip->clk); - spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); - spin_lock(&nmk_chip->lock); - - if (irqd_irq_disabled(d)) - __nmk_gpio_set_wake(nmk_chip, d->hwirq, on); - - if (on) - nmk_chip->real_wake |= BIT(d->hwirq); - else - nmk_chip->real_wake &= ~BIT(d->hwirq); - - spin_unlock(&nmk_chip->lock); - spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); - clk_disable(nmk_chip->clk); - - return 0; -} - -static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - bool enabled = !irqd_irq_disabled(d); - bool wake = irqd_is_wakeup_set(d); - unsigned long flags; - - if (type & IRQ_TYPE_LEVEL_HIGH) - return -EINVAL; - if (type & IRQ_TYPE_LEVEL_LOW) - return -EINVAL; - - clk_enable(nmk_chip->clk); - spin_lock_irqsave(&nmk_chip->lock, flags); - - if (enabled) - __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, false); - - if (enabled || wake) - __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false); - - nmk_chip->edge_rising &= ~BIT(d->hwirq); - if (type & IRQ_TYPE_EDGE_RISING) - nmk_chip->edge_rising |= BIT(d->hwirq); - - nmk_chip->edge_falling &= ~BIT(d->hwirq); - if (type & IRQ_TYPE_EDGE_FALLING) - nmk_chip->edge_falling |= BIT(d->hwirq); - - if (enabled) - __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, true); - - if (enabled || wake) - __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, true); - - spin_unlock_irqrestore(&nmk_chip->lock, flags); - clk_disable(nmk_chip->clk); - - return 0; -} - -static unsigned int nmk_gpio_irq_startup(struct irq_data *d) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - clk_enable(nmk_chip->clk); - nmk_gpio_irq_unmask(d); - return 0; -} - -static void nmk_gpio_irq_shutdown(struct irq_data *d) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - nmk_gpio_irq_mask(d); - clk_disable(nmk_chip->clk); -} - -static void nmk_gpio_irq_handler(struct irq_desc *desc) -{ - struct irq_chip *host_chip = irq_desc_get_chip(desc); - struct gpio_chip *chip = irq_desc_get_handler_data(desc); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - u32 status; - - chained_irq_enter(host_chip, desc); - - clk_enable(nmk_chip->clk); - status = readl(nmk_chip->addr + NMK_GPIO_IS); - clk_disable(nmk_chip->clk); - - while (status) { - int bit = __ffs(status); - - generic_handle_domain_irq(chip->irq.domain, bit); - status &= ~BIT(bit); - } - - chained_irq_exit(host_chip, desc); -} - -/* I/O Functions */ - -static int nmk_gpio_get_dir(struct gpio_chip *chip, unsigned offset) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - int dir; - - clk_enable(nmk_chip->clk); - - dir = readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset); - - clk_disable(nmk_chip->clk); - - if (dir) - return GPIO_LINE_DIRECTION_OUT; - - return GPIO_LINE_DIRECTION_IN; -} - -static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - - clk_enable(nmk_chip->clk); - - writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRC); - - clk_disable(nmk_chip->clk); - - return 0; -} - -static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - int value; - - clk_enable(nmk_chip->clk); - - value = !!(readl(nmk_chip->addr + NMK_GPIO_DAT) & BIT(offset)); - - clk_disable(nmk_chip->clk); - - return value; -} - -static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset, - int val) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - - clk_enable(nmk_chip->clk); - - __nmk_gpio_set_output(nmk_chip, offset, val); - - clk_disable(nmk_chip->clk); -} - -static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset, - int val) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - - clk_enable(nmk_chip->clk); - - __nmk_gpio_make_output(nmk_chip, offset, val); - - clk_disable(nmk_chip->clk); - - return 0; -} - -#ifdef CONFIG_DEBUG_FS -static int nmk_gpio_get_mode(struct nmk_gpio_chip *nmk_chip, int offset) -{ - u32 afunc, bfunc; - - clk_enable(nmk_chip->clk); - - afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & BIT(offset); - bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & BIT(offset); - - clk_disable(nmk_chip->clk); - - return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0); -} - -static void nmk_gpio_dbg_show_one(struct seq_file *s, - struct pinctrl_dev *pctldev, struct gpio_chip *chip, - unsigned offset, unsigned gpio) -{ - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - int mode; - bool is_out; - bool data_out; - bool pull; - const char *modes[] = { - [NMK_GPIO_ALT_GPIO] = "gpio", - [NMK_GPIO_ALT_A] = "altA", - [NMK_GPIO_ALT_B] = "altB", - [NMK_GPIO_ALT_C] = "altC", - [NMK_GPIO_ALT_C+1] = "altC1", - [NMK_GPIO_ALT_C+2] = "altC2", - [NMK_GPIO_ALT_C+3] = "altC3", - [NMK_GPIO_ALT_C+4] = "altC4", - }; - - char *label = gpiochip_dup_line_label(chip, offset); - if (IS_ERR(label)) - return; - - clk_enable(nmk_chip->clk); - is_out = !!(readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset)); - pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & BIT(offset)); - data_out = !!(readl(nmk_chip->addr + NMK_GPIO_DAT) & BIT(offset)); - mode = nmk_gpio_get_mode(nmk_chip, offset); - if ((mode == NMK_GPIO_ALT_C) && pctldev) - mode = nmk_prcm_gpiocr_get_mode(pctldev, gpio); - - if (is_out) { - seq_printf(s, " gpio-%-3d (%-20.20s) out %s %s", - gpio, - label ?: "(none)", - data_out ? "hi" : "lo", - (mode < 0) ? "unknown" : modes[mode]); - } else { - int irq = chip->to_irq(chip, offset); - const int pullidx = pull ? 1 : 0; - int val; - static const char * const pulls[] = { - "none ", - "pull enabled", - }; - - seq_printf(s, " gpio-%-3d (%-20.20s) in %s %s", - gpio, - label ?: "(none)", - pulls[pullidx], - (mode < 0) ? "unknown" : modes[mode]); - - val = nmk_gpio_get_input(chip, offset); - seq_printf(s, " VAL %d", val); - - /* - * This races with request_irq(), set_irq_type(), - * and set_irq_wake() ... but those are "rare". - */ - if (irq > 0 && irq_has_action(irq)) { - char *trigger; - bool wake; - - if (nmk_chip->edge_rising & BIT(offset)) - trigger = "edge-rising"; - else if (nmk_chip->edge_falling & BIT(offset)) - trigger = "edge-falling"; - else - trigger = "edge-undefined"; - - wake = !!(nmk_chip->real_wake & BIT(offset)); - - seq_printf(s, " irq-%d %s%s", - irq, trigger, wake ? " wakeup" : ""); - } - } - clk_disable(nmk_chip->clk); -} - -static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) -{ - unsigned i; - unsigned gpio = chip->base; - - for (i = 0; i < chip->ngpio; i++, gpio++) { - nmk_gpio_dbg_show_one(s, NULL, chip, i, gpio); - seq_printf(s, "\n"); - } -} - -#else -static inline void nmk_gpio_dbg_show_one(struct seq_file *s, - struct pinctrl_dev *pctldev, - struct gpio_chip *chip, - unsigned offset, unsigned gpio) -{ -} -#define nmk_gpio_dbg_show NULL -#endif - -/* - * We will allocate memory for the state container using devm* allocators - * binding to the first device reaching this point, it doesn't matter if - * it is the pin controller or GPIO driver. However we need to use the right - * platform device when looking up resources so pay attention to pdev. - */ -static struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, - struct platform_device *pdev) -{ - struct nmk_gpio_chip *nmk_chip; - struct platform_device *gpio_pdev; - struct gpio_chip *chip; - struct resource *res; - struct clk *clk; - void __iomem *base; - u32 id; - - gpio_pdev = of_find_device_by_node(np); - if (!gpio_pdev) { - pr_err("populate \"%pOFn\": device not found\n", np); - return ERR_PTR(-ENODEV); - } - if (of_property_read_u32(np, "gpio-bank", &id)) { - dev_err(&pdev->dev, "populate: gpio-bank property not found\n"); - platform_device_put(gpio_pdev); - return ERR_PTR(-EINVAL); - } - - /* Already populated? */ - nmk_chip = nmk_gpio_chips[id]; - if (nmk_chip) { - platform_device_put(gpio_pdev); - return nmk_chip; - } - - nmk_chip = devm_kzalloc(&pdev->dev, sizeof(*nmk_chip), GFP_KERNEL); - if (!nmk_chip) { - platform_device_put(gpio_pdev); - return ERR_PTR(-ENOMEM); - } - - nmk_chip->bank = id; - chip = &nmk_chip->chip; - chip->base = id * NMK_GPIO_PER_CHIP; - chip->ngpio = NMK_GPIO_PER_CHIP; - chip->label = dev_name(&gpio_pdev->dev); - chip->parent = &gpio_pdev->dev; - - res = platform_get_resource(gpio_pdev, IORESOURCE_MEM, 0); - base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(base)) { - platform_device_put(gpio_pdev); - return ERR_CAST(base); - } - nmk_chip->addr = base; - - clk = clk_get(&gpio_pdev->dev, NULL); - if (IS_ERR(clk)) { - platform_device_put(gpio_pdev); - return (void *) clk; - } - clk_prepare(clk); - nmk_chip->clk = clk; - - BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips)); - nmk_gpio_chips[id] = nmk_chip; - return nmk_chip; -} - -static void nmk_gpio_irq_print_chip(struct irq_data *d, struct seq_file *p) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); - - seq_printf(p, "nmk%u-%u-%u", nmk_chip->bank, - gc->base, gc->base + gc->ngpio - 1); -} - -static const struct irq_chip nmk_irq_chip = { - .irq_ack = nmk_gpio_irq_ack, - .irq_mask = nmk_gpio_irq_mask, - .irq_unmask = nmk_gpio_irq_unmask, - .irq_set_type = nmk_gpio_irq_set_type, - .irq_set_wake = nmk_gpio_irq_set_wake, - .irq_startup = nmk_gpio_irq_startup, - .irq_shutdown = nmk_gpio_irq_shutdown, - .irq_print_chip = nmk_gpio_irq_print_chip, - .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE, - GPIOCHIP_IRQ_RESOURCE_HELPERS, -}; - -static int nmk_gpio_probe(struct platform_device *dev) -{ - struct device_node *np = dev->dev.of_node; - struct nmk_gpio_chip *nmk_chip; - struct gpio_chip *chip; - struct gpio_irq_chip *girq; - bool supports_sleepmode; - int irq; - int ret; - - nmk_chip = nmk_gpio_populate_chip(np, dev); - if (IS_ERR(nmk_chip)) { - dev_err(&dev->dev, "could not populate nmk chip struct\n"); - return PTR_ERR(nmk_chip); - } - - supports_sleepmode = - of_property_read_bool(np, "st,supports-sleepmode"); - - /* Correct platform device ID */ - dev->id = nmk_chip->bank; - - irq = platform_get_irq(dev, 0); - if (irq < 0) - return irq; - - /* - * The virt address in nmk_chip->addr is in the nomadik register space, - * so we can simply convert the resource address, without remapping - */ - nmk_chip->sleepmode = supports_sleepmode; - spin_lock_init(&nmk_chip->lock); - - chip = &nmk_chip->chip; - chip->parent = &dev->dev; - chip->request = gpiochip_generic_request; - chip->free = gpiochip_generic_free; - chip->get_direction = nmk_gpio_get_dir; - chip->direction_input = nmk_gpio_make_input; - chip->get = nmk_gpio_get_input; - chip->direction_output = nmk_gpio_make_output; - chip->set = nmk_gpio_set_output; - chip->dbg_show = nmk_gpio_dbg_show; - chip->can_sleep = false; - chip->owner = THIS_MODULE; - - girq = &chip->irq; - gpio_irq_chip_set_chip(girq, &nmk_irq_chip); - girq->parent_handler = nmk_gpio_irq_handler; - girq->num_parents = 1; - girq->parents = devm_kcalloc(&dev->dev, 1, - sizeof(*girq->parents), - GFP_KERNEL); - if (!girq->parents) - return -ENOMEM; - girq->parents[0] = irq; - girq->default_type = IRQ_TYPE_NONE; - girq->handler = handle_edge_irq; - - clk_enable(nmk_chip->clk); - nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI); - clk_disable(nmk_chip->clk); - - ret = gpiochip_add_data(chip, nmk_chip); - if (ret) - return ret; - - platform_set_drvdata(dev, nmk_chip); - - dev_info(&dev->dev, "chip registered\n"); - - return 0; -} - static int nmk_get_groups_cnt(struct pinctrl_dev *pctldev) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); @@ -1197,12 +524,12 @@ static const char *nmk_get_group_name(struct pinctrl_dev *pctldev, static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins, - unsigned *npins) + unsigned int *num_pins) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); *pins = npct->soc->groups[selector].grp.pins; - *npins = npct->soc->groups[selector].grp.npins; + *num_pins = npct->soc->groups[selector].grp.npins; return 0; } @@ -1533,7 +860,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); const struct nmk_pingroup *g; - static unsigned int slpm[NUM_BANKS]; + static unsigned int slpm[NMK_MAX_BANKS]; unsigned long flags = 0; bool glitch; int ret = -EINVAL; @@ -1921,19 +1248,6 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) return 0; } -static const struct of_device_id nmk_gpio_match[] = { - { .compatible = "st,nomadik-gpio", }, - {} -}; - -static struct platform_driver nmk_gpio_driver = { - .driver = { - .name = "gpio", - .of_match_table = nmk_gpio_match, - }, - .probe = nmk_gpio_probe, -}; - static SIMPLE_DEV_PM_OPS(nmk_pinctrl_pm_ops, nmk_pinctrl_suspend, nmk_pinctrl_resume); @@ -1947,12 +1261,6 @@ static struct platform_driver nmk_pinctrl_driver = { .probe = nmk_pinctrl_probe, }; -static int __init nmk_gpio_init(void) -{ - return platform_driver_register(&nmk_gpio_driver); -} -subsys_initcall(nmk_gpio_init); - static int __init nmk_pinctrl_init(void) { return platform_driver_register(&nmk_pinctrl_driver); diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.h b/include/linux/gpio/gpio-nomadik.h similarity index 61% rename from drivers/pinctrl/nomadik/pinctrl-nomadik.h rename to include/linux/gpio/gpio-nomadik.h index 1ef2559bc571..0166ddb71f43 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.h +++ b/include/linux/gpio/gpio-nomadik.h @@ -1,16 +1,74 @@ /* SPDX-License-Identifier: GPL-2.0 */ -#ifndef PINCTRL_PINCTRL_NOMADIK_H -#define PINCTRL_PINCTRL_NOMADIK_H - -#include -#include - -#include +#ifndef __LINUX_GPIO_NOMADIK_H +#define __LINUX_GPIO_NOMADIK_H /* Package definitions */ #define PINCTRL_NMK_STN8815 0 #define PINCTRL_NMK_DB8500 1 +#define GPIO_BLOCK_SHIFT 5 +#define NMK_GPIO_PER_CHIP BIT(GPIO_BLOCK_SHIFT) +#define NMK_MAX_BANKS DIV_ROUND_UP(512, NMK_GPIO_PER_CHIP) + +/* Register in the logic block */ +#define NMK_GPIO_DAT 0x00 +#define NMK_GPIO_DATS 0x04 +#define NMK_GPIO_DATC 0x08 +#define NMK_GPIO_PDIS 0x0c +#define NMK_GPIO_DIR 0x10 +#define NMK_GPIO_DIRS 0x14 +#define NMK_GPIO_DIRC 0x18 +#define NMK_GPIO_SLPC 0x1c +#define NMK_GPIO_AFSLA 0x20 +#define NMK_GPIO_AFSLB 0x24 +#define NMK_GPIO_LOWEMI 0x28 + +#define NMK_GPIO_RIMSC 0x40 +#define NMK_GPIO_FIMSC 0x44 +#define NMK_GPIO_IS 0x48 +#define NMK_GPIO_IC 0x4c +#define NMK_GPIO_RWIMSC 0x50 +#define NMK_GPIO_FWIMSC 0x54 +#define NMK_GPIO_WKS 0x58 +/* These appear in DB8540 and later ASICs */ +#define NMK_GPIO_EDGELEVEL 0x5C +#define NMK_GPIO_LEVEL 0x60 + +/* Pull up/down values */ +enum nmk_gpio_pull { + NMK_GPIO_PULL_NONE, + NMK_GPIO_PULL_UP, + NMK_GPIO_PULL_DOWN, +}; + +/* Sleep mode */ +enum nmk_gpio_slpm { + NMK_GPIO_SLPM_INPUT, + NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT, + NMK_GPIO_SLPM_NOCHANGE, + NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE, +}; + +struct nmk_gpio_chip { + struct gpio_chip chip; + void __iomem *addr; + struct clk *clk; + unsigned int bank; + void (*set_ioforce)(bool enable); + spinlock_t lock; + bool sleepmode; + /* Keep track of configured edges */ + u32 edge_rising; + u32 edge_falling; + u32 real_wake; + u32 rwimsc; + u32 fwimsc; + u32 rimsc; + u32 fimsc; + u32 pull_up; + u32 lowemi; +}; + /* Alternate functions: function C is set in hw by setting both A and B */ #define NMK_GPIO_ALT_GPIO 0 #define NMK_GPIO_ALT_A 1 @@ -104,7 +162,7 @@ struct prcm_gpiocr_altcx_pin_desc { struct nmk_function { const char *name; const char * const *groups; - unsigned ngroups; + unsigned int ngroups; }; /** @@ -141,13 +199,13 @@ struct nmk_pingroup { */ struct nmk_pinctrl_soc_data { const struct pinctrl_pin_desc *pins; - unsigned npins; + unsigned int npins; const struct nmk_function *functions; - unsigned nfunctions; + unsigned int nfunctions; const struct nmk_pingroup *groups; - unsigned ngroups; + unsigned int ngroups; const struct prcm_gpiocr_altcx_pin_desc *altcx_pins; - unsigned npins_altcx; + unsigned int npins_altcx; const u16 *prcm_gpiocr_registers; }; @@ -177,4 +235,42 @@ nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc) #endif -#endif /* PINCTRL_PINCTRL_NOMADIK_H */ +#ifdef CONFIG_PINCTRL_DB8540 + +void nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc); + +#else + +static inline void +nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc) +{ +} + +#endif + +struct platform_device; + +/* + * Symbols declared in gpio-nomadik used by pinctrl-nomadik. If pinctrl-nomadik + * is enabled, then gpio-nomadik is enabled as well; the reverse if not always + * true. + */ +void nmk_gpio_dbg_show_one(struct seq_file *s, struct pinctrl_dev *pctldev, + struct gpio_chip *chip, unsigned int offset, + unsigned int gpio); +void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip, + unsigned int offset, int val); +void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, unsigned int offset, + enum nmk_gpio_slpm mode); +struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, + struct platform_device *pdev); + +/* Symbols declared in pinctrl-nomadik used by gpio-nomadik. */ +#ifdef CONFIG_PINCTRL_NOMADIK +extern struct nmk_gpio_chip *nmk_gpio_chips[NMK_MAX_BANKS]; +extern spinlock_t nmk_gpio_slpm_lock; +int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, + int gpio); +#endif + +#endif /* __LINUX_GPIO_NOMADIK_H */ From patchwork Wed Feb 28 11:28:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575220 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 478881419A6; Wed, 28 Feb 2024 11:28:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119705; cv=none; b=IGqSxfc//hcu6mlZTBbBK3PFJM0huiSH3XIFcrCismgj0M/E1uTDHp6UYVv1PbDtZm/idaaqvnaEkx/TNhiK/GfmWDjGxu2oXhK7SC1AdxwT1Gspe90cG2d4qNPQYD9zRZM2fq8aMFgPgPP/vPwCTR6ZAsis0mTc5mHVsHZtB34= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119705; c=relaxed/simple; bh=rpU2mac2irE8TMlXehcfuH8cGZ1986y095YKnEFa/T4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Iqq4C+RUoz54daenOPLT7xfWQhOEjP8loUJC8vYeL5zOWer/kz6bBauGWJxK8K+fRWsAE3TmV4uXiL3Jz0tSqM0lze1VJv2m3614jE3g8Oyx5i/s7vguglZ7fEzN/ehPv8n4khBNYlzfoaqrvN9eCxBIvSBRQYzQgZpOh910gLc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=kz1AlJBZ; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="kz1AlJBZ" Received: by mail.gandi.net (Postfix) with ESMTPSA id 79FF51BF210; Wed, 28 Feb 2024 11:28:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119696; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=50+FJ3NPM2/AbO8CJ0JOfR4sYG+GQHETXFvJ1d0zanU=; b=kz1AlJBZQXcB+NRWabtw2qzi9zWbsWFn28abqgBuUlOKjv2qqwQp163RNLWOsZUaPdOWwJ s5HfVYtPz7exGyca3lm7q5lF4vAbJOHkkstt3Z5kbIYIrD/lTuLPsezXXnNiR138oNXpN4 6CZ0GPqjJNWZ+wvRotArvrhdZYbB5cqkUuKVX3+n+ymRux8fMls0I361Bjhsr8s9OXCH5P 3BAsYJ0OvEuR5u5cmJ9r0MIaFaYQwXeT40BZdzrGAmmmyHz774fFxWu8MuCP3gT6Gui4N/ f00fRawx7DQuDU2Yk8ebjydo/+kswp3ZaNmiyNehFGf4+r1HUpvi7KPqu2ypkQ== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:05 +0100 Subject: [PATCH v2 07/30] pinctrl: nomadik: Kconfig: allow building with COMPILE_TEST Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-7-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com PINCTRL_NOMADIK, PINCTRL_STN8815 and PINCTRL_DB8500 depend on ARCH_U8500 or ARCH_NOMADIK. Add COMPILE_TEST as an option to allow test building the driver. Signed-off-by: Théo Lebrun --- drivers/pinctrl/nomadik/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/nomadik/Kconfig b/drivers/pinctrl/nomadik/Kconfig index f47f0755a835..59d0d885651c 100644 --- a/drivers/pinctrl/nomadik/Kconfig +++ b/drivers/pinctrl/nomadik/Kconfig @@ -18,7 +18,7 @@ config PINCTRL_AB8505 endif -if (ARCH_U8500 || ARCH_NOMADIK) +if (ARCH_U8500 || ARCH_NOMADIK || COMPILE_TEST) config PINCTRL_NOMADIK bool "Nomadik pin controller driver" From patchwork Wed Feb 28 11:28:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575208 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4116D2561D; Wed, 28 Feb 2024 11:28:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119700; cv=none; b=VrpYdCSkExGVsk+vDKfHmVhqb8cQEYUNFEPiyvfn9kaMMISHw8cMChpw/paBtxO8qSjkXcsltlF2t78hjv7maNA5Sw02geA+nYAdHs9FlO1mS+JwZwDsAM4G4np19Vk0gWqv+MR+ZDsye88JBz4Th7LjNQciF0NQK+yLfnY3BIg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119700; c=relaxed/simple; bh=yr8WX4A44trJtUxl2P9pZk9ZMjMyxNKtR2O698qVrvo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eSzc7qbFfvaybEkMbT5TsCIZaH+Mst8rnKvMlhrNpihkdBYJ7tm2L7+AtOl88CdBqJ6y10G2RP5y09W0y3dP4IgbWUzBVPTE+wir6qpHpwyEXwPWv+fb3Jg+f+BGqDjQXr/dKMvLvbxCLhkEuxEg9HPo3Y7b8aJOdXa3DgVVn4E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Tj3Fawby; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Tj3Fawby" Received: by mail.gandi.net (Postfix) with ESMTPSA id 2CEA91BF20D; Wed, 28 Feb 2024 11:28:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119696; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BpsD83BM+PlNWBQdcZslFjWvjlE691PT9L/5TLzg2mc=; b=Tj3FawbyJENHxmceKliYSLPqE6Hp1GKvvRnQ3ZAyremnWZUy2b5RpAqxCnNMz2VoYuZWlp UcNdL1qoKeF5I1vDuTVuHSWxNaQJpgHgnl/HUr/zGmh4Zs2MsiDzpcEZ/j2DS07mGz4s6I jNJcrWwuHfCqsKIJGKgGqj4+k+kovhSZtupcbZsGlj+bOpb52PSbaGiLOTCtQee+jdQZMT bvRct0OhtZyY7S85KwwFECaXG0uVPgSmVDf4+/rsNMkEHwpR3aQ8llZ+d+Iivss//yTBIr LP/co5yvACfpYIT0zlalV6yoyFlGvW0EGso+wqfhr2v4ZST98wG5u4bAj8usNA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:06 +0100 Subject: [PATCH v2 08/30] pinctrl: nomadik: fix build warning (-Wformat) Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-8-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Fix compiler warning found in the pinctrl-nomadik platform driver. GCC message is as such: drivers/pinctrl/nomadik/pinctrl-nomadik.c:855:21: warning: format ‘%u’ expects argument of type ‘unsigned int’, but argument 5 has type ‘size_t {aka const long unsigned int}’ [-Wformat=] Signed-off-by: Théo Lebrun --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 16d836157f74..1be0c48712b7 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -871,7 +871,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, if (g->altsetting < 0) return -EINVAL; - dev_dbg(npct->dev, "enable group %s, %u pins\n", g->grp.name, g->grp.npins); + dev_dbg(npct->dev, "enable group %s, %zu pins\n", g->grp.name, g->grp.npins); /* * If we're setting altfunc C by setting both AFSLA and AFSLB to 1, From patchwork Wed Feb 28 11:28:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575210 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DCCD612EBF4; Wed, 28 Feb 2024 11:28:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119701; cv=none; b=MycEEsABjeYNYC5Y6TI8K8W9ydIS6tyeIlPf2jCqVhN+i67bHEYtn+9Qr0iXjCWDO84njniq1MnUDwPEWKCcFOqWNIABLZBJ8GojtOBSD+VhsE6KRaNh5tQYj3ZfL8RuWkbQVDa50rMvgOe3y1g7VwRcPrtyTCvyWsYKIfkhrNg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119701; c=relaxed/simple; bh=NUu8zN6xqrju2bNcfPvo4/Zo8f0Ipw0pbnNHUKylwzM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=X3mmt+XF6noWc/24ZQZB6c6cjdv6H3wCMjeScEroJ+J4aEds1u52TJM9Qm7SlaXwCbMW1D6B19RReEBQodHnNdxLHR+gDIRi3Wd//zlfanwnAWxB4YVEwYRig58rlIzHs/pI2T78Pg2I6Pyg08Tdq+GlAesG7vrpKWn1Wphum/w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=gPghGJ2l; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="gPghGJ2l" Received: by mail.gandi.net (Postfix) with ESMTPSA id DE5261BF216; Wed, 28 Feb 2024 11:28:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119697; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7uQzyRzXBi1cM/sDEW5ZhksCKgQRrZdcLK2Y5fiRh7o=; b=gPghGJ2likpuh6bn3kGEI10IWheNaKjcSOf+/rMK/FnqFTWFDFtHZSGRxS84PSHtjTrTje Xw2ExCe6nBHnQp/5U97ND92n2LfvXmgsV+/d8+/bbdx2+wilCAvBRdRReyik4jsYxNpjTT qbfXcZRKlsTy140Iga9TKjZU7e0GwhoDR1dboDSf1mIQ4mzVM+OUAynXh80t7r2t+ob85S YpDLl7CiZIAXcb6iKSN5fS4u4tYExLRIX5uT0qspwvcX5T/f+7BH+6tMd5fmhGWpD7YY+F Q847SWHnWM+MDaT1c2MdeN6dPzF6MycwJdQI2QFA9HjLy/cZ6i9zNlQn3Lipiw== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:07 +0100 Subject: [PATCH v2 09/30] pinctrl: nomadik: fix build warning (-Wpointer-to-int-cast) Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-9-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Fix compiler warning found in the pinctrl-nomadik platform driver. GCC message is as such: drivers/pinctrl/nomadik/pinctrl-nomadik.c:1169:12: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] Signed-off-by: Théo Lebrun --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 1be0c48712b7..c8d2699be985 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1176,14 +1176,14 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; struct device_node *prcm_np; struct nmk_pinctrl *npct; - unsigned int version = 0; + uintptr_t version = 0; int i; npct = devm_kzalloc(&pdev->dev, sizeof(*npct), GFP_KERNEL); if (!npct) return -ENOMEM; - version = (unsigned int)device_get_match_data(&pdev->dev); + version = (uintptr_t)device_get_match_data(&pdev->dev); /* Poke in other ASIC variants here */ if (version == PINCTRL_NMK_STN8815) From patchwork Wed Feb 28 11:28:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575216 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C1A713A893; Wed, 28 Feb 2024 11:28:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119704; cv=none; b=P+aGN6dPN4n4l6Ff2jIamBRZLBabMPzR7aD2mltdMPXTnZsDxVRjmQBLRyC3LF23qnFywWlCneadaTF8JrAWwx4WGDeHFqNkOsChz6hqvc3JHtagcUKA1QFBrOLJGmY0YisMz5G/OIaDzz/dWv3i5apKu18G4FrDJ/ubjt/ILnw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119704; c=relaxed/simple; bh=Vvxtqfff227CvQ+NRjPqUWZTrj6Z7C7Vz1QGG5vik8Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Q4hmrg7ZxpkvGzLwPwdOcRigMSqCIyp6qK/RNkEEXa8ZWGAMsdFYNd+Dn4aZ5iuBvTXbMKiX+Oa//fY1AzWFJltA4cgh1t/3imvOoMbonkTcCQvD7uUidzqhr1Ael15aF0nxddRhuJovJD+27eAjx6292UmBzcLdkgPIf5iFjeA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=ZOhb12jB; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="ZOhb12jB" Received: by mail.gandi.net (Postfix) with ESMTPSA id 9BDDD1BF219; Wed, 28 Feb 2024 11:28:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119698; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1seadG+CBBUxb4Y3ZLyFvvvNaIdZJZ6KheSJBHoIsiI=; b=ZOhb12jBzER1DD03jga9FIQRWU9oi87FiAFZy5Qqa0kq+mLmvvJq3PcAdOmHT4UdcUwmUX A8PYWegGZO+ozd9Co81YImFsFT3xGnyTGG7hfu5UW3DxnJzwqSYymQ4r2f737PQz2lk5Xe GlQZU9EFlqZ54mMlKmNr2hsQk1xSqmj+XIwvL4DrMIk0JTB6DIkEszA4rFdOmgafWVz1bZ B/c37Wv9VfLXucMS2ddj4qwkVg0pgHm45ctTiao9SSLbPBvC+eMvHzIwZyxLed/MMrapZ1 TZzq4lwFeJzGcf2PdZquUNK3hGX+RVp7Qpho9+vv51uZ6p0CZVK1r/9Bkvsibw== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:08 +0100 Subject: [PATCH v2 10/30] pinctrl: nomadik: minimise indentation in probe Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-10-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com nmk_pinctrl_probe() iterates over each GPIO block. Use an early conditional continue to skip to the next iteration rather than indent all the loop code block. Do not change code logic. The block is changed from: for (i = 0; i < NMK_MAX_BANKS; i++) { x = of_parse_phandle(...); if (x) { ... do work ... } } To: for (i = 0; i < NMK_MAX_BANKS; i++) { x = of_parse_phandle(...); if (!x) continue; ... do work ... } Signed-off-by: Théo Lebrun --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index c8d2699be985..69b421bea1f4 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1203,17 +1203,16 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) struct nmk_gpio_chip *nmk_chip; gpio_np = of_parse_phandle(np, "nomadik-gpio-chips", i); - if (gpio_np) { - dev_info(&pdev->dev, - "populate NMK GPIO %d \"%pOFn\"\n", - i, gpio_np); - nmk_chip = nmk_gpio_populate_chip(gpio_np, pdev); - if (IS_ERR(nmk_chip)) - dev_err(&pdev->dev, - "could not populate nmk chip struct " - "- continue anyway\n"); - of_node_put(gpio_np); - } + if (!gpio_np) + continue; + + dev_info(&pdev->dev, "populate NMK GPIO %d \"%pOFn\"\n", + i, gpio_np); + nmk_chip = nmk_gpio_populate_chip(gpio_np, pdev); + if (IS_ERR(nmk_chip)) + dev_err(&pdev->dev, + "could not populate nmk chip struct - continue anyway\n"); + of_node_put(gpio_np); } prcm_np = of_parse_phandle(np, "prcm", 0); From patchwork Wed Feb 28 11:28:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575219 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A2B0713AA4C; Wed, 28 Feb 2024 11:28:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="a4uaTo3l" Received: by mail.gandi.net (Postfix) with ESMTPSA id 5E3E41BF203; Wed, 28 Feb 2024 11:28:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119699; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=lBWnYUDs3T7IhEGE+ud+DkZAdeuZi6TXRnkkSZwa8mU=; b=a4uaTo3lTISxmifpBtqvgKiHNzzWHqOTl/9NRgZdEYSuakNEtCYzc0VgZVEXg56fF7qJMs YMmqw/8fuhiGM0XlQUALtsyTM/8Woc3wLqvMVlPfUyacKArBXhKmgoirVriieb10StlUaZ knA3V/WGeqAK9QJyczEkdZT55J5b3YbMRi69vQZ/kiME4zxQBr+MVjCTFhuUo5LiKuaPwy CHQzwJJYssHD/Tj/SbOlgSDJG65GmDzdbdL9pVGx2jTqwGJp7PNUn1PQMtAGjayej9ntuz Eit/0TmPAMTeqC6MPy3AJYipbRqtG33GO5ca1TwOTU2tkjiuFebiE9jIGSQbZQ== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:09 +0100 Subject: [PATCH v2 11/30] pinctrl: nomadik: follow type-system kernel coding conventions Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-11-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Fix strict checkpatch warnings relative to types. Warning types addressed: WARNING: do not add new typedefs WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: static const char * array should probably be static const char * const Total messages before: 1 errors, 40 warnings, 39 checks. Total messages after: 1 errors, 2 warnings, 38 checks. Signed-off-by: Théo Lebrun --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 78 +++++++++++++++---------------- 1 file changed, 38 insertions(+), 40 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 69b421bea1f4..bb3b4fbbfc54 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -71,8 +71,6 @@ * PIN_CFG - default config with alternate function */ -typedef unsigned long pin_cfg_t; - #define PIN_NUM_MASK 0x1ff #define PIN_NUM(x) ((x) & PIN_NUM_MASK) @@ -215,7 +213,7 @@ struct nmk_gpio_chip *nmk_gpio_chips[NMK_MAX_BANKS]; DEFINE_SPINLOCK(nmk_gpio_slpm_lock); static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip, - unsigned offset, int gpio_mode) + unsigned int offset, int gpio_mode) { u32 afunc, bfunc; @@ -230,7 +228,7 @@ static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip, } static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip, - unsigned offset, enum nmk_gpio_pull pull) + unsigned int offset, enum nmk_gpio_pull pull) { u32 pdis; @@ -254,7 +252,7 @@ static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip, } static void __nmk_gpio_set_lowemi(struct nmk_gpio_chip *nmk_chip, - unsigned offset, bool lowemi) + unsigned int offset, bool lowemi) { bool enabled = nmk_chip->lowemi & BIT(offset); @@ -271,13 +269,13 @@ static void __nmk_gpio_set_lowemi(struct nmk_gpio_chip *nmk_chip, } static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip, - unsigned offset) + unsigned int offset) { writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRC); } static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip, - unsigned offset, int gpio_mode, + unsigned int offset, int gpio_mode, bool glitch) { u32 rwimsc = nmk_chip->rwimsc; @@ -304,7 +302,7 @@ static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip, } static void -nmk_gpio_disable_lazy_irq(struct nmk_gpio_chip *nmk_chip, unsigned offset) +nmk_gpio_disable_lazy_irq(struct nmk_gpio_chip *nmk_chip, unsigned int offset) { u32 falling = nmk_chip->fimsc & BIT(offset); u32 rising = nmk_chip->rimsc & BIT(offset); @@ -343,7 +341,7 @@ static void nmk_write_masked(void __iomem *reg, u32 mask, u32 value) } static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, - unsigned offset, unsigned alt_num) + unsigned int offset, unsigned int alt_num) { int i; u16 reg; @@ -515,15 +513,15 @@ static int nmk_get_groups_cnt(struct pinctrl_dev *pctldev) } static const char *nmk_get_group_name(struct pinctrl_dev *pctldev, - unsigned selector) + unsigned int selector) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); return npct->soc->groups[selector].grp.name; } -static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, - const unsigned **pins, +static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selector, + const unsigned int **pins, unsigned int *num_pins) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); @@ -533,7 +531,7 @@ static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, return 0; } -static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned pin) +static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned int pin) { int i; struct nmk_gpio_chip *nmk_gpio; @@ -549,7 +547,7 @@ static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned pin) return NULL; } -static struct gpio_chip *find_gc_from_pin(unsigned pin) +static struct gpio_chip *find_gc_from_pin(unsigned int pin) { struct nmk_gpio_chip *nmk_gpio = find_nmk_gpio_from_pin(pin); @@ -559,7 +557,7 @@ static struct gpio_chip *find_gc_from_pin(unsigned pin) } static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, - unsigned offset) + unsigned int offset) { struct gpio_chip *chip = find_gc_from_pin(offset); @@ -570,8 +568,8 @@ static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, nmk_gpio_dbg_show_one(s, pctldev, chip, offset - chip->base, offset); } -static int nmk_dt_add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps, - unsigned *num_maps, const char *group, +static int nmk_dt_add_map_mux(struct pinctrl_map **map, unsigned int *reserved_maps, + unsigned int *num_maps, const char *group, const char *function) { if (*num_maps == *reserved_maps) @@ -586,9 +584,9 @@ static int nmk_dt_add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps, } static int nmk_dt_add_map_configs(struct pinctrl_map **map, - unsigned *reserved_maps, - unsigned *num_maps, const char *group, - unsigned long *configs, unsigned num_configs) + unsigned int *reserved_maps, + unsigned int *num_maps, const char *group, + unsigned long *configs, unsigned int num_configs) { unsigned long *dup_configs; @@ -727,8 +725,8 @@ static bool nmk_pinctrl_dt_get_config(struct device_node *np, static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, struct device_node *np, struct pinctrl_map **map, - unsigned *reserved_maps, - unsigned *num_maps) + unsigned int *reserved_maps, + unsigned int *num_maps) { int ret; const char *function = NULL; @@ -795,9 +793,9 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, static int nmk_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, struct device_node *np_config, - struct pinctrl_map **map, unsigned *num_maps) + struct pinctrl_map **map, unsigned int *num_maps) { - unsigned reserved_maps; + unsigned int reserved_maps; struct device_node *np; int ret; @@ -835,7 +833,7 @@ static int nmk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev) } static const char *nmk_pmx_get_func_name(struct pinctrl_dev *pctldev, - unsigned function) + unsigned int function) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); @@ -843,7 +841,7 @@ static const char *nmk_pmx_get_func_name(struct pinctrl_dev *pctldev, } static int nmk_pmx_get_func_groups(struct pinctrl_dev *pctldev, - unsigned function, + unsigned int function, const char * const **groups, unsigned * const num_groups) { @@ -855,8 +853,8 @@ static int nmk_pmx_get_func_groups(struct pinctrl_dev *pctldev, return 0; } -static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, - unsigned group) +static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, + unsigned int group) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); const struct nmk_pingroup *g; @@ -915,7 +913,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, for (i = 0; i < g->grp.npins; i++) { struct nmk_gpio_chip *nmk_chip; - unsigned bit; + unsigned int bit; nmk_chip = find_nmk_gpio_from_pin(g->grp.pins[i]); if (!nmk_chip) { @@ -968,12 +966,12 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, - unsigned offset) + unsigned int offset) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); struct nmk_gpio_chip *nmk_chip; struct gpio_chip *chip; - unsigned bit; + unsigned int bit; if (!range) { dev_err(npct->dev, "invalid range\n"); @@ -999,7 +997,7 @@ static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev, static void nmk_gpio_disable_free(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, - unsigned offset) + unsigned int offset) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); @@ -1017,30 +1015,30 @@ static const struct pinmux_ops nmk_pinmux_ops = { .strict = true, }; -static int nmk_pin_config_get(struct pinctrl_dev *pctldev, unsigned pin, +static int nmk_pin_config_get(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *config) { /* Not implemented */ return -EINVAL; } -static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned pin, - unsigned long *configs, unsigned num_configs) +static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned int pin, + unsigned long *configs, unsigned int num_configs) { - static const char *pullnames[] = { + static const char * const pullnames[] = { [NMK_GPIO_PULL_NONE] = "none", [NMK_GPIO_PULL_UP] = "up", [NMK_GPIO_PULL_DOWN] = "down", [3] /* illegal */ = "??" }; - static const char *slpmnames[] = { + static const char * const slpmnames[] = { [NMK_GPIO_SLPM_INPUT] = "input/wakeup", [NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup", }; struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); struct nmk_gpio_chip *nmk_chip; - unsigned bit; - pin_cfg_t cfg; + unsigned int bit; + unsigned long cfg; int pull, slpm, output, val, i; bool lowemi, gpiomode, sleep; @@ -1057,7 +1055,7 @@ static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned pin, * here we just ignore that part. It's being handled by the * framework and pinmux callback respectively. */ - cfg = (pin_cfg_t) configs[i]; + cfg = configs[i]; pull = PIN_PULL(cfg); slpm = PIN_SLPM(cfg); output = PIN_DIR(cfg); From patchwork Wed Feb 28 11:28:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575221 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A2AAC13AA3D; Wed, 28 Feb 2024 11:28:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119706; cv=none; b=jXCXI5i2aXnVH1p5fnOKlM/LXyw+Xthun6/ZGRWucbwI8TB0mDzB/WR93cm4Bfz/gdiOFiLymqE8e41KVuOax30u3DK/OAQh5+co2MpBtSdfdMRJ5eE/wJuLLfOpYwMxTuCgCLUmP7EPpTbMUAdPJg+MEgnREIdLF04gA2Gpy38= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119706; c=relaxed/simple; bh=Z6+pajDmL3WxDAQH4xNFDdqRPlReAbc/cpAWKVdMRp4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=bg9K6zJbf3X3O24AJT7bPY1wom0LO9dxSgM8qsWBoWubzWVFb2AlR+i+GtNgmnLhh3JGxTP3ZvCpmYy77Z21271v4uv3yRexE+Yut/OJ1lPvAAauWt3f+Lx1l74/T0Uw503J9b52nXh6lzzE7L0ouYThkoCenzcvZF2lmGMztHs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=cgf2HsTF; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="cgf2HsTF" Received: by mail.gandi.net (Postfix) with ESMTPSA id 27FF61BF20F; Wed, 28 Feb 2024 11:28:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119699; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0NdiFiqLmgLHxqTQQ4JqDVqrJyq9i1HNpK6HGWJ/8pY=; b=cgf2HsTFCbkAczXYQ0LW//5YVwhrTiyosvcSyALiIwTC7k1/pgvhZAsQgxBBj2Gf+5P4F1 qm53sejIFW7V9yYYF2snbE4d2yX8N7wQsP4eQNlYiWi4ImBA0RSCsL2H7ZtGwzDtU+Xcqm crZyokpiax4ePUgev5AXCCeiE/MARX1Z/I7s9GTgUUPq9UfW8g5ZdCUPglFzujIZzEwud1 eJBe39Bxm9SakzJv3/DCp07eU+hLQqlxrfbLwv54kXi/w+O/3fRnXg7rDd4XcBBmckfaR1 BEFI9FMXBCtLaICHdYxkhsqhLGUXXjDg81/OIdWDBp0m6WxSIEegGUEFxqElnQ== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:10 +0100 Subject: [PATCH v2 12/30] pinctrl: nomadik: follow whitespace kernel coding conventions Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-12-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Fix strict checkpatch warnings relative to whitespace. Message types addressed: ERROR: space required before the open parenthesis '(' WARNING: quoted string split across lines CHECK: Alignment should match open parenthesis CHECK: Please don't use multiple blank lines CHECK: line length of 103 exceeds 100 columns CHECK: spaces preferred around that '+' (ctx:VxV) Before: 1 errors, 2 warnings, 38 checks. After: 0 errors, 1 warnings, 16 checks. Signed-off-by: Théo Lebrun --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 66 +++++++++++++++---------------- 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index bb3b4fbbfc54..95181ab575e0 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -9,6 +9,7 @@ * Rewritten based on work by Prafulla WADASKAR * Copyright (C) 2011-2013 Linus Walleij */ + #include #include #include @@ -165,7 +166,6 @@ #define PIN_SLEEPMODE_DISABLED (0 << PIN_SLEEPMODE_SHIFT) #define PIN_SLEEPMODE_ENABLED (1 << PIN_SLEEPMODE_SHIFT) - /* Shortcuts. Use these instead of separate DIR, PULL, and VAL. */ #define PIN_INPUT_PULLDOWN (PIN_DIR_INPUT | PIN_PULL_DOWN) #define PIN_INPUT_PULLUP (PIN_DIR_INPUT | PIN_PULL_UP) @@ -341,7 +341,7 @@ static void nmk_write_masked(void __iomem *reg, u32 mask, u32 value) } static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, - unsigned int offset, unsigned int alt_num) + unsigned int offset, unsigned int alt_num) { int i; u16 reg; @@ -385,7 +385,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, nmk_write_masked(npct->prcm_base + reg, BIT(bit), 0); dev_dbg(npct->dev, "PRCM GPIOCR: pin %i: alternate-C%i has been disabled\n", - offset, i+1); + offset, i + 1); } } } @@ -395,8 +395,8 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, alt_index = alt_num - 1; if (pin_desc->altcx[alt_index].used == false) { dev_warn(npct->dev, - "PRCM GPIOCR: pin %i: alternate-C%i does not exist\n", - offset, alt_num); + "PRCM GPIOCR: pin %i: alternate-C%i does not exist\n", + offset, alt_num); return; } @@ -414,7 +414,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, nmk_write_masked(npct->prcm_base + reg, BIT(bit), 0); dev_dbg(npct->dev, "PRCM GPIOCR: pin %i: alternate-C%i has been disabled\n", - offset, i+1); + offset, i + 1); } } } @@ -422,7 +422,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, reg = gpiocr_regs[pin_desc->altcx[alt_index].reg_index]; bit = pin_desc->altcx[alt_index].control_bit; dev_dbg(npct->dev, "PRCM GPIOCR: pin %i: alternate-C%i has been selected\n", - offset, alt_index+1); + offset, alt_index + 1); nmk_write_masked(npct->prcm_base + reg, BIT(bit), BIT(bit)); } @@ -499,7 +499,7 @@ int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpi reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; bit = pin_desc->altcx[i].control_bit; if (readl(npct->prcm_base + reg) & BIT(bit)) - return NMK_GPIO_ALT_C+i+1; + return NMK_GPIO_ALT_C + i + 1; } } return NMK_GPIO_ALT_C; @@ -513,7 +513,7 @@ static int nmk_get_groups_cnt(struct pinctrl_dev *pctldev) } static const char *nmk_get_group_name(struct pinctrl_dev *pctldev, - unsigned int selector) + unsigned int selector) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); @@ -536,12 +536,12 @@ static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned int pin) int i; struct nmk_gpio_chip *nmk_gpio; - for(i = 0; i < NMK_MAX_BANKS; i++) { + for (i = 0; i < NMK_MAX_BANKS; i++) { nmk_gpio = nmk_gpio_chips[i]; if (!nmk_gpio) continue; if (pin >= nmk_gpio->chip.base && - pin < nmk_gpio->chip.base + nmk_gpio->chip.ngpio) + pin < nmk_gpio->chip.base + nmk_gpio->chip.ngpio) return nmk_gpio; } return NULL; @@ -557,7 +557,7 @@ static struct gpio_chip *find_gc_from_pin(unsigned int pin) } static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, - unsigned int offset) + unsigned int offset) { struct gpio_chip *chip = find_gc_from_pin(offset); @@ -569,8 +569,8 @@ static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, } static int nmk_dt_add_map_mux(struct pinctrl_map **map, unsigned int *reserved_maps, - unsigned int *num_maps, const char *group, - const char *function) + unsigned int *num_maps, const char *group, + const char *function) { if (*num_maps == *reserved_maps) return -ENOSPC; @@ -584,9 +584,9 @@ static int nmk_dt_add_map_mux(struct pinctrl_map **map, unsigned int *reserved_m } static int nmk_dt_add_map_configs(struct pinctrl_map **map, - unsigned int *reserved_maps, - unsigned int *num_maps, const char *group, - unsigned long *configs, unsigned int num_configs) + unsigned int *reserved_maps, + unsigned int *num_maps, const char *group, + unsigned long *configs, unsigned int num_configs) { unsigned long *dup_configs; @@ -702,15 +702,14 @@ static const char *nmk_find_pin_name(struct pinctrl_dev *pctldev, const char *pi } static bool nmk_pinctrl_dt_get_config(struct device_node *np, - unsigned long *configs) + unsigned long *configs) { bool has_config = 0; unsigned long cfg = 0; int i, val, ret; for (i = 0; i < ARRAY_SIZE(nmk_cfg_params); i++) { - ret = of_property_read_u32(np, - nmk_cfg_params[i].property, &val); + ret = of_property_read_u32(np, nmk_cfg_params[i].property, &val); if (ret != -EINVAL) { if (nmk_dt_pin_config(i, val, &cfg) == 0) { *configs |= cfg; @@ -723,10 +722,10 @@ static bool nmk_pinctrl_dt_get_config(struct device_node *np, } static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, - struct device_node *np, - struct pinctrl_map **map, - unsigned int *reserved_maps, - unsigned int *num_maps) + struct device_node *np, + struct pinctrl_map **map, + unsigned int *reserved_maps, + unsigned int *num_maps) { int ret; const char *function = NULL; @@ -751,7 +750,7 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, of_property_for_each_string(np, "groups", prop, group) { ret = nmk_dt_add_map_mux(map, reserved_maps, num_maps, - group, function); + group, function); if (ret < 0) goto exit; } @@ -792,8 +791,9 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, } static int nmk_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, - struct device_node *np_config, - struct pinctrl_map **map, unsigned int *num_maps) + struct device_node *np_config, + struct pinctrl_map **map, + unsigned int *num_maps) { unsigned int reserved_maps; struct device_node *np; @@ -805,7 +805,7 @@ static int nmk_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, for_each_child_of_node(np_config, np) { ret = nmk_pinctrl_dt_subnode_to_map(pctldev, np, map, - &reserved_maps, num_maps); + &reserved_maps, num_maps); if (ret < 0) { pinctrl_utils_free_map(pctldev, *map, *num_maps); of_node_put(np); @@ -922,7 +922,8 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, g->grp.pins[i], g->grp.name, i); goto out_glitch; } - dev_dbg(npct->dev, "setting pin %d to altsetting %d\n", g->grp.pins[i], g->altsetting); + dev_dbg(npct->dev, "setting pin %d to altsetting %d\n", + g->grp.pins[i], g->altsetting); clk_enable(nmk_chip->clk); bit = g->grp.pins[i] % NMK_GPIO_PER_CHIP; @@ -936,7 +937,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, nmk_gpio_disable_lazy_irq(nmk_chip, bit); __nmk_gpio_set_mode_safe(nmk_chip, bit, - (g->altsetting & NMK_GPIO_ALT_C), glitch); + (g->altsetting & NMK_GPIO_ALT_C), glitch); clk_disable(nmk_chip->clk); /* @@ -949,7 +950,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, */ if ((g->altsetting & NMK_GPIO_ALT_C) == NMK_GPIO_ALT_C) nmk_prcm_altcx_set_mode(npct, g->grp.pins[i], - g->altsetting >> NMK_GPIO_ALT_CX_SHIFT); + g->altsetting >> NMK_GPIO_ALT_CX_SHIFT); } /* When all pins are successfully reconfigured we get here */ @@ -1221,8 +1222,7 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) if (!npct->prcm_base) { if (version == PINCTRL_NMK_STN8815) { dev_info(&pdev->dev, - "No PRCM base, " - "assuming no ALT-Cx control is available\n"); + "No PRCM base, assuming no ALT-Cx control is available\n"); } else { dev_err(&pdev->dev, "missing PRCM base address\n"); return -EINVAL; From patchwork Wed Feb 28 11:28:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575218 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ADCD313AA55; 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Message types addressed: CHECK: Comparison to NULL could be written "!nmk_cfg_params[index].choice" CHECK: Unbalanced braces around else statement CHECK: Using comparison to false is error prone CHECK: Using comparison to true is error prone CHECK: braces {} should be used on all arms of this statement Before: 0 errors, 1 warnings, 16 checks. After: 0 errors, 1 warnings, 7 checks. Signed-off-by: Théo Lebrun --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 95181ab575e0..b74378302229 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -378,7 +378,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, */ if (!alt_num) { for (i = 0 ; i < PRCM_IDX_GPIOCR_ALTC_MAX ; i++) { - if (pin_desc->altcx[i].used == true) { + if (pin_desc->altcx[i].used) { reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; bit = pin_desc->altcx[i].control_bit; if (readl(npct->prcm_base + reg) & BIT(bit)) { @@ -393,7 +393,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, } alt_index = alt_num - 1; - if (pin_desc->altcx[alt_index].used == false) { + if (!pin_desc->altcx[alt_index].used) { dev_warn(npct->dev, "PRCM GPIOCR: pin %i: alternate-C%i does not exist\n", offset, alt_num); @@ -407,7 +407,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct, for (i = 0 ; i < PRCM_IDX_GPIOCR_ALTC_MAX ; i++) { if (i == alt_index) continue; - if (pin_desc->altcx[i].used == true) { + if (pin_desc->altcx[i].used) { reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; bit = pin_desc->altcx[i].control_bit; if (readl(npct->prcm_base + reg) & BIT(bit)) { @@ -495,7 +495,7 @@ int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpi pin_desc = npct->soc->altcx_pins + i; gpiocr_regs = npct->soc->prcm_gpiocr_registers; for (i = 0; i < PRCM_IDX_GPIOCR_ALTC_MAX; i++) { - if (pin_desc->altcx[i].used == true) { + if (pin_desc->altcx[i].used) { reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; bit = pin_desc->altcx[i].control_bit; if (readl(npct->prcm_base + reg) & BIT(bit)) @@ -677,9 +677,9 @@ static const struct nmk_cfg_param nmk_cfg_params[] = { static int nmk_dt_pin_config(int index, int val, unsigned long *config) { - if (nmk_cfg_params[index].choice == NULL) + if (!nmk_cfg_params[index].choice) { *config = nmk_cfg_params[index].config; - else { + } else { /* test if out of range */ if (val < nmk_cfg_params[index].size) { *config = nmk_cfg_params[index].config | @@ -1105,9 +1105,9 @@ static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned int pin, if (gpiomode) /* No glitch when going to GPIO mode */ __nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO); - if (output) + if (output) { __nmk_gpio_make_output(nmk_chip, bit, val); - else { + } else { __nmk_gpio_make_input(nmk_chip, bit); __nmk_gpio_set_pull(nmk_chip, bit, pull); } From patchwork Wed Feb 28 11:28:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575217 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ADD1013B283; Wed, 28 Feb 2024 11:28:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="LIvQ46/m" Received: by mail.gandi.net (Postfix) with ESMTPSA id 934081BF211; Wed, 28 Feb 2024 11:28:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119701; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=dKuJlJDHFtwtHyGwNcDNStT1C0f3zdHI2RI/EGUYOk8=; b=LIvQ46/mspV2f9qlQ+vzDd+nZguxfkKJGIM5NddzX5KMwgSPFcb9blKVrk+nSB69qb9SNa gqhlrU3hFvOdkq7sSBvpLMNmP49yl2eIb4ueVOecNMNs3nqn4Qy7gHPb9C7UoiTxgruUxg l5Zlm3322XV4CISHgV2oWaO8TDsAFylcTKCZWVsDZn/BL2PUkoJMBIiFKkJMtkL+xQmVXH lWA2Cj+AQugWtfRUEkHNYvm7a9E1NqyRgrrgXmb9sRaCgeFW5me1iKZH4/7euDhFwN3Pk/ rL/Kcmm+ngO04IEStOu3WAZIjnX6Yv9+OWG6gcf7fe3xzw/p8jcJIWPIdq0Huw== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:12 +0100 Subject: [PATCH v2 14/30] gpio: nomadik: add #include Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-14-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Add linux/slab.h header include for GFP flags. Signed-off-by: Théo Lebrun --- drivers/gpio/gpio-nomadik.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index e39477e1a58f..9347c93af62c 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include From patchwork Wed Feb 28 11:28:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575222 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8AA3D1420D0; Wed, 28 Feb 2024 11:28:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119706; cv=none; b=gkY9Mr4zIO8PJpDOn9FteN9jFI2KHh4IbdgxXGKmn/35vNc1q+toULSIXt7tgPRVKHmfBLUxtc3wXPPRjm0Tc8YFGCKqi+qKHp2mnPwa9vod5UBhiX23NVl7ES6Hrio1UQgAY2yK3E6x1bVFUf5VHgHDvmiramuRlJOOl/xVCcs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119706; c=relaxed/simple; bh=O3eMSu40fMZuZcdZREanAgltxZLpQq8CYwl9qWdWfIc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=LZtdfExljw3shbonCWIFqqqywoSnp9NnQdR49FxNj40hKSgTSSMIrOGkU+cU4RfcAfXRM5IPWy04MDCg2YPtrkv+THe9Smvo5FhMBZcSeUG7AFWwVYQTahNJOh+WgKnrjesOq3VTwdEAsE4FhMdKTXVVLUQXwYKR9SXlSIYQ/xA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=dyEF1nRs; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="dyEF1nRs" Received: by mail.gandi.net (Postfix) with ESMTPSA id 4D7B21BF20D; Wed, 28 Feb 2024 11:28:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119701; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=c75kgKOiYHpbQtix7uno8/XdcHRwYzLdGlRcddNvHAw=; b=dyEF1nRs6W8USi7Wll44T3bf/F3aSNNi0evKR7LL09TL3L+d7KaIjAwLkPy0b0waIERjWj wt5ZrEPm5Mkg+/F/7u8JdxvE/doQuPzMkjadC6YtE0IgagJzdGKq8Oj8S1HUGwJKZRUpmx ZU/62WVI3i334NRCxpFrCU2lmmSg7JoBTarQI/NgP0M9TEM5CVFRcuzgJaXy8Ol3vFHFfW /7Sa2eChLSNQVk8qbg1J7jipIGn8MThz7Mehs0gqpsv8rJ5agzWrYoS9moaKwORgpojIqT lQcH7sy6eo6xK8RFCBkiQhFPxY0TjEaLZeSBVJ0Tz9RvPDDtSJEGWw+KSXsjCw== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:13 +0100 Subject: [PATCH v2 15/30] gpio: nomadik: replace of_find_*() by bus_find_device_by_of_node() Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-15-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Avoid OF APIs in the GPIO subsystem. Here, replace of_find_device_by_node() call by bus_find_device_by_of_node(). The new helper returns a struct device pointer. Store it in a new local variable and use it down the road. Signed-off-by: Théo Lebrun --- drivers/gpio/gpio-nomadik.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 9347c93af62c..f3ef3b4d08eb 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -483,17 +483,20 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, { struct nmk_gpio_chip *nmk_chip; struct platform_device *gpio_pdev; + struct device *gpio_dev; struct gpio_chip *chip; struct resource *res; struct clk *clk; void __iomem *base; u32 id; - gpio_pdev = of_find_device_by_node(np); - if (!gpio_pdev) { + gpio_dev = bus_find_device_by_of_node(&platform_bus_type, np); + if (!gpio_dev) { pr_err("populate \"%pOFn\": device not found\n", np); return ERR_PTR(-ENODEV); } + gpio_pdev = to_platform_device(gpio_dev); + if (of_property_read_u32(np, "gpio-bank", &id)) { dev_err(&pdev->dev, "populate: gpio-bank property not found\n"); platform_device_put(gpio_pdev); @@ -519,8 +522,8 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, chip = &nmk_chip->chip; chip->base = id * NMK_GPIO_PER_CHIP; chip->ngpio = NMK_GPIO_PER_CHIP; - chip->label = dev_name(&gpio_pdev->dev); - chip->parent = &gpio_pdev->dev; + chip->label = dev_name(gpio_dev); + chip->parent = gpio_dev; res = platform_get_resource(gpio_pdev, IORESOURCE_MEM, 0); base = devm_ioremap_resource(&pdev->dev, res); @@ -530,7 +533,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, } nmk_chip->addr = base; - clk = clk_get(&gpio_pdev->dev, NULL); + clk = clk_get(gpio_dev, NULL); if (IS_ERR(clk)) { platform_device_put(gpio_pdev); return (void *)clk; From patchwork Wed Feb 28 11:28:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575223 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 36D8F145B3F; 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Here, replace of_property_read_{u32,bool}() call by device_property_read_{u32,bool}(). Signed-off-by: Théo Lebrun --- drivers/gpio/gpio-nomadik.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index f3ef3b4d08eb..bba183c0b597 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -497,7 +497,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, } gpio_pdev = to_platform_device(gpio_dev); - if (of_property_read_u32(np, "gpio-bank", &id)) { + if (device_property_read_u32(gpio_dev, "gpio-bank", &id)) { dev_err(&pdev->dev, "populate: gpio-bank property not found\n"); platform_device_put(gpio_pdev); return ERR_PTR(-EINVAL); @@ -587,7 +587,7 @@ static int nmk_gpio_probe(struct platform_device *dev) } supports_sleepmode = - of_property_read_bool(np, "st,supports-sleepmode"); + device_property_read_bool(dev, "st,supports-sleepmode"); /* Correct platform device ID */ dev->id = nmk_chip->bank; From patchwork Wed Feb 28 11:28:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575225 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2A218148FE5; Wed, 28 Feb 2024 11:28:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119707; cv=none; b=Diwos9nXIPavWuoKBgjAQA5r0feDGJLyJPRqSsijzPkxaPFL0WB3wrGoKJ5PbFOruZx5JzVjDM2DFpMLcebrm76q8AAtl29C+xm5KOON/NLMBbOmAQJgBWa8gq7h2RWGYIDexbgbBbZ58ztHdCug2uwMjoUM6FIaDJycfeSPiJ4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119707; c=relaxed/simple; bh=OgwMaM+b8GH6uKY4FpjQxJ75kX/7bDkjfIEFjJ3pA/s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=oFnS9sFk2LBHsoyigv34IqtXUlYmk+0uRDKE4Ymlh5FDjpiuNXv2ZP52n7gGJcXAMD4tIRaltP4pvi1++0844P35o3m+9iLx4gsVGMUWKgLirOqmxTFYitNJ9iGZW99qbSbv57X/o5Lr3GZ//dXSTTrxZPWK4P+Khf5PBiSOZH4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=c/BsSpnm; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="c/BsSpnm" Received: by mail.gandi.net (Postfix) with ESMTPSA id A6A491BF21A; Wed, 28 Feb 2024 11:28:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119703; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=E0ZmgzMXKbmkgBa8vxJZo+tPY2HqLbOAvRCSZwlQWL0=; b=c/BsSpnm7nh6f7Cx1rg0yF82sBXXPq5tkaVYmHW+h+5QsLX71uzOesLUMMfyw/fwwsIeWR mK1ZdFaPAhnpDreF8D0jt7PIyOJVdqrDos2vBW82GMFv0+xQzMujFO48A2H+TEctczqWov PyUBoyne04uIcilLPWGSaJf/lo5rJkd2QnelZeFuQ2/EEoybqeUjHjRKTdRpQ7TURxuJFj V6KUJSy2tCqGkb+cEnoujv10JQKFwzIZqt3d9h8YuDtgAg57GK4Uf9KgVV5Oa4sMqFjfHY YW22LBUCyt/UnOtRh/wuMaZD+R5Ki2RMz8nB6sAqvqtJokzED7bCe0A5hHgrrQ== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:15 +0100 Subject: [PATCH v2 17/30] gpio: nomadik: use devm_platform_ioremap_resource() helper Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-17-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Replace calls to platform_get_resource() then devm_ioremap_resource() by a single call to devm_platform_ioremap_resource(). Signed-off-by: Théo Lebrun --- drivers/gpio/gpio-nomadik.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index bba183c0b597..93015fa3d010 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -485,7 +485,6 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, struct platform_device *gpio_pdev; struct device *gpio_dev; struct gpio_chip *chip; - struct resource *res; struct clk *clk; void __iomem *base; u32 id; @@ -525,8 +524,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, chip->label = dev_name(gpio_dev); chip->parent = gpio_dev; - res = platform_get_resource(gpio_pdev, IORESOURCE_MEM, 0); - base = devm_ioremap_resource(&pdev->dev, res); + base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(base)) { platform_device_put(gpio_pdev); return ERR_CAST(base); From patchwork Wed Feb 28 11:28:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575226 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C771B14A4D6; Wed, 28 Feb 2024 11:28:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119708; cv=none; b=Tlrzl8IRKXWNvNLxmx98pcwgLwNgsctbHq441JSz/7mm49WNog7fSfc8U4pj09DJqTRCtSh6849NoipyvqhrbVCSREpqDxbXOe5MUxms5Gtr78Xv+azCzYi2AWU0wUIl0wFsusWyu61Mir90Kth35bXZ0pkTMsPFlmMdDusvR2k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119708; c=relaxed/simple; bh=QDeGx8kwTh+bFt6eCqKGKD/p/BMyvNhx782+ALmCRTc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RqKFNd6waJ6p7gFvpeQHzEEv0zXn5h3HogE1ShgDeoD2XK9nXeaJKoPke/i6Bp1eLdbZO/j5QqR7A6Y50ugxkf8OKzargNbU1lzLkGcUfYpk2qJoBQNh9++MYFX3xROyo737h4H7hl9kocH3ktFjCcMDkKIdi0oBHRywGco6ESU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=DEbDrTeU; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="DEbDrTeU" Received: by mail.gandi.net (Postfix) with ESMTPSA id 62A361BF205; Wed, 28 Feb 2024 11:28:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119704; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=UVzgKFNV1exaQlx/j0qa2NvTSBRsCqWJEp+Uxg45yLc=; b=DEbDrTeUS9hpivzB2+bbkgjpy4iFDaNFXkHbvH8DL+IfJ8JqPqEyNLhzaP2SqGRps792vk em75tNECn3Y4VbEEUUzPn62ah99Scl88Hu921iT6yk96rVWSq3gJ6xIUOfHpJJkOiyW9nn bakUCQxPTofiVZl5pI/IzGeg7opuM8DwaJXnbc78fA+zqtFuf//sAp9OJBBFxeOGOsKWo7 2pwiePihE5pW6cHWxAJ0EYUBOdKbCFOaSW8q4QoRnhP0mtRxyhmVBqpCyxwifsZjnw9H1r MXncWd+Bx64KJY8qdHP0Dtjd/FQrsXDSGugUFHS+Uq+YXBOs4fw6pkoLxnPa1Q== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:16 +0100 Subject: [PATCH v2 18/30] gpio: nomadik: use devres version of clk_get*() Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-18-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Replace call to clk_get() by call to devm_clk_get(). Allow automatic cleanup of the clock in case of probe error. Signed-off-by: Théo Lebrun --- drivers/gpio/gpio-nomadik.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 93015fa3d010..fb821a9b6c5f 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -531,7 +531,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, } nmk_chip->addr = base; - clk = clk_get(gpio_dev, NULL); + clk = devm_clk_get(gpio_dev, NULL); if (IS_ERR(clk)) { platform_device_put(gpio_pdev); return (void *)clk; From patchwork Wed Feb 28 11:28:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575227 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 866CE14EFC9; Wed, 28 Feb 2024 11:28:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119709; cv=none; b=IoKWXCiHZs4i08JHjrWnJKmOX7NInD74caILRo5bDmbk/DGMVrrdAajIyiRUXw9YzcBG/go1yA2xADDdlT1nknY1EJ9oTTL/WUJmg/WFYdP3DIenbPhmppBD9etBA0p0NpZi+PKQV/3eVQFTHrXGAWvxsTmWAzZJP87sIaX2gGs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119709; c=relaxed/simple; bh=U2lbS9LDrBJq41Jr4wQmSyBLCS56Kq+xmsOSxI9mx1M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=VB2uBnFBMIG8Ycw0W6h01rWuPXe8vkoMMcPfUAaEPtozThQsKL9imTHT1swAL1GsxZj4ge5hiU1B2hVKAOXJrs9icwMjU3o27RUqvuv0Qvp2mYf1mFZtaoBnhTCnAMfdYGXbkh/WQFlMuI7vwboKLgW/adr1akaejIh3Ksp7fuQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=fAROkT0H; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="fAROkT0H" Received: by mail.gandi.net (Postfix) with ESMTPSA id 5B3F91BF213; Wed, 28 Feb 2024 11:28:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119705; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=It/BSKt5Sbfkf+TU6yukAJhR+S2DFSVZHDKVJ3bhbAM=; b=fAROkT0Hljn5SK22F8DzfJSaVfYf9hwl7TSS6FLJHagWJICZGEGoCBYro5wdyTEQGg5sex PfWvQrkyVSCbrrwBZjYE7fD+upJ0pPOiyWnHDdEiJsWbavgEHjCCOqgcZdPFV8EgLOApt9 VVwdTwG+A9gSrjUw3sWqcrVUHJG6djYJRnLDooJ1+1eA7J30kH5tIfKIeDCwFGCTCyOKDS KaJ7q/7J/+3Xw20SGCgO1si1njCcnboMtg4X7xpGHJVqqHj+YdFRezhjwLTW11up2gichH B9M5I+Vyr5UHay46vfBmjJsNG+3LZ6GrpC2tLJbDnV4TGMcBTL10/KIYLPa7TQ== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:17 +0100 Subject: [PATCH v2 19/30] gpio: nomadik: request dynamic ID allocation Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-19-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Move away from statically allocated GPIO IDs. Switch to dynamic ID allocation. Static IDs are deprecated because they cause issues when multiple GPIO controllers are to be found on the same platform. Add a bit of complexity to do pin number -> GPIO chip + offset. Previously, bank number and offsets were retrieved using division and remainder (bank size being constant 32). Now, to get the pin number matching a bank base, we must know the sum of ngpios of previous banks. This is done in find_nmk_gpio_from_pin() which also exposes the offset inside the bank. Also remove the assumption that bank sizes are constant. Instead of using NMK_GPIO_PER_CHIP as bank size, use nmk_gpio_chips[i]->ngpio. Signed-off-by: Théo Lebrun --- drivers/gpio/gpio-nomadik.c | 2 +- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 54 ++++++++++++++++++++----------- 2 files changed, 37 insertions(+), 19 deletions(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index fb821a9b6c5f..b7d76cc901dc 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -519,7 +519,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, nmk_chip->bank = id; chip = &nmk_chip->chip; - chip->base = id * NMK_GPIO_PER_CHIP; + chip->base = -1; chip->ngpio = NMK_GPIO_PER_CHIP; chip->label = dev_name(gpio_dev); chip->parent = gpio_dev; diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index b74378302229..5633f0ec2715 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -531,25 +531,33 @@ static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selector return 0; } -static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned int pin) +/* This makes the mapping from pin number to a GPIO chip. We also return the pin + * offset in the GPIO chip for convenience (and to avoid a second loop). + */ +static struct nmk_gpio_chip *find_nmk_gpio_from_pin(unsigned int pin, + unsigned int *offset) { - int i; + int i, j = 0; struct nmk_gpio_chip *nmk_gpio; + /* We assume that pins are allocated in bank order. */ for (i = 0; i < NMK_MAX_BANKS; i++) { nmk_gpio = nmk_gpio_chips[i]; if (!nmk_gpio) continue; - if (pin >= nmk_gpio->chip.base && - pin < nmk_gpio->chip.base + nmk_gpio->chip.ngpio) + if (pin >= j && pin < j + nmk_gpio->chip.ngpio) { + if (offset) + *offset = pin - j; return nmk_gpio; + } + j += nmk_gpio->chip.ngpio; } return NULL; } static struct gpio_chip *find_gc_from_pin(unsigned int pin) { - struct nmk_gpio_chip *nmk_gpio = find_nmk_gpio_from_pin(pin); + struct nmk_gpio_chip *nmk_gpio = find_nmk_gpio_from_pin(pin, NULL); if (nmk_gpio) return &nmk_gpio->chip; @@ -905,8 +913,18 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, * switching to the ALT C function. */ for (i = 0; i < g->grp.npins; i++) { - unsigned int bit = g->grp.pins[i] % NMK_GPIO_PER_CHIP; - slpm[g->grp.pins[i] / NMK_GPIO_PER_CHIP] &= ~BIT(bit); + struct nmk_gpio_chip *nmk_chip; + unsigned int bit; + + nmk_chip = find_nmk_gpio_from_pin(g->grp.pins[i], &bit); + if (!nmk_chip) { + dev_err(npct->dev, + "invalid pin offset %d in group %s at index %d\n", + g->grp.pins[i], g->grp.name, i); + goto out_pre_slpm_init; + } + + slpm[nmk_chip->bank] &= ~BIT(bit); } nmk_gpio_glitch_slpm_init(slpm); } @@ -915,7 +933,7 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, struct nmk_gpio_chip *nmk_chip; unsigned int bit; - nmk_chip = find_nmk_gpio_from_pin(g->grp.pins[i]); + nmk_chip = find_nmk_gpio_from_pin(g->grp.pins[i], &bit); if (!nmk_chip) { dev_err(npct->dev, "invalid pin offset %d in group %s at index %d\n", @@ -926,7 +944,6 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, g->grp.pins[i], g->altsetting); clk_enable(nmk_chip->clk); - bit = g->grp.pins[i] % NMK_GPIO_PER_CHIP; /* * If the pin is switching to altfunc, and there was an * interrupt installed on it which has been lazy disabled, @@ -957,17 +974,18 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned int function, ret = 0; out_glitch: - if (glitch) { + if (glitch) nmk_gpio_glitch_slpm_restore(slpm); +out_pre_slpm_init: + if (glitch) spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags); - } return ret; } static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, - unsigned int offset) + unsigned int pin) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); struct nmk_gpio_chip *nmk_chip; @@ -985,10 +1003,11 @@ static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev, chip = range->gc; nmk_chip = gpiochip_get_data(chip); - dev_dbg(npct->dev, "enable pin %u as GPIO\n", offset); + dev_dbg(npct->dev, "enable pin %u as GPIO\n", pin); + + find_nmk_gpio_from_pin(pin, &bit); clk_enable(nmk_chip->clk); - bit = offset % NMK_GPIO_PER_CHIP; /* There is no glitch when converting any pin to GPIO */ __nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO); clk_disable(nmk_chip->clk); @@ -998,11 +1017,11 @@ static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev, static void nmk_gpio_disable_free(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, - unsigned int offset) + unsigned int pin) { struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); - dev_dbg(npct->dev, "disable pin %u as GPIO\n", offset); + dev_dbg(npct->dev, "disable pin %u as GPIO\n", pin); /* Set the pin to some default state, GPIO is usually default */ } @@ -1043,7 +1062,7 @@ static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned int pin, int pull, slpm, output, val, i; bool lowemi, gpiomode, sleep; - nmk_chip = find_nmk_gpio_from_pin(pin); + nmk_chip = find_nmk_gpio_from_pin(pin, &bit); if (!nmk_chip) { dev_err(npct->dev, "invalid pin offset %d\n", pin); @@ -1101,7 +1120,6 @@ static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned int pin, lowemi ? "on" : "off"); clk_enable(nmk_chip->clk); - bit = pin % NMK_GPIO_PER_CHIP; if (gpiomode) /* No glitch when going to GPIO mode */ __nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO); From patchwork Wed Feb 28 11:28:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575228 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 32CE4152DED; Wed, 28 Feb 2024 11:28:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119709; cv=none; b=UsZGuOKYlBB6IR4tDU5K5sz4p4PbexJSOEhnmqjanO/Kp8IZpjF4vIRtlG3qKCZAFK2Fxcxs/6eHIkhxPqkIdCdRBCn4wD46fvEGhxmbqysSJNB6mXkh1iJU0V2j4Xt3I1p0NnwsR42bBgZ/ex2c8b0YynGnmQV5LCjN+nM5RzA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119709; c=relaxed/simple; bh=XWWL3eyR8a1smbNLx8fU1UmuVxwfhD8TNlUTq3LKaMk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=CSIUw5J491DC4rkxZptHwg4QciyekMfPW1d8tA29HlFOxefk0UHniFAD6vwcReXeVEC4jBRiFJsKWTxMtlQw+8H4ToGCIqzHY/nrVh2ex7guxdrQQQAwvfquI+xNiLpARiFVKu0zdnjEQtGOEzzbvh4/XND0wFNrYxSP49EeLeg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=h8eRII9p; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="h8eRII9p" Received: by mail.gandi.net (Postfix) with ESMTPSA id 2574D1BF218; Wed, 28 Feb 2024 11:28:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119705; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WxIu54NFmTQm8hNsehWJC+M+NOJFTGcij28O895cc+A=; b=h8eRII9pZ0tb8GDAwVRIFfmiql0iTGIE70/fRLgPkWkGlQzSAfmhKVQJXo9J9H+ZQWTfr2 n3vl3ZTEqPv0Di6MHlYG6B4tbeFmd/uU4giyF04BZda91t03zQ68bin8PikzX67G5iVSbG ocLdX1e3GvfLQlBe24Aj7BeTw/XqyJaFOJRx+AC5h3F+7DRCQUq5cuC5grutClJ6WnBQTM V6qATt294LM4EzuEHiPE1j6CwTL6C8j0NBbmclgeDu2amd8+Sqs2IeMUSutu5Fs4nF9MdO Qq4HYzqJQv5zDPK6uFP8fsvnazVAcjgFv/CFmojaK1zF0qV5+Yk979DCdfDUFg== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:18 +0100 Subject: [PATCH v2 20/30] gpio: nomadik: make clock optional Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-20-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Not all platforms using this platform driver expose a clock for this GPIO controller. Turn devm_clk_get() into devm_clk_get_optional() to avoid failing when no clocks are provided. Signed-off-by: Théo Lebrun --- drivers/gpio/gpio-nomadik.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index b7d76cc901dc..3ccbb731cb68 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -531,7 +531,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, } nmk_chip->addr = base; - clk = devm_clk_get(gpio_dev, NULL); + clk = devm_clk_get_optional(gpio_dev, NULL); if (IS_ERR(clk)) { platform_device_put(gpio_pdev); return (void *)clk; From patchwork Wed Feb 28 11:28:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575229 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1CF4812F589; Wed, 28 Feb 2024 11:28:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119710; cv=none; b=ZnOUeXWtBTS1fY4yZgmvCkJwfdGmoYawUFsrUsLpDqm5IDlgYysr/6glFgzaX1+dhsTOYQAdnDgDi3B1dHmLRUfplXrGAzjhuEPw58RvDf0rL8ZiKzjYxmoAMHudA3Ka5Z4tpvgWYydm0vGm/N3avJWpRMLuC1dyYLyYgEoyDag= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119710; c=relaxed/simple; bh=Js76SD3ng4nDx3td8WLSMI1+imxrzbAsm85GMeVDw3E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=f5QZXRSZ9Y9gX8f3CZrQ3GCNQi7jq+O0A8bZAvRYmLVX5gFeLgNgmv82HIz88qAu/2UBonXhdmRShqbsxqoqt255CL4ASiFN9jf79DP1xwch+rp6HgXMs/88kBa05ccCtoj/ZN2GOngTjmY9AN6ZVluJg//PKoM7II55Y0OEkPs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=CdVSXOB0; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="CdVSXOB0" Received: by mail.gandi.net (Postfix) with ESMTPSA id DA5AC1BF207; Wed, 28 Feb 2024 11:28:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119706; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oy9sE+g4PcUKd7+KwFjA9JhwfcrofErnd/worNZZEIk=; b=CdVSXOB08xW/Zynmk3MSsTrONJHlU6QHlm7VOpZq/fMA9byp9jn+kfHvDEIEdz6lQTWLQG nr0RsSaB6oAPBaOE7lRvmlNSjZtGT40Rfnsf+zdeNzofjuwkgbkPe5T+/UiMgBQWYi7tsj +RWDg68ahOHauBz4KKUzmFru75NYAynQNZcf7KUIShX7oF+VfL6hIfUNpK42umQHil3tM4 S3H4HyLnvaHxIoh7OJ+bBvv6t0plmAj2kcI7c2nwpK2Ok9Q2bC5X6QvVIGAd70c+E7vlBz jolzwMmG/SST3ejwxnqTuo5DxhfW4l7tkseSFjvkFYuHGIbNxK64PpZDuLUwmg== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:19 +0100 Subject: [PATCH v2 21/30] gpio: nomadik: change driver name from gpio to gpio-nomadik Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-21-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com This GPIO driver is historically related to the Nomadik platform. It however can be used by others as it implements the ST STA2X11 IP block. Pick a less ambiguous name for it. Signed-off-by: Théo Lebrun --- drivers/gpio/gpio-nomadik.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 3ccbb731cb68..c22a0864ca70 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -649,7 +649,7 @@ static const struct of_device_id nmk_gpio_match[] = { static struct platform_driver nmk_gpio_driver = { .driver = { - .name = "gpio", + .name = "nomadik-gpio", .of_match_table = nmk_gpio_match, }, .probe = nmk_gpio_probe, From patchwork Wed Feb 28 11:28:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575230 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 006FE12F38F; Wed, 28 Feb 2024 11:28:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119711; cv=none; b=dubIT8FopCTpcVP/7WY2d53oy27LlXLJ8FrUjv2/IRtx6UTDpWdCsqnIYYw7j8VNGeYcvB/HKJUD1FCkYgtV+77mLvfqHyyX1NNFYDoO+8GjCZmmRtXFMTg1ebFpakM0x16vf+9e0QrVQqVoHTaIf8I+SepnqiAVPZ9tAbZfm70= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119711; c=relaxed/simple; bh=Bt01r7qnkqveaEZoAxJtWKfIOL9IL4OdMDDB8Om59DE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=MRcVqtzmk2kCE3x9KH69U8CS5wt/O+z8EXXnxdtvVdb25Y0R0h/0mhADy0Tnljj/iJEnmgkxHpjPDGcoxKJ+BMooKofx2kjrdD1ysrAcgMp8DVcYW09EEdXNjv3TjgoYgDxkYhY35W7S5p7bsjGGmLKXTgtYoCYk894d7o4jMY4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=DBZ/9Xhe; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="DBZ/9Xhe" Received: by mail.gandi.net (Postfix) with ESMTPSA id A12871BF204; Wed, 28 Feb 2024 11:28:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119707; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1CKPeuaFeg2qn7vKIBXgXa0jHiCHpqCVug3U+r+c9qM=; b=DBZ/9XhetHH8Lu80R4BIRRy4pKmJa5KlrneukUL2KEppGtVd3Jimh3KZ4BpnODbAenFSAX 5Ryf78hAO1Vg0QkgruAEsm4wpy7sGXOsipe0c7doA6m5DaCxtvT6DA0JriskHl6Vk3gLrJ tmuDTaJNM4ICu4cC8v4BAYh+zafRD5U/xpLtizRBobm32ikRp/JuSAUp7zGAzqskd+v+47 s1J7L6SHK7JYNkm9MVsR/kaCcvpiPj6Db+9KHyiGExr5N6XCgvkhcAnM1pgNYmNv9YjXqp tMi+0eTiHlFSR9AK2JY2zT16dcymg4LzQbKqhBkbo1MB0XPFXrnmWIz3VjqvBg== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:20 +0100 Subject: [PATCH v2 22/30] gpio: nomadik: support shared GPIO IRQs Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-22-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Support a single IRQs used by multiple GPIO banks. Change the IRQ handler type from a chained handler (as used by gpiolib for ->parent_handler) to a threaded IRQ. Use the generic_handle_domain_irq_safe() helper. The non-safe version must be called in a no-IRQ context. The Mobileye EyeQ5 platform uses this GPIO controller and share an IRQ for its two banks. Signed-off-by: Théo Lebrun --- drivers/gpio/gpio-nomadik.c | 68 ++++++++++++++++++++++++--------------------- 1 file changed, 36 insertions(+), 32 deletions(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index c22a0864ca70..ca5c28965224 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -255,27 +255,28 @@ static void nmk_gpio_irq_shutdown(struct irq_data *d) clk_disable(nmk_chip->clk); } -static void nmk_gpio_irq_handler(struct irq_desc *desc) +static irqreturn_t nmk_gpio_irq_handler(int irq, void *dev_id) { - struct irq_chip *host_chip = irq_desc_get_chip(desc); - struct gpio_chip *chip = irq_desc_get_handler_data(desc); - struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(chip); - u32 status; - - chained_irq_enter(host_chip, desc); + struct nmk_gpio_chip *nmk_chip = dev_id; + struct gpio_chip *chip = &nmk_chip->chip; + unsigned long mask = GENMASK(chip->ngpio - 1, 0); + unsigned long status; + int bit; clk_enable(nmk_chip->clk); + status = readl(nmk_chip->addr + NMK_GPIO_IS); - clk_disable(nmk_chip->clk); - while (status) { - int bit = __ffs(status); + /* Ensure we cannot leave pending bits; this should never occur. */ + if (unlikely(status & ~mask)) + writel(status & ~mask, nmk_chip->addr + NMK_GPIO_IC); - generic_handle_domain_irq(chip->irq.domain, bit); - status &= ~BIT(bit); - } + clk_disable(nmk_chip->clk); - chained_irq_exit(host_chip, desc); + for_each_set_bit(bit, &status, chip->ngpio) + generic_handle_domain_irq_safe(chip->irq.domain, bit); + + return IRQ_RETVAL((status & mask) != 0); } /* I/O Functions */ @@ -568,19 +569,20 @@ static const struct irq_chip nmk_irq_chip = { GPIOCHIP_IRQ_RESOURCE_HELPERS, }; -static int nmk_gpio_probe(struct platform_device *dev) +static int nmk_gpio_probe(struct platform_device *pdev) { - struct device_node *np = dev->dev.of_node; + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; struct nmk_gpio_chip *nmk_chip; - struct gpio_chip *chip; struct gpio_irq_chip *girq; bool supports_sleepmode; + struct gpio_chip *chip; int irq; int ret; - nmk_chip = nmk_gpio_populate_chip(np, dev); + nmk_chip = nmk_gpio_populate_chip(np, pdev); if (IS_ERR(nmk_chip)) { - dev_err(&dev->dev, "could not populate nmk chip struct\n"); + dev_err(dev, "could not populate nmk chip struct\n"); return PTR_ERR(nmk_chip); } @@ -588,9 +590,9 @@ static int nmk_gpio_probe(struct platform_device *dev) device_property_read_bool(dev, "st,supports-sleepmode"); /* Correct platform device ID */ - dev->id = nmk_chip->bank; + pdev->id = nmk_chip->bank; - irq = platform_get_irq(dev, 0); + irq = platform_get_irq(pdev, 0); if (irq < 0) return irq; @@ -602,7 +604,7 @@ static int nmk_gpio_probe(struct platform_device *dev) spin_lock_init(&nmk_chip->lock); chip = &nmk_chip->chip; - chip->parent = &dev->dev; + chip->parent = dev; chip->request = gpiochip_generic_request; chip->free = gpiochip_generic_free; chip->get_direction = nmk_gpio_get_dir; @@ -616,17 +618,19 @@ static int nmk_gpio_probe(struct platform_device *dev) girq = &chip->irq; gpio_irq_chip_set_chip(girq, &nmk_irq_chip); - girq->parent_handler = nmk_gpio_irq_handler; - girq->num_parents = 1; - girq->parents = devm_kcalloc(&dev->dev, 1, - sizeof(*girq->parents), - GFP_KERNEL); - if (!girq->parents) - return -ENOMEM; - girq->parents[0] = irq; + girq->parent_handler = NULL; + girq->num_parents = 0; + girq->parents = NULL; girq->default_type = IRQ_TYPE_NONE; girq->handler = handle_edge_irq; + ret = devm_request_irq(dev, irq, nmk_gpio_irq_handler, IRQF_SHARED, + dev_name(dev), nmk_chip); + if (ret) { + dev_err(dev, "failed requesting IRQ\n"); + return ret; + } + clk_enable(nmk_chip->clk); nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI); clk_disable(nmk_chip->clk); @@ -635,9 +639,9 @@ static int nmk_gpio_probe(struct platform_device *dev) if (ret) return ret; - platform_set_drvdata(dev, nmk_chip); + platform_set_drvdata(pdev, nmk_chip); - dev_info(&dev->dev, "chip registered\n"); + dev_info(dev, "chip registered\n"); return 0; } From patchwork Wed Feb 28 11:28:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575231 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6635F159562; Wed, 28 Feb 2024 11:28:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119712; cv=none; b=RWvJ5SAmRMa/kYbC/fH9mxe73FwTbJtZ20cRBD8keanY5HLsmJ+JEaPnPQlgBGVfh2p+uQsAuwhxlilro7b1K2KWI2AC22vnYBJ7aD7WDowWOuVpEpXTpc0F0S1OBcnFoB/bDSQOBpL3KXl5Z+PlRUywhuh0nTUXAe+3/qzZ2rw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119712; c=relaxed/simple; bh=MOoZG7N3FoO3fUI+8Qt09OJ2w6mp91/VEJxL24dr6+w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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bh=V4Gfor6nuolYGIUugrPyNoXIQvvUlt1/WBnyFdZgisA=; b=kPKLZp1z3M2JMAD0B+M2oXyWomFPy/uN2VdXu6pHnjc8DuBGZ4xCyAcNrQpFc2BcKAtToz +Iez3aYRvdg+rpdkwjQEG+mTpPdRFi8YPtedBtT5hBS49ryhNkjLTWuBc5d4DRikpPHHWF ya6l4yz/k7eIIzHxqxT/DjoRuA0/IeYE/GjFtQs3CyOOGpmbvTiJGsrEXmVZ7iqMp4sONW lB+N8hLHNnbnmDkYTxmVppd34EQhjTqGtFpJEJM1oaLafET1ETF2gCxx11oKKFHOFx7EPs gHhHp1x/TNRkH+mdbmqA+ok8MjtaERMW6yYrfUf/gBk0A4fHXyb/d+YsBuim1A== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:21 +0100 Subject: [PATCH v2 23/30] gpio: nomadik: handle variadic GPIO count Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-23-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Read the "ngpios" property to determine the number of GPIOs for a bank. If not available, fallback to NMK_GPIO_PER_CHIP ie 32 ie the current behavior. The IP block always supports 32 GPIOs, but platforms can expose a lesser amount. The Mobileye EyeQ5 is in this case; one bank is 29 GPIOs and the other is 23. Reviewed-by: Linus Walleij Signed-off-by: Théo Lebrun --- drivers/gpio/gpio-nomadik.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index ca5c28965224..19394dc7e34a 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -488,7 +488,7 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, struct gpio_chip *chip; struct clk *clk; void __iomem *base; - u32 id; + u32 id, ngpio; gpio_dev = bus_find_device_by_of_node(&platform_bus_type, np); if (!gpio_dev) { @@ -518,10 +518,15 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, return ERR_PTR(-ENOMEM); } + if (device_property_read_u32(gpio_dev, "ngpios", &ngpio)) { + ngpio = NMK_GPIO_PER_CHIP; + dev_dbg(&pdev->dev, "populate: using default ngpio (%d)\n", ngpio); + } + nmk_chip->bank = id; chip = &nmk_chip->chip; chip->base = -1; - chip->ngpio = NMK_GPIO_PER_CHIP; + chip->ngpio = ngpio; chip->label = dev_name(gpio_dev); chip->parent = gpio_dev; From patchwork Wed Feb 28 11:28:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575232 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0DEDD15A482; Wed, 28 Feb 2024 11:28:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119712; cv=none; b=hRAxgJ3qV4S/3LEGG+cnPugwqtv5ZkB101RaxUXsA4Rj2IAKvkshTG+TaKmJ0dQQDDgYwlAcVqkn9F8EZJ9b9zL12kNUGH24/uy+bvMhqOCz5OsKjQD/g6z8FBc+xMD/ygcfir+YA2Dmw1bChGuEazVgVVGhiRAWBkfIWeINKug= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119712; c=relaxed/simple; bh=C8wzUiMMPN153dY2ai4SVgqCUlLyJb13QYhk4yIEGYQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ecYFAB/9wwRdfVPZTgswx+zh1vPWUFXTslmUdurqXkZloHtuKwMYBWSWOiN1b+oD8rJLVb1f0rGuinDU3K5HVqrHPR5j4ayNaeizOKHGn8pZ541GoqH33p7+zD6RHowc2QGwRZS2WR8NiWBR3g8rRJ7BlLznP+LHz/KqCw0aw9A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=QGJBqIHz; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="QGJBqIHz" Received: by mail.gandi.net (Postfix) with ESMTPSA id 1210B1BF20F; Wed, 28 Feb 2024 11:28:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119708; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FMmsOBRNX0bkvaPiwBdj1qqN+PLRV9gop71FqQuBE0g=; b=QGJBqIHzO6Rg3hNskxbVaNa1Mar9TPUqxHriIoRA4/4S1lfmKO8blzXGXzrhT6lRsIxQ8s C2MASwK831ppseqtyPAfg/IAdcSCEpodRIrOqHWR3Nov7jqARilh9qTIV9F5jHpN9YEXcu VNkdIeOJK91VbbZn65DuRjySkgpmaNLC3fUEAScwndn72za1Y42hNQJd2WEiypSZcSN1VK DhBV06JPj91MdZyK2r+xXhTsUx0U2nkFp45RvUpcVN0I4nqstIhkmTq4DOz1PTNDnMoiyW D+upTgKzygmoW147XtF5wL2j8F/N3gOv+moF77bLHkZTThHXgVUZ2+y3ulvhKg== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:22 +0100 Subject: [PATCH v2 24/30] gpio: nomadik: support mobileye,eyeq5-gpio Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-24-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com We create a custom compatible for the STA2X11 IP block as integrated into the Mobileye EyeQ5 platform. Its wake and alternate functions have been disabled, we want to avoid touching those registers. We both do: (1) early return in functions that do not support the platform, but with warnings, and (2) avoid calling those functions in the first place. We ensure that pinctrl-nomadik is not used with this STA2X11 variant. Reviewed-by: Linus Walleij Signed-off-by: Théo Lebrun --- drivers/gpio/Kconfig | 5 ++-- drivers/gpio/gpio-nomadik.c | 42 ++++++++++++++++++++++++++----- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 2 ++ include/linux/gpio/gpio-nomadik.h | 1 + 4 files changed, 42 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index ff83371251c1..fe6112abb73a 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -480,11 +480,12 @@ config GPIO_MXS config GPIO_NOMADIK bool "Nomadik GPIO driver" - depends on ARCH_U8500 || ARCH_NOMADIK || COMPILE_TEST + depends on ARCH_U8500 || ARCH_NOMADIK || MACH_EYEQ5 || COMPILE_TEST select OF_GPIO select GPIOLIB_IRQCHIP help - Say yes here to support the Nomadik SoC GPIO block. + Say yes here to support the Nomadik SoC GPIO block. This block is also + used by the Mobileye EyeQ5 SoC. It handles up to 32 GPIOs per bank, that can all be interrupt sources. It is deeply interconnected with the associated pinctrl driver as GPIO diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 19394dc7e34a..6adb3c4417d3 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -7,6 +7,12 @@ * The GPIO chips are shared with pinctrl-nomadik if used; it needs access for * pinmuxing functionality and others. * + * This driver also handles the mobileye,eyeq5-gpio compatible. It is an STA2X11 + * but with only data, direction and interrupts register active. We want to + * avoid touching SLPM, RWIMSC, FWIMSC, AFSLA and AFSLB registers; that is, + * wake and alternate function registers. It is NOT compatible with + * pinctrl-nomadik. + * * Copyright (C) 2008,2009 STMicroelectronics * Copyright (C) 2009 Alessandro Rubini * Rewritten based on work by Prafulla WADASKAR @@ -37,6 +43,10 @@ void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, unsigned int offset, { u32 slpm; + /* We should NOT have been called. */ + if (WARN_ON(nmk_chip->is_mobileye_soc)) + return; + slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC); if (mode == NMK_GPIO_SLPM_NOCHANGE) slpm |= BIT(offset); @@ -93,6 +103,9 @@ static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, rimscval = &nmk_chip->rimsc; fimscval = &nmk_chip->fimsc; } else { + /* We should NOT have been called. */ + if (WARN_ON(nmk_chip->is_mobileye_soc)) + return; rimscreg = NMK_GPIO_RWIMSC; fimscreg = NMK_GPIO_FWIMSC; rimscval = &nmk_chip->rwimsc; @@ -119,6 +132,10 @@ static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip, int offset, bool on) { + /* We should NOT have been called. */ + if (WARN_ON(nmk_chip->is_mobileye_soc)) + return; + /* * Ensure WAKEUP_ENABLE is on. No need to disable it if wakeup is * disabled, since setting SLPM to 1 increases power consumption, and @@ -143,7 +160,7 @@ static void nmk_gpio_irq_maskunmask(struct nmk_gpio_chip *nmk_chip, __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, enable); - if (!(nmk_chip->real_wake & BIT(d->hwirq))) + if (!nmk_chip->is_mobileye_soc && !(nmk_chip->real_wake & BIT(d->hwirq))) __nmk_gpio_set_wake(nmk_chip, d->hwirq, enable); spin_unlock(&nmk_chip->lock); @@ -175,6 +192,10 @@ static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on) struct nmk_gpio_chip *nmk_chip = gpiochip_get_data(gc); unsigned long flags; + /* Handler is registered in all cases. */ + if (nmk_chip->is_mobileye_soc) + return -ENXIO; + clk_enable(nmk_chip->clk); spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); spin_lock(&nmk_chip->lock); @@ -213,7 +234,7 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) if (enabled) __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, false); - if (enabled || wake) + if (!nmk_chip->is_mobileye_soc && (enabled || wake)) __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false); nmk_chip->edge_rising &= ~BIT(d->hwirq); @@ -227,7 +248,7 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) if (enabled) __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, true); - if (enabled || wake) + if (!nmk_chip->is_mobileye_soc && (enabled || wake)) __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, true); spin_unlock_irqrestore(&nmk_chip->lock, flags); @@ -357,6 +378,10 @@ static int nmk_gpio_get_mode(struct nmk_gpio_chip *nmk_chip, int offset) { u32 afunc, bfunc; + /* We don't support modes. */ + if (nmk_chip->is_mobileye_soc) + return NMK_GPIO_ALT_GPIO; + clk_enable(nmk_chip->clk); afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & BIT(offset); @@ -523,6 +548,8 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, dev_dbg(&pdev->dev, "populate: using default ngpio (%d)\n", ngpio); } + nmk_chip->is_mobileye_soc = device_is_compatible(gpio_dev, + "mobileye,eyeq5-gpio"); nmk_chip->bank = id; chip = &nmk_chip->chip; chip->base = -1; @@ -636,9 +663,11 @@ static int nmk_gpio_probe(struct platform_device *pdev) return ret; } - clk_enable(nmk_chip->clk); - nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI); - clk_disable(nmk_chip->clk); + if (!nmk_chip->is_mobileye_soc) { + clk_enable(nmk_chip->clk); + nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI); + clk_disable(nmk_chip->clk); + } ret = gpiochip_add_data(chip, nmk_chip); if (ret) @@ -653,6 +682,7 @@ static int nmk_gpio_probe(struct platform_device *pdev) static const struct of_device_id nmk_gpio_match[] = { { .compatible = "st,nomadik-gpio", }, + { .compatible = "mobileye,eyeq5-gpio", }, {} }; diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 5633f0ec2715..7849144b3b80 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1230,6 +1230,8 @@ static int nmk_pinctrl_probe(struct platform_device *pdev) dev_err(&pdev->dev, "could not populate nmk chip struct - continue anyway\n"); of_node_put(gpio_np); + /* We are NOT compatible with mobileye,eyeq5-gpio. */ + BUG_ON(nmk_chip->is_mobileye_soc); } prcm_np = of_parse_phandle(np, "prcm", 0); diff --git a/include/linux/gpio/gpio-nomadik.h b/include/linux/gpio/gpio-nomadik.h index 0166ddb71f43..9bdb09fda4c9 100644 --- a/include/linux/gpio/gpio-nomadik.h +++ b/include/linux/gpio/gpio-nomadik.h @@ -57,6 +57,7 @@ struct nmk_gpio_chip { void (*set_ioforce)(bool enable); spinlock_t lock; bool sleepmode; + bool is_mobileye_soc; /* Keep track of configured edges */ u32 edge_rising; u32 edge_falling; From patchwork Wed Feb 28 11:28:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575233 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B5BF915A4BA; Wed, 28 Feb 2024 11:28:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="k/iehBZp" Received: by mail.gandi.net (Postfix) with ESMTPSA id BA1DE1BF203; Wed, 28 Feb 2024 11:28:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119709; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7c9tumQQXuG4HieeWpZE+FRQlT5QELiXjdV48vp4z3o=; b=k/iehBZporOFOkjyRzIBzHutL0jHTIkX2HF3wMsXMUDCXGPWYoOJpPgmPxTVhcidxY/Ak6 Ju2GfeYXaBaNfnjii+TahW7TfEjhmKAvzBhJPHVJQMbQNtVs8WdhgIZF/wPYMaYINCNtPo HZXvCqXq2xEVWTMCSuzoVTLCiROviRrjPg/K7BimabQnIgzfawdqndMac5gUeuXxcpMYZr hpG0MfmwAozmxgPzbx07LrSSDrpHBeYg2b/vG7k13Jt1WWyZ+msOIfjRUh94rfXxAHbAGv b+BRVh/pM9K0L61U5Ax+UaxSqnRuga+M/jrpRcd4pTxJBSQsfTLcvhEfuInLgA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:23 +0100 Subject: [PATCH v2 25/30] gpio: nomadik: grab optional reset control and deassert it at probe Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-25-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Fetch a reference to the optional shared reset control and deassert it if it exists. Optional because not all platforms that use this driver have a reset attached to the reset block. Shared because some platforms that use the reset (at least Mobileye EyeQ5) share the reset across banks. Do not keep a reference to the reset control as it is not needed afterwards; the driver does not handle suspend, does not use runtime PM, does not register a remove callback and does not support unbinding from sysfs (made explicit with suppress_bind_attrs). The operation is done in nmk_gpio_populate_chip(). This function is called by either gpio-nomadik or pinctrl-nomadik, whoever comes first. This is here for historic reasons and could probably be removed now; it seems gpio-ranges enforces the ordering to be pinctrl-first. It is not the topic of the present patch however. Signed-off-by: Théo Lebrun --- drivers/gpio/gpio-nomadik.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c index 6adb3c4417d3..c9fd6631e0aa 100644 --- a/drivers/gpio/gpio-nomadik.c +++ b/drivers/gpio/gpio-nomadik.c @@ -509,11 +509,13 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, { struct nmk_gpio_chip *nmk_chip; struct platform_device *gpio_pdev; + struct reset_control *reset; struct device *gpio_dev; struct gpio_chip *chip; struct clk *clk; void __iomem *base; u32 id, ngpio; + int ret; gpio_dev = bus_find_device_by_of_node(&platform_bus_type, np); if (!gpio_dev) { @@ -572,6 +574,24 @@ struct nmk_gpio_chip *nmk_gpio_populate_chip(struct device_node *np, clk_prepare(clk); nmk_chip->clk = clk; + reset = devm_reset_control_get_optional_shared(gpio_dev, NULL); + if (IS_ERR(reset)) { + dev_err(&pdev->dev, "failed getting reset control: %ld\n", + PTR_ERR(reset)); + return ERR_CAST(reset); + } + + /* + * Reset might be shared and asserts/deasserts calls are unbalanced. We + * only support sharing this reset with other gpio-nomadik devices that + * use this reset to ensure deassertion at probe. + */ + ret = reset_control_deassert(reset); + if (ret) { + dev_err(&pdev->dev, "failed reset deassert: %d\n", ret); + return ERR_PTR(ret); + } + #ifdef CONFIG_PINCTRL_NOMADIK BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips)); nmk_gpio_chips[id] = nmk_chip; @@ -690,6 +710,7 @@ static struct platform_driver nmk_gpio_driver = { .driver = { .name = "nomadik-gpio", .of_match_table = nmk_gpio_match, + .suppress_bind_attrs = true, }, .probe = nmk_gpio_probe, }; From patchwork Wed Feb 28 11:28:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575234 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 46A3215B100; Wed, 28 Feb 2024 11:28:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119714; cv=none; b=QjY2t4z/+VFfCHPzFNZcucB7BPGtDA46gH2aMOT8B2tJ0Nc4I4D1M3BWR1pAaS4J9uRuYDY3rIALtQLtGiBu/LcnJ7hSm1kkhw4QmwQ888gv7gv71NXR1VYHFtck9qFDaVWcWUM4Lyo0lAG9IuNi4HGKc7IU9UQJGk4Avqta1FM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119714; c=relaxed/simple; bh=CuQIZkGPYKfwIxHjL83ks3D5WIvU+cFZKGpyf39cIfk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ETMMRDvFqotPBiK1YgXGcIp7qjlhHFQf0VG0T4H/ij15rn1rf1ycNydbl+Bg9k5ZJQ48AjCSfdyaKsLHyCehQQEJwi9aAe9w+AkjQ7eJ/fCafcQYxszaU7uczXZ6cKLUZDskrD2qgNq3MtR92KfTWwk2h9Xv/tGT8iLOX0L94ds= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=FPs4A+FS; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="FPs4A+FS" Received: by mail.gandi.net (Postfix) with ESMTPSA id 7DEAD1BF216; Wed, 28 Feb 2024 11:28:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119710; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FNoO6vmJ9el3v5aN6NX8aYKdgPlN5duDCePRMfT5iF0=; b=FPs4A+FSUsI1jbmC5iRp/YjJ5AetOfXSFRU/BbEMB8tPtEzk8ghIPZvPVYoEE9QrzAALr7 PYLOp+tdssftRzOGsKPmKwsiDsp8lJbtqsjXyQRE1xx48ZBJfuNngfeqKmp0cxN7LeFbJ6 9SPUDb2BYKToI3Mic91+gTQOtqA8ZbBa4SC/wC1pyK51coWhuwH5sohz/QtA2m2R133V03 /NUUU8qlZtHa4bC76oGxJ5cK/0FezljCo7PWfIJPBG2EgrdfMk/ND049CjHnTa0u8Xi/t0 TgiE4MWdX0mBJ98RYVzABKHdHhzWKQhaSFiWAsXLSGMoMtzmq9uvFHGazvYWKA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:24 +0100 Subject: [PATCH v2 26/30] Documentation: gpio: mention generic_handle_irq_safe() Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-26-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= , Stephen Warren , Jonathan Corbet , linux-doc@vger.kernel.org X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com generic_handle_irq() must be called from a no-IRQ context. Documentation advices on using a fake raw lock to call generic_handle_irq() from any context. Since 509853f9e1e7 ("genirq: Provide generic_handle_irq_safe()"), a better alternative is available. To: Stephen Warren To: Jonathan Corbet Cc: linux-doc@vger.kernel.org Signed-off-by: Théo Lebrun Reviewed-by: Linus Walleij --- Documentation/driver-api/gpio/driver.rst | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/Documentation/driver-api/gpio/driver.rst b/Documentation/driver-api/gpio/driver.rst index bf6319cc531b..550d167a82ed 100644 --- a/Documentation/driver-api/gpio/driver.rst +++ b/Documentation/driver-api/gpio/driver.rst @@ -339,15 +339,8 @@ Cascaded GPIO irqchips usually fall in one of three categories: The generic_handle_irq() is expected to be called with IRQ disabled, so the IRQ core will complain if it is called from an IRQ handler which is - forced to a thread. The "fake?" raw lock can be used to work around this - problem:: - - raw_spinlock_t wa_lock; - static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank) - unsigned long wa_lock_flags; - raw_spin_lock_irqsave(&bank->wa_lock, wa_lock_flags); - generic_handle_irq(irq_find_mapping(bank->chip.irq.domain, bit)); - raw_spin_unlock_irqrestore(&bank->wa_lock, wa_lock_flags); + forced to a thread. generic_handle_irq_safe() can be used to work around + this problem; it can safely be called from any context. - GENERIC CHAINED GPIO IRQCHIPS: these are the same as "CHAINED GPIO irqchips", but chained IRQ handlers are not used. Instead GPIO IRQs dispatching is From patchwork Wed Feb 28 11:28:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575235 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 34F3E15B974; Wed, 28 Feb 2024 11:28:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119715; cv=none; b=LQI/Mh6XAkNSvGpT2+ggTTrxaK5sd+SpBubyu6r8eZCLWfyOqFzNuhg2GIII3TPLyagHws7wK9zzAiT1ZCoawkhF4Zr0b5r3XeJiVXFXcOKJHi/7i6YQ/kKqFKUhF7N6jo0hV/o/XJ1ob3qQOKnvcxK0BA0VecfESvwU8312nPE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119715; c=relaxed/simple; bh=oGgJ8gpaqNelt5SQc8DcHBifkEvfboVrcnZ7BcpiHEM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=pgNAQkA/AjI0SlfuIInSZ/edgyobTv2o5NJfYnHcVW+vd/pPxzb+DzfnlKRoKmR/E6a+trgvgC0t9eHN6fTHbST+vi15/hWL4yJ7f+0PIoFX+mELuX1R2wxR6iT74WNpCxeZ3T7n33bGQ3YIFiUwl7jdZberqtHrjSQLfNwbqbU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=GuSbooRT; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="GuSbooRT" Received: by mail.gandi.net (Postfix) with ESMTPSA id EEBE71BF205; Wed, 28 Feb 2024 11:28:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119711; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gg4NpT1+tGaIwywkDyVXPjv6BH/uwC3MOgmWJRGX7RQ=; b=GuSbooRTPsdPVvaawnG9AF+wk4vds8BusKSYzoPwTbqyDtYCnDAxSn5SHw2bHit7BkbWgf W9fqZMDvioRTG6YEQsKQ66uIueRCvqE3k2KlKHdjEQJwm6+GOeF5YeIxsydPp1F/Pz/lLI DCihn5/IQ4RoNFh/X8R2iPCpp6arHv24cikuxruFaERSA3eRjSmK57RXK8qe2s21ZWKFvn qSuMKZ9XP4tf+ZLAwbzN7wtCFscmONDOUpIqTAsAbtQIpgwljqAdPIefO9Q7YpS1CBGKmf fI0cr6UNHuYMTEZFz/UAf3Ik3hB4Y3ClxnZYobokrHBOP81s+EngTUE2HFSlgA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:25 +0100 Subject: [PATCH v2 27/30] MIPS: eyeq5_defconfig: enable GPIO by default Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-27-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Add both CONFIG_GPIOLIB=y and CONFIG_GPIO_NOMADIK=y to our platform defconfig. Default config is CONFIG_GPIOLIB=n. Signed-off-by: Théo Lebrun Acked-by: Linus Walleij --- arch/mips/configs/eyeq5_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/mips/configs/eyeq5_defconfig b/arch/mips/configs/eyeq5_defconfig index c35c29a4d479..6f052d4c5e58 100644 --- a/arch/mips/configs/eyeq5_defconfig +++ b/arch/mips/configs/eyeq5_defconfig @@ -66,6 +66,8 @@ CONFIG_SERIAL_AMBA_PL011_CONSOLE=y CONFIG_HW_RANDOM=y # CONFIG_PTP_1588_CLOCK is not set CONFIG_PINCTRL=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_NOMADIK=y CONFIG_MFD_SYSCON=y CONFIG_HID_A4TECH=y CONFIG_HID_BELKIN=y From patchwork Wed Feb 28 11:28:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575236 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DCE7615CD47; Wed, 28 Feb 2024 11:28:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119716; cv=none; b=kC3ZbyxVQrbTz6ChG5fDuAVZUZfWji59uKxLwedz7stAmencf++Wea5ogFdKXaJU6rhAHIvNZSqAWNXOKJ2LxOziPsgW2+JmEXxfkUpNS34oH6gdJAlonglpdjbPDLBpBaiH/wCFSJ+Se0fOTbvW6EVXhMUWO9/nOTUnuQYblr4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119716; c=relaxed/simple; bh=HhFUuvndfjaSqasjWMz9GJl5r35qeCTPu7aLKxHaCKs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PlehGudgEK6+yOAsZ9ak3GO901RWaibY2g80TbLsKSKcTdxFS3iLG7fXg+97G1J0eVCRwGwwSBYHiqhM0kwGWKOp9bYjJgwNemXDAZ2SgISsg/lJbwtG2fhJ/Vfg2SAYG+AW3potW1XZ94fzri9uzP6q4UHtyAZLP+shBmcaeDw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=fnU/jrSR; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="fnU/jrSR" Received: by mail.gandi.net (Postfix) with ESMTPSA id 9D08A1BF219; Wed, 28 Feb 2024 11:28:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119712; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=uq0DPUf03GzjraZNzemqCpT91bjhZDBezLXQfKzg4vE=; b=fnU/jrSRHTXJIeUiDceVTbJn+etiOTYJRSX70xeikOILLIAPIOvbYImkwGsXD2wqqkUzLa ic2y0CYbLU1WJdSrXIuaoaxVt65L/4J8g8+TUFccGK55mUDIdvQRNo+M4dU4/5iIekvuqH W2v1LGfSfelivCnKvDuweW4aUBYw/tNfDjBRDQPXkRG7uoDS9iTBVwsKp1HC4S7xgYHlRq RiU7qE2WsQcUTN810F/80XjC5W3Z3T46rdL/UJxIX1+MEJr7t8kVgnE2QRzuuLWE06fgr5 ZCtYQmKkMgBPmF/J7NVlxo7XsoHZqLq5Ym59ccYxQ3qCQWyzMtPI7xxVOAMSjw== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:26 +0100 Subject: [PATCH v2 28/30] MIPS: mobileye: eyeq5: add two GPIO bank nodes Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-28-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com This platform uses the same GPIO controller as Nomadik. It however has its own pinconf & pinmux controller. EyeQ5 is the first platform to use gpio-nomadik independently from pinctrl-nomadik. Signed-off-by: Théo Lebrun Acked-by: Linus Walleij --- arch/mips/boot/dts/mobileye/eyeq5.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/mips/boot/dts/mobileye/eyeq5.dtsi b/arch/mips/boot/dts/mobileye/eyeq5.dtsi index 8d4f65ec912d..0f18ac73620b 100644 --- a/arch/mips/boot/dts/mobileye/eyeq5.dtsi +++ b/arch/mips/boot/dts/mobileye/eyeq5.dtsi @@ -158,6 +158,32 @@ timer { clocks = <&core0_clk>; }; }; + + gpio0: gpio@1400000 { + compatible = "mobileye,eyeq5-gpio"; + reg = <0x0 0x1400000 0x0 0x1000>; + gpio-bank = <0>; + ngpios = <29>; + interrupt-parent = <&gic>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio1: gpio@1500000 { + compatible = "mobileye,eyeq5-gpio"; + reg = <0x0 0x1500000 0x0 0x1000>; + gpio-bank = <1>; + ngpios = <23>; + interrupt-parent = <&gic>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; }; }; From patchwork Wed Feb 28 11:28:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575237 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3107D15CD57; Wed, 28 Feb 2024 11:28:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119716; cv=none; b=SwLrJIjGMkyl3O+sTpQ1s4+aTb6VfEXIsB8RuicwoMWFFWhVOvBSZHjfTzXmocvP2qoPHYHV6RaK8YOOSwhv+XxRGeR4xQABBOk8C5R8xikpjLRJrLZr+OKQ9px+Ty1vEFq6Fx+ESbYwH/OthwNm+LAORbYcfVL5VoY0FEbAqNk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119716; c=relaxed/simple; bh=scoXGBjHtapVDwyNRsT3nzK/OYslkAGYZkSdqOZ17fM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XLdPp2U7qvEDbVAxt7RXPDQ9XWnVNqK2kalg/s+apbrCf3pc57GpEtMxF/R8Bhxiqt/MRZFmtpcUrNJvq07l6UUDbttjjfur9Bc5uAOv7N9Ev32XzsWkwR8a3rTr1dfH/PyPDEjal6P0IogIwNPgWu9eUSiPSjCVjBLxd3Kg0is= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=XMIpp4tG; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="XMIpp4tG" Received: by mail.gandi.net (Postfix) with ESMTPSA id 49D751BF210; Wed, 28 Feb 2024 11:28:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119712; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=YKcXEFXFtj/83Z5hgCIOhTpOO4T5SFVRu7N+tcLxJRU=; b=XMIpp4tGyLmn6M46me/FpCRHP5UB3+E2zxJOh5w8k0RY3lH7UnPTmm38uenYHYySPKILM/ dxDjJB8EdHz1bqldZcYCZqAlu9eDGoCAzNWdXCGDZqr5UdZcYO0yNIpbBfZMtWbf+jqt2S K9IUH5gu4OEfyneiVL9NuBYnDcVpg8BwPEtVdJCEvsXnPqb3CT7F4RT70HFr3MR4qrF/x8 7J+twvJ6GdTobDHtVIW5lzsqghZ7+S3Myrorcm53BAu/ONZHXUENTIXPu9ckzD+L+AP08W IvCiSsMQIfbueOzl5gKZTjBhf0ns8II5vJt8FqAIMYcZG6LRCrk5X5rnPPu1rA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:27 +0100 Subject: [PATCH v2 29/30] MIPS: mobileye: eyeq5: add resets to GPIO banks Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-29-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com The two GPIO banks share a single reset line. Signed-off-by: Théo Lebrun Acked-by: Linus Walleij --- arch/mips/boot/dts/mobileye/eyeq5.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/mips/boot/dts/mobileye/eyeq5.dtsi b/arch/mips/boot/dts/mobileye/eyeq5.dtsi index 0f18ac73620b..5f00d129c057 100644 --- a/arch/mips/boot/dts/mobileye/eyeq5.dtsi +++ b/arch/mips/boot/dts/mobileye/eyeq5.dtsi @@ -170,6 +170,7 @@ gpio0: gpio@1400000 { #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + resets = <&reset 0 26>; }; gpio1: gpio@1500000 { @@ -183,6 +184,7 @@ gpio1: gpio@1500000 { #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + resets = <&reset 0 26>; }; }; }; From patchwork Wed Feb 28 11:28:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 13575238 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 12FF615D5A2; Wed, 28 Feb 2024 11:28:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119717; cv=none; b=tfPMrbgbxczQSIxfdxX2MrTmd1Xcne0RqnrkZwP9egU/RzxJLoqpLV809ONm2FDbJ5vpPOVXj0GG4lybuU9PR4e0wHuOV0sOk/n+gO2DtJS10BBw/uUI5vUwsNtZW6i6SpODxHSyV5wDb9likyQDScPUB4HfCggQIoX3jVZTjTQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709119717; c=relaxed/simple; bh=LZXd37PvNSwXU5xfvI/2wf4xPTyEjUPaJOZPtTjdEuk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HWjLO9EiAJJ1jGAKjJBy9ImUbxn59gkTW/8+fRNlfxdvmwrOr2u5Aiztyyvi+PBzF01tOsBrWNYz0DxfHXc67Cad5omYBpZ0xib3STgRi3iSJ8XT0RIeLWU3Z7VDXwvgG24zesudhB4s2nU2myBZ+A5cD59E7TZBJeWFv/sMzt0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=V0d5XFLH; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="V0d5XFLH" Received: by mail.gandi.net (Postfix) with ESMTPSA id F2F7B1BF21A; Wed, 28 Feb 2024 11:28:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709119713; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VpV5SvbrLw6BtffS77u0tmC5Cq+M6dFN+xE6ca04/74=; b=V0d5XFLHmBCXn5TfFeKJHIG2hVLgs1bsqH9BDqqayu45k42SOPN07miDPppVL9EpKui5zt TpUkX5X7TS/35ocivrHFc0O9mHToArmHY+OL66bZIeUMyMqVp1x+4UGlTK7iDDKHB4TsDD NpQq3vLV4eTSl0burMLrMvfbz2hIZk7HPB7hA5ptn0JwICHIhkHJz/vzLvR1nDAnKKH+WM BgKMemBgQ1NPx2ggGomj0OaE8+uWjb3WIBARzcQsarC2XTdSCeU0FNBq3kEwCZ5evoJ/gM rrYr4An8/+JqSNQ3FmfHapmTUoUV9NNPNmt8tQt9YCizfVt1TMpruFrhmp9Q7g== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 28 Feb 2024 12:28:28 +0100 Subject: [PATCH v2 30/30] MIPS: mobileye: eyeq5: map GPIOs to pins using gpio-ranges Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-mbly-gpio-v2-30-3ba757474006@bootlin.com> References: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> In-Reply-To: <20240228-mbly-gpio-v2-0-3ba757474006@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Thomas Bogendoerfer Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Gregory CLEMENT , Vladimir Kondratiev , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Create a mapping between the GPIO controllers and the pin controllers. GPIO is handled in a one-instance-per-bank manner while pinctrl is done with a single instance for both pin banks. See gpio-ranges documentation: Documentation/devicetree/bindings/gpio/gpio.txt Signed-off-by: Théo Lebrun Acked-by: Linus Walleij --- arch/mips/boot/dts/mobileye/eyeq5.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/mips/boot/dts/mobileye/eyeq5.dtsi b/arch/mips/boot/dts/mobileye/eyeq5.dtsi index 5f00d129c057..68f6c81331d7 100644 --- a/arch/mips/boot/dts/mobileye/eyeq5.dtsi +++ b/arch/mips/boot/dts/mobileye/eyeq5.dtsi @@ -168,6 +168,7 @@ gpio0: gpio@1400000 { interrupts = ; gpio-controller; #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 29>; interrupt-controller; #interrupt-cells = <2>; resets = <&reset 0 26>; @@ -182,6 +183,7 @@ gpio1: gpio@1500000 { interrupts = ; gpio-controller; #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 29 23>; interrupt-controller; #interrupt-cells = <2>; resets = <&reset 0 26>;