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[92.145.124.62]) by smtp.gmail.com with ESMTPSA id ch12-20020a5d5d0c000000b0033dabeacab2sm15500222wrb.39.2024.02.28.09.52.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Feb 2024 09:52:55 -0800 (PST) From: Alexandre Ghiti To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrea Parri , Anup Patel , Steven Rostedt , Masami Hiramatsu , Mark Rutland , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-trace-kernel@vger.kernel.org Cc: Alexandre Ghiti Subject: [PATCH 1/2] riscv: Remove superfluous smp_mb() Date: Wed, 28 Feb 2024 18:51:48 +0100 Message-Id: <20240228175149.162646-2-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240228175149.162646-1-alexghiti@rivosinc.com> References: <20240228175149.162646-1-alexghiti@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240228_095301_681275_6E8FF4F6 X-CRM114-Status: UNSURE ( 9.01 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This memory barrier is not needed and not documented so simply remove it. Suggested-by: Andrea Parri Signed-off-by: Alexandre Ghiti Reviewed-by: Andrea Parri --- arch/riscv/kernel/patch.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/riscv/kernel/patch.c b/arch/riscv/kernel/patch.c index 37e87fdcf6a0..0b5c16dfe3f4 100644 --- a/arch/riscv/kernel/patch.c +++ b/arch/riscv/kernel/patch.c @@ -239,7 +239,6 @@ static int patch_text_cb(void *data) } else { while (atomic_read(&patch->cpu_count) <= num_online_cpus()) cpu_relax(); - smp_mb(); } return ret; From patchwork Wed Feb 28 17:51:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alexandre Ghiti X-Patchwork-Id: 13575806 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 394A8C47DD9 for ; Wed, 28 Feb 2024 17:54:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ATZ2EIvlxBC6OpjtVZDQH7JA6Vk/Ly1ggsUifHVoS4I=; b=YWLExWqiemuE7g YqOtOQWXKsQTGWQUTUhymGeB9X9lcDGGYZyv0VUSHdISav/mRNysz0Hy7f4M1kq9RpU+e5R8Gfk0b EVbJzw8HN9m/Py/8LK+ufC9/zLzMLehsWChq7YGWqokDSQvuRgv/s/u32RXzNEgL35U0OZ5nsYh8w nzoojK/9omU8mFIiVfKufBz6ARJVjYcuPmvCfFH00dgJ1jGl1i7IQhFH4XmBTndpi6gc8oEYtZnqW tb+hLWJRnTv4sHCVmOQKnZU9Ko81jNTuikr6WvtlQ+oRRXoUNwoYtBuQ/1/83hBfdooXfb9+M3F8s OLh3Mn3Po8AUvC8eMSFQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rfO82-0000000AN1S-28q0; Wed, 28 Feb 2024 17:54:02 +0000 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rfO7y-0000000AMyp-2hsS for linux-riscv@lists.infradead.org; Wed, 28 Feb 2024 17:54:00 +0000 Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-412a3371133so76125e9.2 for ; Wed, 28 Feb 2024 09:53:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1709142836; x=1709747636; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Y2KLsPuh1XpNjZ2CAToQLQwQXyB2VEROM3hvTLFmqyk=; b=XiQxd1WV1jYnTJtxFnt7bcuMJ8YHrp7mA8Mf4wbzgSahlmGnVQA4tgsflddhwFrv2X 6LRkpPk4VtxaKK7nZ8ZinS7Y1YMz8y1tRqOxGqvWbmn1JczU1oafhdA8myUaFwzgpab6 aSDjgPwzQ3FsF8uXcOPpJ/05ajYSq99xUdicaiL0k7xQ0A6AsnmENUWl1x/eu8PLag3q PrPZbh9ZJic9eDu4k/P+eYnSUHgCZsyU+y2/ThfI9o61khpZsJkINYQnm2vtzYzkfKZt 9+0sdae2uKlKMBJQX499NpVdIJZOhkYBrD2J8cxD8IC8ZDrodXuYpwOHylxeLz88cchX Bm6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709142836; x=1709747636; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Y2KLsPuh1XpNjZ2CAToQLQwQXyB2VEROM3hvTLFmqyk=; b=k0q0kQ52HEzjZ4hUYCrlEY5fkhaNmKag2HTlhUBlo1A+wAxaEjWhCMcr4UEZI81DBv PTEguVDeSK0jw7ylPVmFMNMP6L+8p0t8YCS6isBhbPd/hllvpcRmupbKPbRILpgkZZD1 kkeGW/zukBHGqIipvXZPLGbm9Q0UeBToYKqvUluM70jhnuqCfJaQ5mGma8SkSyK0zpZS fdi7cgHC4BZmcRIZxodXnM64wYPmbLWeYqhwoOCUETIo4Yl9BBdV9Yzn1joG5bT63xnu oWYqSHPf4pWbNXroofQYgSsDwqkEcAwVUbDP0EtwUmHqHqJlC6WE76dVMaaxv+pE0fDZ F1xg== X-Forwarded-Encrypted: i=1; AJvYcCUQLMqfBkXIlMcRG/i5yTWEJ9iCacvkvkyjssHKKLPQZEi95Z/7/P3d/5D+ZD1C6lHhMy6bM4jExXx5D4nGbYDi7acCtvmesCcDLqvxgIW8 X-Gm-Message-State: AOJu0Yz2THkNPO04OZEG+ONDSg0VKnnDHHW2mPfABuw2kMyzlJ8vLl6T U/11DEWB6lHRgbKk1/NBmCjLzP5zoDomi7/vfrCFAoZulYj3ZCbTY5Sp2smBZMU= X-Google-Smtp-Source: AGHT+IFzsKFwkm6/PUuNhQXzmzQ00xQ91ajZbuZqPe2v3cVZIJEAYjZNYyL+734jbdq5mZCUaY5k7A== X-Received: by 2002:a05:600c:190a:b0:412:b15c:9769 with SMTP id j10-20020a05600c190a00b00412b15c9769mr174697wmq.25.1709142836667; Wed, 28 Feb 2024 09:53:56 -0800 (PST) Received: from alex-rivos.ba.rivosinc.com (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id n12-20020a05600c500c00b00412abfb0ed0sm2880142wmr.0.2024.02.28.09.53.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Feb 2024 09:53:56 -0800 (PST) From: Alexandre Ghiti To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrea Parri , Anup Patel , Steven Rostedt , Masami Hiramatsu , Mark Rutland , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-trace-kernel@vger.kernel.org Cc: Alexandre Ghiti , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= Subject: [PATCH 2/2] riscv: Fix text patching when IPI are used Date: Wed, 28 Feb 2024 18:51:49 +0100 Message-Id: <20240228175149.162646-3-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240228175149.162646-1-alexghiti@rivosinc.com> References: <20240228175149.162646-1-alexghiti@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240228_095358_813156_77CD3F97 X-CRM114-Status: GOOD ( 17.75 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org For now, we use stop_machine() to patch the text and when we use IPIs for remote icache flushes (which is emitted in patch_text_nosync()), the system hangs. So instead, make sure every cpu executes the stop_machine() patching function and emit a local icache flush there. Co-developed-by: Björn Töpel Signed-off-by: Björn Töpel Signed-off-by: Alexandre Ghiti Reviewed-by: Andrea Parri --- arch/riscv/include/asm/patch.h | 1 + arch/riscv/kernel/ftrace.c | 42 ++++++++++++++++++++++++++++++---- arch/riscv/kernel/patch.c | 18 +++++++++------ 3 files changed, 50 insertions(+), 11 deletions(-) diff --git a/arch/riscv/include/asm/patch.h b/arch/riscv/include/asm/patch.h index e88b52d39eac..9f5d6e14c405 100644 --- a/arch/riscv/include/asm/patch.h +++ b/arch/riscv/include/asm/patch.h @@ -6,6 +6,7 @@ #ifndef _ASM_RISCV_PATCH_H #define _ASM_RISCV_PATCH_H +int patch_insn_write(void *addr, const void *insn, size_t len); int patch_text_nosync(void *addr, const void *insns, size_t len); int patch_text_set_nosync(void *addr, u8 c, size_t len); int patch_text(void *addr, u32 *insns, int ninsns); diff --git a/arch/riscv/kernel/ftrace.c b/arch/riscv/kernel/ftrace.c index f5aa24d9e1c1..5654966c4e7d 100644 --- a/arch/riscv/kernel/ftrace.c +++ b/arch/riscv/kernel/ftrace.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include @@ -75,8 +76,7 @@ static int __ftrace_modify_call(unsigned long hook_pos, unsigned long target, make_call_t0(hook_pos, target, call); /* Replace the auipc-jalr pair at once. Return -EPERM on write error. */ - if (patch_text_nosync - ((void *)hook_pos, enable ? call : nops, MCOUNT_INSN_SIZE)) + if (patch_insn_write((void *)hook_pos, enable ? call : nops, MCOUNT_INSN_SIZE)) return -EPERM; return 0; @@ -88,7 +88,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) make_call_t0(rec->ip, addr, call); - if (patch_text_nosync((void *)rec->ip, call, MCOUNT_INSN_SIZE)) + if (patch_insn_write((void *)rec->ip, call, MCOUNT_INSN_SIZE)) return -EPERM; return 0; @@ -99,7 +99,7 @@ int ftrace_make_nop(struct module *mod, struct dyn_ftrace *rec, { unsigned int nops[2] = {NOP4, NOP4}; - if (patch_text_nosync((void *)rec->ip, nops, MCOUNT_INSN_SIZE)) + if (patch_insn_write((void *)rec->ip, nops, MCOUNT_INSN_SIZE)) return -EPERM; return 0; @@ -134,6 +134,40 @@ int ftrace_update_ftrace_func(ftrace_func_t func) return ret; } + +struct ftrace_modify_param { + int command; + atomic_t cpu_count; +}; + +static int __ftrace_modify_code(void *data) +{ + struct ftrace_modify_param *param = data; + + if (atomic_inc_return(¶m->cpu_count) == num_online_cpus()) { + ftrace_modify_all_code(param->command); + /* + * Make sure the patching store is effective *before* we + * increment the counter which releases all waiting cpus + * by using the release version of atomic increment. + */ + atomic_inc_return_release(¶m->cpu_count); + } else { + while (atomic_read(¶m->cpu_count) <= num_online_cpus()) + cpu_relax(); + } + + local_flush_icache_all(); + + return 0; +} + +void arch_ftrace_update_code(int command) +{ + struct ftrace_modify_param param = { command, ATOMIC_INIT(0) }; + + stop_machine(__ftrace_modify_code, ¶m, cpu_online_mask); +} #endif #ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS diff --git a/arch/riscv/kernel/patch.c b/arch/riscv/kernel/patch.c index 0b5c16dfe3f4..82d8508c765b 100644 --- a/arch/riscv/kernel/patch.c +++ b/arch/riscv/kernel/patch.c @@ -188,7 +188,7 @@ int patch_text_set_nosync(void *addr, u8 c, size_t len) } NOKPROBE_SYMBOL(patch_text_set_nosync); -static int patch_insn_write(void *addr, const void *insn, size_t len) +int patch_insn_write(void *addr, const void *insn, size_t len) { size_t patched = 0; size_t size; @@ -211,11 +211,9 @@ NOKPROBE_SYMBOL(patch_insn_write); int patch_text_nosync(void *addr, const void *insns, size_t len) { - u32 *tp = addr; int ret; - ret = patch_insn_write(tp, insns, len); - + ret = patch_insn_write(addr, insns, len); if (!ret) flush_icache_range((uintptr_t) tp, (uintptr_t) tp + len); @@ -232,15 +230,21 @@ static int patch_text_cb(void *data) if (atomic_inc_return(&patch->cpu_count) == num_online_cpus()) { for (i = 0; ret == 0 && i < patch->ninsns; i++) { len = GET_INSN_LENGTH(patch->insns[i]); - ret = patch_text_nosync(patch->addr + i * len, - &patch->insns[i], len); + ret = patch_insn_write(patch->addr + i * len, &patch->insns[i], len); } - atomic_inc(&patch->cpu_count); + /* + * Make sure the patching store is effective *before* we + * increment the counter which releases all waiting cpus + * by using the release version of atomic increment. + */ + atomic_inc_return_release(&patch->cpu_count); } else { while (atomic_read(&patch->cpu_count) <= num_online_cpus()) cpu_relax(); } + local_flush_icache_all(); + return ret; } NOKPROBE_SYMBOL(patch_text_cb);