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Remove 'slave_id' from fsl_edma_chan to eliminate redundancy. Signed-off-by: Frank Li --- drivers/dma/fsl-edma-common.h | 1 - drivers/dma/fsl-edma-main.c | 10 +++++----- drivers/dma/mcf-edma-main.c | 4 ++-- 3 files changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index 7bf0aba471a8c..4cf1de9f0e512 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -151,7 +151,6 @@ struct fsl_edma_chan { enum dma_status status; enum fsl_edma_pm_state pm_state; bool idle; - u32 slave_id; struct fsl_edma_engine *edma; struct fsl_edma_desc *edesc; struct dma_slave_config cfg; diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index 402f0058a180c..0a6e0c4040274 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -114,8 +114,8 @@ static struct dma_chan *fsl_edma_xlate(struct of_phandle_args *dma_spec, if (chan) { chan->device->privatecnt++; fsl_chan = to_fsl_edma_chan(chan); - fsl_chan->slave_id = dma_spec->args[1]; - fsl_edma_chan_mux(fsl_chan, fsl_chan->slave_id, + fsl_chan->srcid = dma_spec->args[1]; + fsl_edma_chan_mux(fsl_chan, fsl_chan->srcid, true); mutex_unlock(&fsl_edma->fsl_edma_mutex); return chan; @@ -540,7 +540,7 @@ static int fsl_edma_probe(struct platform_device *pdev) fsl_chan->edma = fsl_edma; fsl_chan->pm_state = RUNNING; - fsl_chan->slave_id = 0; + fsl_chan->srcid = 0; fsl_chan->idle = true; fsl_chan->dma_dir = DMA_NONE; fsl_chan->vchan.desc_free = fsl_edma_free_desc; @@ -682,8 +682,8 @@ static int fsl_edma_resume_early(struct device *dev) continue; fsl_chan->pm_state = RUNNING; edma_write_tcdreg(fsl_chan, 0, csr); - if (fsl_chan->slave_id != 0) - fsl_edma_chan_mux(fsl_chan, fsl_chan->slave_id, true); + if (fsl_chan->srcid != 0) + fsl_edma_chan_mux(fsl_chan, fsl_chan->srcid, true); } if (!(fsl_edma->drvdata->flags & FSL_EDMA_DRV_SPLIT_REG)) diff --git a/drivers/dma/mcf-edma-main.c b/drivers/dma/mcf-edma-main.c index dba6317838767..78c606f6d0026 100644 --- a/drivers/dma/mcf-edma-main.c +++ b/drivers/dma/mcf-edma-main.c @@ -195,7 +195,7 @@ static int mcf_edma_probe(struct platform_device *pdev) struct fsl_edma_chan *mcf_chan = &mcf_edma->chans[i]; mcf_chan->edma = mcf_edma; - mcf_chan->slave_id = i; + mcf_chan->srcid = i; mcf_chan->idle = true; mcf_chan->dma_dir = DMA_NONE; mcf_chan->vchan.desc_free = fsl_edma_free_desc; @@ -277,7 +277,7 @@ bool mcf_edma_filter_fn(struct dma_chan *chan, void *param) if (chan->device->dev->driver == &mcf_edma_driver.driver) { struct fsl_edma_chan *mcf_chan = to_fsl_edma_chan(chan); - return (mcf_chan->slave_id == (uintptr_t)param); + return (mcf_chan->srcid == (uintptr_t)param); } return false; From patchwork Thu Feb 29 20:58:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 13577651 Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-he1eur04on2040.outbound.protection.outlook.com [40.107.7.40]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D81FF156961; Thu, 29 Feb 2024 20:59:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Signed-off-by: Frank Li --- drivers/dma/fsl-edma-main.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index 0a6e0c4040274..2148a7f1ae843 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -115,6 +115,13 @@ static struct dma_chan *fsl_edma_xlate(struct of_phandle_args *dma_spec, chan->device->privatecnt++; fsl_chan = to_fsl_edma_chan(chan); fsl_chan->srcid = dma_spec->args[1]; + + if (!fsl_chan->srcid) { + dev_err(&fsl_chan->pdev->dev, "Invalidate srcid %d\n", + fsl_chan->srcid); + return NULL; + } + fsl_edma_chan_mux(fsl_chan, fsl_chan->srcid, true); mutex_unlock(&fsl_edma->fsl_edma_mutex); From patchwork Thu Feb 29 20:58:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 13577652 Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-he1eur04on2040.outbound.protection.outlook.com [40.107.7.40]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0CBF9156D1C; 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Removes these unused features. Signed-off-by: Frank Li --- drivers/dma/fsl-edma-common.h | 2 -- drivers/dma/fsl-edma-main.c | 8 -------- 2 files changed, 10 deletions(-) diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index 4cf1de9f0e512..532f647e540e7 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -192,7 +192,6 @@ struct fsl_edma_desc { #define FSL_EDMA_DRV_WRAP_IO BIT(3) #define FSL_EDMA_DRV_EDMA64 BIT(4) #define FSL_EDMA_DRV_HAS_PD BIT(5) -#define FSL_EDMA_DRV_HAS_CHCLK BIT(6) #define FSL_EDMA_DRV_HAS_CHMUX BIT(7) /* imx8 QM audio edma remote local swapped */ #define FSL_EDMA_DRV_QUIRK_SWAPPED BIT(8) @@ -237,7 +236,6 @@ struct fsl_edma_engine { void __iomem *muxbase[DMAMUX_NR]; struct clk *muxclk[DMAMUX_NR]; struct clk *dmaclk; - struct clk *chclk; struct mutex fsl_edma_mutex; const struct fsl_edma_drvdata *drvdata; u32 n_chans; diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index 2148a7f1ae843..41c71c360ff1f 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -483,14 +483,6 @@ static int fsl_edma_probe(struct platform_device *pdev) } } - if (drvdata->flags & FSL_EDMA_DRV_HAS_CHCLK) { - fsl_edma->chclk = devm_clk_get_enabled(&pdev->dev, "mp"); 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Thu, 29 Feb 2024 20:59:07 +0000 From: Frank Li Date: Thu, 29 Feb 2024 15:58:10 -0500 Subject: [PATCH v2 4/5] dt-bindings: dma: fsl-edma: add fsl,imx8ulp-edma compatible string Message-Id: <20240229-8ulp_edma-v2-4-9d12f883c8f7@nxp.com> References: <20240229-8ulp_edma-v2-0-9d12f883c8f7@nxp.com> In-Reply-To: <20240229-8ulp_edma-v2-0-9d12f883c8f7@nxp.com> To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peng Fan Cc: imx@lists.linux.dev, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Frank Li , Joy Zou X-Mailer: b4 0.13-dev-c87ef X-Developer-Signature: v=1; a=ed25519-sha256; t=1709240333; l=2253; i=Frank.Li@nxp.com; s=20240130; h=from:subject:message-id; bh=69rs8YqYZCymIbs+K13VMFKLlvI1eiJnh+HrTKSOoFc=; b=xX8N0++pYL1AEHJXDs2/OPlAg9/V9HhdlB4GUXLEtluiFLtWTSz6mGjpBTvwzJp9u/UrfFt3j WYbxfwISmPGAvbGKX3g4OGlJm2u/H3YujwGsNRdT04vdfu8pPiNGKBx X-Developer-Key: i=Frank.Li@nxp.com; a=ed25519; pk=I0L1sDUfPxpAkRvPKy7MdauTuSENRq+DnA+G4qcS94Q= X-ClientProxiedBy: SJ0PR13CA0060.namprd13.prod.outlook.com (2603:10b6:a03:2c2::35) To PAXPR04MB9642.eurprd04.prod.outlook.com (2603:10a6:102:240::14) Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PAXPR04MB9642:EE_|PAXPR04MB8750:EE_ X-MS-Office365-Filtering-Correlation-Id: 0cf0b413-f8e8-468b-9ee7-08dc396944f4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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The i.MX8ULP eDMA architecture features one clock for each DMA channel and an additional clock for the core controller. Given a maximum of 32 DMA channels, the maximum clock number consequently increases to 33. Signed-off-by: Joy Zou Signed-off-by: Frank Li --- .../devicetree/bindings/dma/fsl,edma.yaml | 26 ++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/fsl,edma.yaml b/Documentation/devicetree/bindings/dma/fsl,edma.yaml index aa51d278cb67b..55cce79c759f8 100644 --- a/Documentation/devicetree/bindings/dma/fsl,edma.yaml +++ b/Documentation/devicetree/bindings/dma/fsl,edma.yaml @@ -23,6 +23,7 @@ properties: - fsl,imx7ulp-edma - fsl,imx8qm-adma - fsl,imx8qm-edma + - fsl,imx8ulp-edma - fsl,imx93-edma3 - fsl,imx93-edma4 - fsl,imx95-edma5 @@ -53,11 +54,11 @@ properties: clocks: minItems: 1 - maxItems: 2 + maxItems: 33 clock-names: minItems: 1 - maxItems: 2 + maxItems: 33 big-endian: description: | @@ -108,6 +109,7 @@ allOf: properties: clocks: minItems: 2 + maxItems: 2 clock-names: items: - const: dmamux0 @@ -136,6 +138,7 @@ allOf: properties: clock: minItems: 2 + maxItems: 2 clock-names: items: - const: dma @@ -151,6 +154,25 @@ allOf: dma-channels: const: 32 + - if: + properties: + compatible: + contains: + const: fsl,imx8ulp-edma + then: + properties: + clock: + maxItems: 33 + clock-names: + items: + - const: dma + - pattern: "^CH[0-31]-clk$" + interrupt-names: false + interrupts: + maxItems: 32 + "#dma-cells": + const: 3 + unevaluatedProperties: false examples: From patchwork Thu Feb 29 20:58:11 2024 Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?/esJpUDMJTTL7h/BM1gwO11I+MK6?= =?utf-8?q?iuWqbJmqYOPrJWn5tIG599TGQDGWQaL19gl/Hwe4xWD198uek5SFnJtnrYvDuA4t9?= =?utf-8?q?3fxMLDkXmOY1/T8kaXujWFi0exbrqci4NirtRh0gdwt0XtuFgNyI4sPn3vCGmsUot?= =?utf-8?q?rIMAp7DCG/9ovNQB41C6oHoV9rxhm197VizhXJ8VvPhN6xDN9mpf2zwsvFBNRJXa/?= =?utf-8?q?zpBGE5xCx/ENmzNj3ksCP3iORlX/B5ntmrurymXbarLCFFN3H6NyYCHYgIbSDEiPk?= =?utf-8?q?seHH/fZykw1Oh7kbzN6rZWptrJNp7p+jp2Wks4KmM9btcDEa3SXQNTxf+8TCmElCo?= =?utf-8?q?k0h9yrsf4dJH898QNhFKy5d743EAG290z8LPPIt621rhSKehfuWER34EkI8gFLIVv?= =?utf-8?q?MvElFFUUeJI2kc2CQzlONDO4KuB5pl6SFjKUicN8SwvLiN9+tskuJ7QcrhMEpBX5l?= =?utf-8?q?zGJtA2/UbzsEv1JlB/sBEq+0j4uLDvpkCH3Rt5m7UoE6JLOc+IKEWYH6PBofufLox?= =?utf-8?q?LVbLUSPAMn8u/xw+BMZvfIfQaEouqtJoS6OccA37SeD0mR9cOtfKvpukjMr1o+xuI?= =?utf-8?q?oY7CtjpES5pR1CKS0kqd/Eirt4HIHpc7EIMLkR9r6AyL6nP7vUb/YBnmk2cvUJoaU?= =?utf-8?q?kV1ZNVI8xxqGw4O+QDJTkyHQ96hEtZfnRCrsvC54RcsMDGo6UmeR/2tytuAbQx4rB?= =?utf-8?q?l0p6N5IccKCA99bBGqNRFhy1uh7xEzDlVw/YDRCXQvGdIgss6Nb4O+of18wShZPnv?= =?utf-8?q?HTYx+goubvU+6FCKxg+YM1saW1a1HL55rdhQhzyoz2pCYti7FyLCAVG4mtfTivk2e?= =?utf-8?q?K2NIWdzSBnGQFr5kRnrTnDiagKdGSicxPJWcm99xF3I3wulrcxDMnZx2HvAuE8RFR?= =?utf-8?q?y+95Bd1deRHdXQz3d4cW5pNiEDedV4S4+swJDbI7c19nHYvwVEyBETr5R5U8/t1KX?= =?utf-8?q?zck65qqmNxQw2wYP7SEbUhcZg5mB5Lb4IhvoJ1q13PklZdoNEFNADkIZgjxSSTOIB?= =?utf-8?q?FKfql2eAqguIGBGVPuhKi5vRNCSXCVP8BU1U3706bAQ4hsLrbFWns3UWC9Zkj73Vq?= =?utf-8?q?IGcTnoFyWt8y1MRmF3zK6eBFKzH4BCHWa0tnUMhBqzZKZAMKjs/EpPDcDG2MxJUs1?= =?utf-8?q?QbvPAfgN2nVw7+ljyrWpWRJSQURnM3hY+BQQgVSyk5fd9rrU8wKl0laaUw6Agvvm4?= =?utf-8?q?kXCjXj9Rh1R/ZEnlsw/DPo8/DDe70M0IzvEs/8VDN+KKzveAlWwrCdDW44wEAfVWV?= =?utf-8?q?yyrHyet3vif4K8reN7Lp0XMFMMtv/i3milnbt4nJ1zN/P9JS4ve/LzvZTnWTF3wZl?= =?utf-8?q?8Ow5peXgeTTlghVCVsVXTA3e+auYH/WPtg3wf7fQz7YYcDk2KJBjAFbxzDFj6SbtI?= =?utf-8?q?EUrz7CDBmir2xrGsdq9Msza0F/FZ36T0tksN9nW+DRZ+8dtZmSchRAQSa7fohk/Xa?= =?utf-8?q?RIIwK0AYooSYSYZtPAM8oxjYff6o29wGGuE92R848TVk1+5Q2cG5JrGSqzmjoGGiY?= =?utf-8?q?Y00Fv5i+oEol?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: c52d7cae-6465-49c7-30b3-08dc396946a9 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Feb 2024 20:59:10.0754 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: nAzqPHeLTZZI4GUC29fOOFxNBRhoEnGcV+N4Iww2+QXwgvWC036NPTzufQJ3bWSE7+n8CKSKVmNZ8dV8MnOPZQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR04MB8750 From: Joy Zou Add support for the i.MX8ULP platform to the eDMA driver. Introduce the use of the correct FSL_EDMA_DRV_HAS_CHCLK flag to handle per-channel clock configurations. Signed-off-by: Joy Zou Reviewed-by: Frank Li --- drivers/dma/fsl-edma-common.c | 6 ++++++ drivers/dma/fsl-edma-common.h | 1 + drivers/dma/fsl-edma-main.c | 22 ++++++++++++++++++++++ 3 files changed, 29 insertions(+) diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index b18faa7cfedb9..f9144b0154396 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -3,6 +3,7 @@ // Copyright (c) 2013-2014 Freescale Semiconductor, Inc // Copyright (c) 2017 Sysam, Angelo Dureghello +#include #include #include #include @@ -810,6 +811,9 @@ int fsl_edma_alloc_chan_resources(struct dma_chan *chan) { struct fsl_edma_chan *fsl_chan = to_fsl_edma_chan(chan); + if (fsl_edma_drvflags(fsl_chan) & FSL_EDMA_DRV_HAS_CHCLK) + clk_prepare_enable(fsl_chan->clk); + fsl_chan->tcd_pool = dma_pool_create("tcd_pool", chan->device->dev, fsl_edma_drvflags(fsl_chan) & FSL_EDMA_DRV_TCD64 ? sizeof(struct fsl_edma_hw_tcd64) : sizeof(struct fsl_edma_hw_tcd), @@ -838,6 +842,8 @@ void fsl_edma_free_chan_resources(struct dma_chan *chan) fsl_chan->tcd_pool = NULL; fsl_chan->is_sw = false; fsl_chan->srcid = 0; + if (fsl_edma_drvflags(fsl_chan) & FSL_EDMA_DRV_HAS_CHCLK) + clk_disable_unprepare(fsl_chan->clk); } void fsl_edma_cleanup_vchan(struct dma_device *dmadev) diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index 532f647e540e7..01157912bfd5f 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -192,6 +192,7 @@ struct fsl_edma_desc { #define FSL_EDMA_DRV_WRAP_IO BIT(3) #define FSL_EDMA_DRV_EDMA64 BIT(4) #define FSL_EDMA_DRV_HAS_PD BIT(5) +#define FSL_EDMA_DRV_HAS_CHCLK BIT(6) #define FSL_EDMA_DRV_HAS_CHMUX BIT(7) /* imx8 QM audio edma remote local swapped */ #define FSL_EDMA_DRV_QUIRK_SWAPPED BIT(8) diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index 41c71c360ff1f..0837535aa7548 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -356,6 +356,16 @@ static struct fsl_edma_drvdata imx8qm_audio_data = { .setup_irq = fsl_edma3_irq_init, }; +static struct fsl_edma_drvdata imx8ulp_data = { + .flags = FSL_EDMA_DRV_HAS_CHMUX | FSL_EDMA_DRV_HAS_CHCLK | FSL_EDMA_DRV_HAS_DMACLK | + FSL_EDMA_DRV_EDMA3, + .chreg_space_sz = 0x10000, + .chreg_off = 0x10000, + .mux_off = 0x10000 + offsetof(struct fsl_edma3_ch_reg, ch_mux), + .mux_skip = 0x10000, + .setup_irq = fsl_edma3_irq_init, +}; + static struct fsl_edma_drvdata imx93_data3 = { .flags = FSL_EDMA_DRV_HAS_DMACLK | FSL_EDMA_DRV_EDMA3, .chreg_space_sz = 0x10000, @@ -388,6 +398,7 @@ static const struct of_device_id fsl_edma_dt_ids[] = { { .compatible = "fsl,imx7ulp-edma", .data = &imx7ulp_data}, { .compatible = "fsl,imx8qm-edma", .data = &imx8qm_data}, { .compatible = "fsl,imx8qm-adma", .data = &imx8qm_audio_data}, + { .compatible = "fsl,imx8ulp-edma", .data = &imx8ulp_data}, { .compatible = "fsl,imx93-edma3", .data = &imx93_data3}, { .compatible = "fsl,imx93-edma4", .data = &imx93_data4}, { .compatible = "fsl,imx95-edma5", .data = &imx95_data5}, @@ -441,6 +452,7 @@ static int fsl_edma_probe(struct platform_device *pdev) struct fsl_edma_engine *fsl_edma; const struct fsl_edma_drvdata *drvdata = NULL; u32 chan_mask[2] = {0, 0}; + char clk_name[36]; struct edma_regs *regs; int chans; int ret, i; @@ -550,11 +562,21 @@ static int fsl_edma_probe(struct platform_device *pdev) + i * drvdata->chreg_space_sz + drvdata->chreg_off + len; fsl_chan->mux_addr = fsl_edma->membase + drvdata->mux_off + i * drvdata->mux_skip; + if (drvdata->flags & FSL_EDMA_DRV_HAS_CHCLK) { + snprintf(clk_name, sizeof(clk_name), "CH%02d-clk", i); + fsl_chan->clk = devm_clk_get_enabled(&pdev->dev, + (const char *)clk_name); + + if (IS_ERR(fsl_chan->clk)) + return PTR_ERR(fsl_chan->clk); + } fsl_chan->pdev = pdev; vchan_init(&fsl_chan->vchan, &fsl_edma->dma_dev); edma_write_tcdreg(fsl_chan, cpu_to_le32(0), csr); fsl_edma_chan_mux(fsl_chan, 0, false); + if (fsl_chan->edma->drvdata->flags & FSL_EDMA_DRV_HAS_CHCLK) + clk_disable_unprepare(fsl_chan->clk); } ret = fsl_edma->drvdata->setup_irq(pdev, fsl_edma);