From patchwork Tue Mar 5 10:59:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 13582101 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A4DD554BF0 for ; Tue, 5 Mar 2024 10:59:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709636373; cv=none; b=Yb8CmH+mbZLUI3sReebV0qdJDnFJOkeWiomT43uaeq6ZpzHef/RwTMcKv6KcCBjkQutjKCChHmHnzxcGwURsW1d3pi6kyEOOpIxTo2QyNwzttV8YjNNq2Mm/jf77TYAh2HZRfBeTJNBUbAEuum9mskeO9xSPGHoBxMnLIUNAZx8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709636373; c=relaxed/simple; bh=OD30lLHeKGBDF6WbOHr14tRyJkUlU4D9brApLJu1YX8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=m5BIleYYfz/r0SLHsohMkIk6uoDK3nDoDkdDs3ZZ7JOSYnWLWqglSsQlAm5yNUhXNpdbzt5YXBXCAFBWJ8yTu745+ceSndaJmihdISWLs2H7sHm2/uBM1EA4BZC1TYA02QBfDVji87N584nasvd4g9Xxn+agg0CxE2FFPDscyhI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=cCVOFMu/; arc=none smtp.client-ip=170.10.129.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="cCVOFMu/" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1709636370; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=z3ynkI2Ws+pdXgHsDyV32JSDtvTrktbfJxItskjUTG8=; b=cCVOFMu/yJFFj5EhzC9QP+JoOzWyU1KOD4mG5eDd984Yh9MnafHqk/6XNdXnyvFIEqUPmC zLo9AI1YHsm4gNgXkyM9WzYIbepVHUSARCcm2xyvknHQHQAv1u1VdgUPqJA93rAyqbUcKS pS+bO8BeYTlTFItB03wTkf9phK7l6Fo= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-553-rwWLO4xBMSaPCChHvYnwnA-1; Tue, 05 Mar 2024 05:59:28 -0500 X-MC-Unique: rwWLO4xBMSaPCChHvYnwnA-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 05715800271; Tue, 5 Mar 2024 10:59:28 +0000 (UTC) Received: from localhost.localdomain (unknown [10.39.194.213]) by smtp.corp.redhat.com (Postfix) with ESMTP id 35AFE1C06541; Tue, 5 Mar 2024 10:59:26 +0000 (UTC) From: Hans de Goede To: Johannes Stezenbach , Takashi Iwai , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Michael Turquette , Stephen Boyd Cc: Hans de Goede , platform-driver-x86@vger.kernel.org, x86@kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 1/5] clk: x86: Move clk-pmc-atom register defines to include/linux/platform_data/x86/pmc_atom.h Date: Tue, 5 Mar 2024 11:59:11 +0100 Message-ID: <20240305105915.76242-2-hdegoede@redhat.com> In-Reply-To: <20240305105915.76242-1-hdegoede@redhat.com> References: <20240305105915.76242-1-hdegoede@redhat.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.7 Move the register defines for the Atom (Bay Trail, Cherry Trail) PMC clocks to include/linux/platform_data/x86/pmc_atom.h. This is a preparation patch to extend the S0i3 readiness checks in drivers/platform/x86/pmc_atom.c with checking that the PMC clocks are off on suspend entry. Note these are added to include/linux/platform_data/x86/pmc_atom.h rather then to include/linux/platform_data/x86/clk-pmc-atom.h because the former already has all the other Atom PMC register defines. Reviewed-by: Ilpo Järvinen Acked-by: Stephen Boyd Signed-off-by: Hans de Goede --- Changes in v2: - This is a new patch in v2 of this series --- drivers/clk/x86/clk-pmc-atom.c | 13 +------------ include/linux/platform_data/x86/pmc_atom.h | 13 +++++++++++++ 2 files changed, 14 insertions(+), 12 deletions(-) diff --git a/drivers/clk/x86/clk-pmc-atom.c b/drivers/clk/x86/clk-pmc-atom.c index 2974dd0ec6f4..5ec9255e33fa 100644 --- a/drivers/clk/x86/clk-pmc-atom.c +++ b/drivers/clk/x86/clk-pmc-atom.c @@ -11,23 +11,12 @@ #include #include #include +#include #include #include #define PLT_CLK_NAME_BASE "pmc_plt_clk" -#define PMC_CLK_CTL_OFFSET 0x60 -#define PMC_CLK_CTL_SIZE 4 -#define PMC_CLK_NUM 6 -#define PMC_CLK_CTL_GATED_ON_D3 0x0 -#define PMC_CLK_CTL_FORCE_ON 0x1 -#define PMC_CLK_CTL_FORCE_OFF 0x2 -#define PMC_CLK_CTL_RESERVED 0x3 -#define PMC_MASK_CLK_CTL GENMASK(1, 0) -#define PMC_MASK_CLK_FREQ BIT(2) -#define PMC_CLK_FREQ_XTAL (0 << 2) /* 25 MHz */ -#define PMC_CLK_FREQ_PLL (1 << 2) /* 19.2 MHz */ - struct clk_plt_fixed { struct clk_hw *clk; struct clk_lookup *lookup; diff --git a/include/linux/platform_data/x86/pmc_atom.h b/include/linux/platform_data/x86/pmc_atom.h index b8a701c77fd0..557622ef0390 100644 --- a/include/linux/platform_data/x86/pmc_atom.h +++ b/include/linux/platform_data/x86/pmc_atom.h @@ -43,6 +43,19 @@ BIT_ORED_DEDICATED_IRQ_GPSC | \ BIT_SHARED_IRQ_GPSS) +/* External clk generator settings */ +#define PMC_CLK_CTL_OFFSET 0x60 +#define PMC_CLK_CTL_SIZE 4 +#define PMC_CLK_NUM 6 +#define PMC_CLK_CTL_GATED_ON_D3 0x0 +#define PMC_CLK_CTL_FORCE_ON 0x1 +#define PMC_CLK_CTL_FORCE_OFF 0x2 +#define PMC_CLK_CTL_RESERVED 0x3 +#define PMC_MASK_CLK_CTL GENMASK(1, 0) +#define PMC_MASK_CLK_FREQ BIT(2) +#define PMC_CLK_FREQ_XTAL (0 << 2) /* 25 MHz */ +#define PMC_CLK_FREQ_PLL (1 << 2) /* 19.2 MHz */ + /* The timers accumulate time spent in sleep state */ #define PMC_S0IR_TMR 0x80 #define PMC_S0I1_TMR 0x84 From patchwork Tue Mar 5 10:59:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 13582103 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 942D15CDF4 for ; Tue, 5 Mar 2024 10:59:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.133.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709636379; cv=none; b=NbWR4plSqjyENdUkWdEzB9f909ZbCUnwWLjeVj03iXU/rX1WNgKrMNvsWxQbOGE37oIAlnJzqIB3hehEyikgpfUUKgZbg+Rk8HaqWZ9G9u8MDclxdrDT/vfkmboLqTB/YJ4lrVkT3soAuAYWQhvRqR31a09gwh3UtyoNrWO40AQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709636379; c=relaxed/simple; bh=VlgopJb3HB9gqI9ngX3wzrzF9oM1w3fcSYK4kzltIPE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XXpNDk2AqfDHWAUMbLrX/fBNucsmqYMSc9Bq3b7H3EGge4MXG9EBubOnavfgL6AbE5j5WKqalnDSg98DjLjJ+AQ9af6Mk+PgHeXn/y2YS2l6Msw5pXzqCEaTJC2sZOxXFbpS31DiLZDRT7cslkSK1jY7eTnvRtG1Q6JWZr/KV44= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=c200yyKI; arc=none smtp.client-ip=170.10.133.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="c200yyKI" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1709636376; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=u032h4X6Qt+++To0O90WQzL/V0VDVe/ibgESlXZOwkM=; b=c200yyKI0BwTfCvBu7OQO9yKK++bRC56DSkHLQetR/uP7n8u1yjl7GThRuLi32KYHhFpn/ QeUAO2sO7UK6bH+YwINCoUwR3frZCqAEfqaspkzmvjlIHzrr+2WM3XIH7EEBrL6Yb1veSk nDED1XfvU6eJ92Ymary8CXhITXp30dM= Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-330-JSlummHUNsq8nqZh2C0AVw-1; Tue, 05 Mar 2024 05:59:31 -0500 X-MC-Unique: JSlummHUNsq8nqZh2C0AVw-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 070DE1C02C97; Tue, 5 Mar 2024 10:59:30 +0000 (UTC) Received: from localhost.localdomain (unknown [10.39.194.213]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3600D1C05E1C; Tue, 5 Mar 2024 10:59:28 +0000 (UTC) From: Hans de Goede To: Johannes Stezenbach , Takashi Iwai , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Michael Turquette , Stephen Boyd Cc: Hans de Goede , platform-driver-x86@vger.kernel.org, x86@kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 2/5] platform/x86: pmc_atom: Annotate d3_sts register bit defines Date: Tue, 5 Mar 2024 11:59:12 +0100 Message-ID: <20240305105915.76242-3-hdegoede@redhat.com> In-Reply-To: <20240305105915.76242-1-hdegoede@redhat.com> References: <20240305105915.76242-1-hdegoede@redhat.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.7 The include/linux/platform_data/x86/pmc_atom.h d3_sts register bit defines are named after how these bits are used on Bay Trail devices. On Cherry Trail (CHT) devices some of these bits have a different meaning according to the datasheet. At a comment to the defines for bits which have a different meaning on Cherry Trail devices. Signed-off-by: Hans de Goede --- include/linux/platform_data/x86/pmc_atom.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/include/linux/platform_data/x86/pmc_atom.h b/include/linux/platform_data/x86/pmc_atom.h index 557622ef0390..161e4bc1c9ee 100644 --- a/include/linux/platform_data/x86/pmc_atom.h +++ b/include/linux/platform_data/x86/pmc_atom.h @@ -117,14 +117,14 @@ #define BIT_SCC_SDIO BIT(9) #define BIT_SCC_SDCARD BIT(10) #define BIT_SCC_MIPI BIT(11) -#define BIT_HDA BIT(12) +#define BIT_HDA BIT(12) /* CHT datasheet: reserved */ #define BIT_LPE BIT(13) #define BIT_OTG BIT(14) -#define BIT_USH BIT(15) -#define BIT_GBE BIT(16) -#define BIT_SATA BIT(17) -#define BIT_USB_EHCI BIT(18) -#define BIT_SEC BIT(19) +#define BIT_USH BIT(15) /* CHT datasheet: reserved */ +#define BIT_GBE BIT(16) /* CHT datasheet: reserved */ +#define BIT_SATA BIT(17) /* CHT datasheet: reserved */ +#define BIT_USB_EHCI BIT(18) /* CHT datasheet: XHCI! */ +#define BIT_SEC BIT(19) /* BYT datasheet: reserved */ #define BIT_PCIE_PORT0 BIT(20) #define BIT_PCIE_PORT1 BIT(21) #define BIT_PCIE_PORT2 BIT(22) From patchwork Tue Mar 5 10:59:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 13582102 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2BD343EA90 for ; Tue, 5 Mar 2024 10:59:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709636378; cv=none; b=ZVxBPlJxxkOe0k/AvhrVvLzEDjNMSU7UO9XOb3CbNSidMQIEDj2kYl+JoYFRr4TQaQ++d8lxicCI8PlRqzrVl/B9BwTy2HbTrHckND0VxZlAjJsbOTS4fvMlQJHIUu8Fx1Z/CwNhXRyvv3NVYFYGn5OcmCTlppH3ct463UCiLxE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709636378; c=relaxed/simple; bh=Msucmb283GaM0uXP3uL/tVX0XEfZXbJAS8b35h4pZNg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=GrboNtW9XA2ckPJwO3K4lpp7pvul6X5MJrO6dDkZo7dd62a29cYUp7ATQqGgZ0gxAlHvXewcvmsdozJyB/mjFRDyHhfqYel9o4ifGsCBcJOgsNWqwDI1tY1dkAypcRs/zb0wkPadhfu+qvBZt9+4E6nyMTClYo5X6LQLCBa7uf4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=a5Z9sAG1; arc=none smtp.client-ip=170.10.129.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="a5Z9sAG1" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1709636376; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hrqJuyAZVX0huvYDsH9YSJg+mvpk9jZbjNwhRRtZlBA=; b=a5Z9sAG1uqNYlVHmf5VaVvAfCpgzuIXcgxRgiiIiG3JNs7XDtkV5s+ioUwAIhcS5z+OAIa 0rLGpu0eRVqF75awarhCu+uMwsO2/yILrGEtWCJWJAUK1m/EAfzHh+3koomChMhkXvOp33 K1U2F3NY1GbtTmjppZgBThEts6ZgHVA= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-607-fQQ1366sOHiQPftdjrn5aQ-1; Tue, 05 Mar 2024 05:59:32 -0500 X-MC-Unique: fQQ1366sOHiQPftdjrn5aQ-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 09F96800265; Tue, 5 Mar 2024 10:59:32 +0000 (UTC) Received: from localhost.localdomain (unknown [10.39.194.213]) by smtp.corp.redhat.com (Postfix) with ESMTP id 37D871C060DC; Tue, 5 Mar 2024 10:59:30 +0000 (UTC) From: Hans de Goede To: Johannes Stezenbach , Takashi Iwai , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Michael Turquette , Stephen Boyd Cc: Hans de Goede , platform-driver-x86@vger.kernel.org, x86@kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 3/5] platform/x86: pmc_atom: Check state of PMC managed devices on s2idle Date: Tue, 5 Mar 2024 11:59:13 +0100 Message-ID: <20240305105915.76242-4-hdegoede@redhat.com> In-Reply-To: <20240305105915.76242-1-hdegoede@redhat.com> References: <20240305105915.76242-1-hdegoede@redhat.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.7 From: Johannes Stezenbach For the Bay Trail or Cherry Trail SoC to enter the S0i3 power-level at s2idle suspend requires most of the hw-blocks / devices in the SoC to be in D3 when entering s2idle suspend. If some devices are not in D3 then the SoC will stay in a higher power state, consuming much more power from the battery then in S0i3. Use the new acpi_s2idle_dev_ops and acpi_register_lps0_dev() functionality to register a new s2idle check function which checks that all hardware blocks in the South complex (controlled by the PMC) are in a state that allows the SoC to enter S0i3 and prints an error message for any device in D0. Some blocks are not used on lower-featured versions of the SoC and these blocks will always report being in D0 on SoCs were they are not used. A false-positive mask is used to identify these blocks and for blocks in this mask the error is turned into a debug message to avoid false-positive error messages. Note the pmc_atom code is enabled by CONFIG_X86_INTEL_LPSS which already depends on ACPI. Signed-off-by: Johannes Stezenbach Signed-off-by: Takashi Iwai Reviewed-by: Ilpo Järvinen [hdegoede: Use acpi_s2idle_dev_ops, ignore fused off blocks, PMIC I2C] Signed-off-by: Hans de Goede --- Changes in v4: - Add pmc_s2idle_check_register() helper which is a stub when CONFIG_SUSPEND is not set to avoid needing more then 1 ifdef Changes in v3: - Reword commit message - Drop confusing /* Low Part */ and /* High Part */ comments Changes in v2: - Drop duplicated "pmc_atom: " prefix from pr_err() / pr_dbg() messages --- drivers/platform/x86/pmc_atom.c | 68 +++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/drivers/platform/x86/pmc_atom.c b/drivers/platform/x86/pmc_atom.c index 93a6414c6611..7d391bd36eae 100644 --- a/drivers/platform/x86/pmc_atom.c +++ b/drivers/platform/x86/pmc_atom.c @@ -6,6 +6,7 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +#include #include #include #include @@ -17,6 +18,7 @@ #include #include #include +#include struct pmc_bit_map { const char *name; @@ -448,6 +450,71 @@ static int pmc_setup_clks(struct pci_dev *pdev, void __iomem *pmc_regmap, return 0; } +#ifdef CONFIG_SUSPEND +static void pmc_dev_state_check(u32 sts, const struct pmc_bit_map *sts_map, + u32 fd, const struct pmc_bit_map *fd_map, + u32 sts_possible_false_pos) +{ + int index; + + for (index = 0; sts_map[index].name; index++) { + if (!(fd_map[index].bit_mask & fd) && + !(sts_map[index].bit_mask & sts)) { + if (sts_map[index].bit_mask & sts_possible_false_pos) + pm_pr_dbg("%s is in D0 prior to s2idle\n", + sts_map[index].name); + else + pr_err("%s is in D0 prior to s2idle\n", + sts_map[index].name); + } + } +} + +static void pmc_s2idle_check(void) +{ + struct pmc_dev *pmc = &pmc_device; + const struct pmc_reg_map *m = pmc->map; + u32 func_dis, func_dis_2; + u32 d3_sts_0, d3_sts_1; + u32 false_pos_sts_0, false_pos_sts_1; + + func_dis = pmc_reg_read(pmc, PMC_FUNC_DIS); + func_dis_2 = pmc_reg_read(pmc, PMC_FUNC_DIS_2); + d3_sts_0 = pmc_reg_read(pmc, PMC_D3_STS_0); + d3_sts_1 = pmc_reg_read(pmc, PMC_D3_STS_1); + + /* + * Some blocks are not used on lower-featured versions of the SoC and + * always report D0, add these to false_pos mask to log at debug level. + */ + if (m->d3_sts_1 == byt_d3_sts_1_map) { + /* Bay Trail */ + false_pos_sts_0 = BIT_GBE | BIT_SATA | BIT_PCIE_PORT0 | + BIT_PCIE_PORT1 | BIT_PCIE_PORT2 | BIT_PCIE_PORT3 | + BIT_LPSS2_F5_I2C5; + false_pos_sts_1 = BIT_SMB | BIT_USH_SS_PHY | BIT_DFX; + } else { + /* Cherry Trail */ + false_pos_sts_0 = BIT_GBE | BIT_SATA | BIT_LPSS2_F7_I2C7; + false_pos_sts_1 = BIT_SMB | BIT_STS_ISH; + } + + pmc_dev_state_check(d3_sts_0, m->d3_sts_0, func_dis, m->func_dis, false_pos_sts_0); + pmc_dev_state_check(d3_sts_1, m->d3_sts_1, func_dis_2, m->func_dis_2, false_pos_sts_1); +} + +static struct acpi_s2idle_dev_ops pmc_s2idle_ops = { + .check = pmc_s2idle_check, +}; + +static void pmc_s2idle_check_register(void) +{ + acpi_register_lps0_dev(&pmc_s2idle_ops); +} +#else +static void pmc_s2idle_check_register(void) {} +#endif + static int pmc_setup_dev(struct pci_dev *pdev, const struct pci_device_id *ent) { struct pmc_dev *pmc = &pmc_device; @@ -485,6 +552,7 @@ static int pmc_setup_dev(struct pci_dev *pdev, const struct pci_device_id *ent) dev_warn(&pdev->dev, "platform clocks register failed: %d\n", ret); + pmc_s2idle_check_register(); pmc->init = true; return ret; } From patchwork Tue Mar 5 10:59:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 13582104 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 386295D46C for ; Tue, 5 Mar 2024 10:59:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709636380; cv=none; b=l7EsrPvcSKWTOkhnxdaBslb5cqqGNqQEz95E6HZUujKR15ilNN1mtO3kgEBOCwqNuC5vUbPfCiJtXvpWEJ/YDh7/c4oU80BH8ClCPQE6AccCi76R5R9F1UdUoaYW6olsbS/iTku4/XJlHZXX8Pn0A5qQpX1SpzZcZnyNXDMf7Mo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709636380; c=relaxed/simple; bh=FhOrtUqzoaa2flD/fMhpT9C5hfyerUYteedSmYsk+LM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=hb8nJbrXicdsDAY8Ocwge+2adPOG4CEPpoio+wR/El9QnMbwYz27qcCD28oMow/JDVnIamPs/e/WdMAQ2YixWNB0giiP6AKyQ7i7fotszaoshgrwS+WVJ8JU23RKobJMIflh85y/gbCzpQNFPNIp4s5z0s+jkvKqNJR37fGN/NM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=Zydg7ySz; arc=none smtp.client-ip=170.10.129.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="Zydg7ySz" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1709636378; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WzcndcC1m2TcnVpv+r6Ek8gTDs5NG8qUhZQ62wTQPcg=; b=Zydg7ySzZANID3/vsD1/53hDuVcyqCvT2Lc43SeSTO8YpMnSIkQDOJY8xKhRVQKft7NUT8 w60lvXX+Is60LjtKi/m0SvXotVsr1AhWau36aSnLTLxLOT7YxPUR5SAFtBtLJl2I9w+BUW uS3JY58/jAKGzibj9Vbtxaw16PVSZPE= Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-13-3IzbSbBLPA6z53j-SjyZqg-1; Tue, 05 Mar 2024 05:59:34 -0500 X-MC-Unique: 3IzbSbBLPA6z53j-SjyZqg-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 0BF0429AA3B8; Tue, 5 Mar 2024 10:59:34 +0000 (UTC) Received: from localhost.localdomain (unknown [10.39.194.213]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3B1B71C05E1C; Tue, 5 Mar 2024 10:59:32 +0000 (UTC) From: Hans de Goede To: Johannes Stezenbach , Takashi Iwai , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Michael Turquette , Stephen Boyd Cc: Hans de Goede , platform-driver-x86@vger.kernel.org, x86@kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 4/5] platform/x86: pmc_atom: Check state of PMC clocks on s2idle Date: Tue, 5 Mar 2024 11:59:14 +0100 Message-ID: <20240305105915.76242-5-hdegoede@redhat.com> In-Reply-To: <20240305105915.76242-1-hdegoede@redhat.com> References: <20240305105915.76242-1-hdegoede@redhat.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.7 Extend the s2idle check with checking that none of the PMC clocks is in the forced-on state. If one of the clocks is in forced on state then S0i3 cannot be reached. Reviewed-by: Ilpo Järvinen Signed-off-by: Hans de Goede --- Changes in v3: - Improve comment for clocks check Changes in v2: - Drop the PMC_CLK_* defines these are defined in include/linux/platform_data/x86/pmc_atom.h now - Drop duplicated "pmc_atom: " prefix from pr_err() message --- drivers/platform/x86/pmc_atom.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/platform/x86/pmc_atom.c b/drivers/platform/x86/pmc_atom.c index 7d391bd36eae..0aa7076bc9cc 100644 --- a/drivers/platform/x86/pmc_atom.c +++ b/drivers/platform/x86/pmc_atom.c @@ -477,6 +477,7 @@ static void pmc_s2idle_check(void) u32 func_dis, func_dis_2; u32 d3_sts_0, d3_sts_1; u32 false_pos_sts_0, false_pos_sts_1; + int i; func_dis = pmc_reg_read(pmc, PMC_FUNC_DIS); func_dis_2 = pmc_reg_read(pmc, PMC_FUNC_DIS_2); @@ -501,6 +502,16 @@ static void pmc_s2idle_check(void) pmc_dev_state_check(d3_sts_0, m->d3_sts_0, func_dis, m->func_dis, false_pos_sts_0); pmc_dev_state_check(d3_sts_1, m->d3_sts_1, func_dis_2, m->func_dis_2, false_pos_sts_1); + + /* Forced-on PMC clocks prevent S0i3 */ + for (i = 0; i < PMC_CLK_NUM; i++) { + u32 ctl = pmc_reg_read(pmc, PMC_CLK_CTL_OFFSET + 4 * i); + + if ((ctl & PMC_MASK_CLK_CTL) != PMC_CLK_CTL_FORCE_ON) + continue; + + pr_err("clock %d is ON prior to freeze (ctl 0x%08x)\n", i, ctl); + } } static struct acpi_s2idle_dev_ops pmc_s2idle_ops = { From patchwork Tue Mar 5 10:59:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 13582105 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 18BAA5D46C for ; Tue, 5 Mar 2024 10:59:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.133.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709636382; cv=none; b=OOLP32hCcoHaUFs2drgNpQMyZ9k4VXXxqiBrfFoLjq2yId841pA87Uml0ZEZvkadE327dIUI2eMpemQENw4QXSpO12U5HTHpqr0Hk07FCrPwkEpqgE5pFPDAT90bG5Ktlns2/1BNDrsSc4MELLJZuBlEXRPZA9B/YihmX0lxJ0s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709636382; c=relaxed/simple; bh=c6MqmODdMYlBmjDOlDN8R/k8inYLZPi4Xy3tALiXFbE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=fhnd4EoBC/fndJkzUxFz2rQSnyJXTlyBTxzj7ri0vJ3DBdzzEf9JreScXJYeBugR0UHeJzPHX3AZXe2811a/v9VNCBHrfXVxGut/IR0h1R4d/kB1927yotchfZqlf35I6EKSEusPFZ3Vpc3xFqCLjD66/GUVnphCNTKFoHZBWv0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=SlpJ/pna; arc=none smtp.client-ip=170.10.133.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="SlpJ/pna" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1709636380; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+Nn7QLWui+E10V2dPVlHH/YfClJTC485Sk93yFLmpHY=; b=SlpJ/pna7BkB5u/9MCK3NYlqZKU2kVq+vH4BeRGhot7kXlKcO0aaigTlyYXGDAMW7Y91kG mPC7aOLbjaDgM2mb1N8XnXWuWBrlBG7uFdzNDNl0mHuOlOR7y4zgTxR+R1XvzGjkhCpoiR MaCH1555hQoEOVgfLewJ5KZE5JrZw14= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-16-aRF07tVvPAafwZACZEdWzQ-1; Tue, 05 Mar 2024 05:59:36 -0500 X-MC-Unique: aRF07tVvPAafwZACZEdWzQ-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 10601800264; Tue, 5 Mar 2024 10:59:36 +0000 (UTC) Received: from localhost.localdomain (unknown [10.39.194.213]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3C4F11C060D6; Tue, 5 Mar 2024 10:59:34 +0000 (UTC) From: Hans de Goede To: Johannes Stezenbach , Takashi Iwai , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Michael Turquette , Stephen Boyd Cc: Hans de Goede , platform-driver-x86@vger.kernel.org, x86@kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 5/5] x86/platform/atom: Check state of Punit managed devices on s2idle Date: Tue, 5 Mar 2024 11:59:15 +0100 Message-ID: <20240305105915.76242-6-hdegoede@redhat.com> In-Reply-To: <20240305105915.76242-1-hdegoede@redhat.com> References: <20240305105915.76242-1-hdegoede@redhat.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.7 From: Johannes Stezenbach For the Bay Trail or Cherry Trail SoC to enter the S0i3 power-level at s2idle suspend requires most of the hw-blocks / devices in the SoC to be in D3 when entering s2idle suspend. If some devices are not in D3 then the SoC will stay in a higher power state, consuming much more power from the battery then in S0i3. Use the new acpi_s2idle_dev_ops and acpi_register_lps0_dev() functionality to register a new s2idle check function which checks that all hardware blocks in the North complex (controlled by Punit) are in a state that allows the SoC to enter S0i3 and prints an error message for any device in D0. Signed-off-by: Johannes Stezenbach Signed-off-by: Takashi Iwai Acked-by: Borislav Petkov (AMD) Reviewed-by: Ilpo Järvinen [hdegoede: Use acpi_s2idle_dev_ops] Signed-off-by: Hans de Goede --- Changes in v3: - Reword commit message - Add punit_s2idle_check_[un]register() helper functions --- arch/x86/platform/atom/punit_atom_debug.c | 54 ++++++++++++++++++++++- 1 file changed, 53 insertions(+), 1 deletion(-) diff --git a/arch/x86/platform/atom/punit_atom_debug.c b/arch/x86/platform/atom/punit_atom_debug.c index f8ed5f66cd20..6b9c6deca8ba 100644 --- a/arch/x86/platform/atom/punit_atom_debug.c +++ b/arch/x86/platform/atom/punit_atom_debug.c @@ -7,6 +7,9 @@ * Copyright (c) 2015, Intel Corporation. */ +#define pr_fmt(fmt) "punit_atom: " fmt + +#include #include #include #include @@ -117,6 +120,51 @@ static void punit_dbgfs_unregister(void) debugfs_remove_recursive(punit_dbg_file); } +#if defined(CONFIG_ACPI) && defined(CONFIG_SUSPEND) +static const struct punit_device *punit_dev; + +static void punit_s2idle_check(void) +{ + const struct punit_device *punit_devp; + u32 punit_pwr_status, dstate; + int status; + + for (punit_devp = punit_dev; punit_devp->name; punit_devp++) { + /* Skip MIO, it is on till the very last moment */ + if (punit_devp->reg == MIO_SS_PM) + continue; + + status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, + punit_devp->reg, &punit_pwr_status); + if (status) { + pr_err("%s read failed\n", punit_devp->name); + } else { + dstate = (punit_pwr_status >> punit_devp->sss_pos) & 3; + if (!dstate) + pr_err("%s is in D0 prior to s2idle\n", punit_devp->name); + } + } +} + +static struct acpi_s2idle_dev_ops punit_s2idle_ops = { + .check = punit_s2idle_check, +}; + +static void punit_s2idle_check_register(struct punit_device *punit_device) +{ + punit_dev = punit_device; + acpi_register_lps0_dev(&punit_s2idle_ops); +} + +static void punit_s2idle_check_unregister(void) +{ + acpi_unregister_lps0_dev(&punit_s2idle_ops); +} +#else +static void punit_s2idle_check_register(struct punit_device *punit_device) {} +static void punit_s2idle_check_unregister(void) {} +#endif + #define X86_MATCH(model, data) \ X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \ X86_FEATURE_MWAIT, data) @@ -131,19 +179,23 @@ MODULE_DEVICE_TABLE(x86cpu, intel_punit_cpu_ids); static int __init punit_atom_debug_init(void) { + struct punit_device *punit_device; const struct x86_cpu_id *id; id = x86_match_cpu(intel_punit_cpu_ids); if (!id) return -ENODEV; - punit_dbgfs_register((struct punit_device *)id->driver_data); + punit_device = (struct punit_device *)id->driver_data; + punit_dbgfs_register(punit_device); + punit_s2idle_check_register(punit_device); return 0; } static void __exit punit_atom_debug_exit(void) { + punit_s2idle_check_unregister(); punit_dbgfs_unregister(); }