From patchwork Wed Mar 6 14:03:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chukun Pan X-Patchwork-Id: 13584116 Received: from mail-m49198.qiye.163.com (mail-m49198.qiye.163.com [45.254.49.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7ED2B131747; Wed, 6 Mar 2024 14:03:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709733837; cv=none; b=jddOGTfCEQxhYJOoPrZ7uDjGPG3Lj0ENp/R1UNYeN24nIdefbIhctKe2FQhWGbflZeUP+90+QeuXjps2/ffFRK/Pk4dB8kcW27K9/HmluD5c35s2AJdvJDlUPfM++INssiSsJupw9/+uqNwUj3T7xjWwg9aUrO8sf/ebWRzp76E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709733837; c=relaxed/simple; bh=itKQ1vPsAiynFvJF5JgG4Ou1J1T37F0iPQXd/ermgi4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=jVWpkPhz9VH8hctmmizdQ6MvVsRtlJXgiRdZGqkBGetidgsSXHj7Sume4bDFaUkbTBloPrCaEkm6nOoBZSi/27lGFZ+yjZ3zTLhaT+psxIUY3Ik2OelSDEZsffv7MYtCmKuarBeYzanDOvWN87EqEyKwNlvFN2OEYnWv70MXYk4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn; spf=pass smtp.mailfrom=jmu.edu.cn; arc=none smtp.client-ip=45.254.49.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jmu.edu.cn Received: from amadeus-Vostro-3710.lan (unknown [IPV6:240e:3b3:2c01:4970:eaac:ef59:d8ae:5dc6]) by smtp.qiye.163.com (Hmail) with ESMTPA id 5CAA17E012D; Wed, 6 Mar 2024 22:03:36 +0800 (CST) From: Chukun Pan To: Bjorn Andersson Cc: Konrad Dybcio , Krzysztof Kozlowski , Conor Dooley , Rob Herring , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Chukun Pan Subject: [PATCH v2 1/4] arm64: dts: qcom: ipq6018: add 1.2GHz CPU Frequency Date: Wed, 6 Mar 2024 22:03:03 +0800 Message-Id: <20240306140306.876188-2-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240306140306.876188-1-amadeus@jmu.edu.cn> References: <20240306140306.876188-1-amadeus@jmu.edu.cn> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVlCT00aVkpMQx4aQx5PTBkYGVUTARMWGhIXJBQOD1 lXWRgSC1lBWUlPSx5BSBlIQUkYS0pBT0JMS0EeGhoYQR4dTkJBH0MaHkFOHxhNWVdZFhoPEhUdFF lBWU9LSFVKSktISkNVSktLVUtZBg++ X-HM-Tid: 0a8e1413a90403a2kunm5caa17e012d X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6OVE6Pio6VjMOSEMcNkgLCRc9 LjIwCj1VSlVKTEtCTEhIQ0pNQkJOVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUlP Sx5BSBlIQUkYS0pBT0JMS0EeGhoYQR4dTkJBH0MaHkFOHxhNWVdZCAFZQUlKTE03Bg++ Some IPQ6000 SoCs have CPU frequencies up to 1.2GHz, so add this frequency. Signed-off-by: Chukun Pan --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 4e29adea570a..7fdb119083a2 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -119,6 +119,13 @@ opp-1056000000 { clock-latency-ns = <200000>; }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x4>; + clock-latency-ns = <200000>; + }; + opp-1320000000 { opp-hz = /bits/ 64 <1320000000>; opp-microvolt = <862500>; From patchwork Wed Mar 6 14:03:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chukun Pan X-Patchwork-Id: 13584114 Received: from mail-m49198.qiye.163.com (mail-m49198.qiye.163.com [45.254.49.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 504B877F0C; Wed, 6 Mar 2024 14:03:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709733837; cv=none; b=XWysYR5goyZ+y6CJtj4eflss84oLwQnNYty5INfTpivP/IaUC9+tsftzFgTwjSWoE1JAYEAExr4EOK3cnMU+hOsNilRGoQEyaeGHzwUlcUpENrP13ecmC4/AgOH1KEXs16ftiiZLMHujeptnq5yGuqzfou6Qn7NgRoVSICOP96M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709733837; c=relaxed/simple; bh=anpftgLDkV1jZFzQS+l7zTrjOB97FhGgXOiOa+mrjaI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=L/9FJ6enJxvaqx0rCUSt4wgQmquOQsuH3nirkgBy0klTciy4imW03X90QJZvbmHqohlUC8MugCNjKNxfrpfDrFOBxQ+1xW3XqkzzlYbA55nuQWt/yKSAq1gCLQUsq0jDeoHbJ5BVLPqxCKJ19d4I6WyBtPRGlfcNEjE0Sni6x3Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn; spf=pass smtp.mailfrom=jmu.edu.cn; arc=none smtp.client-ip=45.254.49.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jmu.edu.cn Received: from amadeus-Vostro-3710.lan (unknown [IPV6:240e:3b3:2c01:4970:eaac:ef59:d8ae:5dc6]) by smtp.qiye.163.com (Hmail) with ESMTPA id 0B7DE7E0102; Wed, 6 Mar 2024 22:03:37 +0800 (CST) From: Chukun Pan To: Bjorn Andersson Cc: Konrad Dybcio , Krzysztof Kozlowski , Conor Dooley , Rob Herring , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Chukun Pan Subject: [PATCH v2 2/4] arm64: dts: qcom: ipq6018: add 1.5GHz CPU Frequency Date: Wed, 6 Mar 2024 22:03:04 +0800 Message-Id: <20240306140306.876188-3-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240306140306.876188-1-amadeus@jmu.edu.cn> References: <20240306140306.876188-1-amadeus@jmu.edu.cn> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVlCQh9NVktISkhOSE5DGU9ITlUTARMWGhIXJBQOD1 lXWRgSC1lBWUlPSx5BSBlIQUkYS0pBT0JMS0EeGhoYQR4dTkJBH0MaHkFOHxhNWVdZFhoPEhUdFF lBWU9LSFVKTEpPTENVSktLVUpCS0tZBg++ X-HM-Tid: 0a8e1413ab9e03a2kunm0b7de7e0102 X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6Myo6Hjo6KTMSVkMRNk4oCQ8D LD4aCQJVSlVKTEtCTEhIQ0pMTkpMVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUlP Sx5BSBlIQUkYS0pBT0JMS0EeGhoYQR4dTkJBH0MaHkFOHxhNWVdZCAFZQUlJS083Bg++ The IPQ6005 and some IPQ6000 SoCs (with PMIC) have CPU frequencies up to 1.5GHz, so add this frequency. Signed-off-by: Chukun Pan Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 7fdb119083a2..064b5706a289 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -140,6 +140,13 @@ opp-1440000000 { clock-latency-ns = <200000>; }; + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <937500>; + opp-supported-hw = <0x2>; + clock-latency-ns = <200000>; + }; + opp-1608000000 { opp-hz = /bits/ 64 <1608000000>; opp-microvolt = <987500>; From patchwork Wed Mar 6 14:03:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chukun Pan X-Patchwork-Id: 13584117 Received: from mail-m49198.qiye.163.com (mail-m49198.qiye.163.com [45.254.49.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 50501131744; Wed, 6 Mar 2024 14:03:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709733838; cv=none; b=CvKm+57hx+wR4JTfkWAYsW8wZu3MxgP/2rQF+QWVYBlzeBrd9h9EKwq5CBiG4PtmSa5XLxqN/sIFOfcctOnDpU1dn38be7uNr/gLzi6O0Ubdsr2VOiOJAdW82SdmvjcMXR+GqzYi40G2R1seOvOe+SSq5bHNdE8wOBbayw86bPg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709733838; c=relaxed/simple; bh=xKQOj2T9nY6SOFD0j6UREJDyWRK8UkNbWFDbeMnD2TU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=op/PODs3kILYG7cLpje4UiG40ugehxs6MB4aEy53vXJiFPN58bn/4ZfcKqPiHXonYRDM4XW61buZD5udrJsVHXQNS8D5in5uyJ7e9J1+eVSRwJG36ooUWYcDOKD77fNnJlNulkuCRRLk/8MyyhDOyeLN+rzvxh5ljypkYOq4AYM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn; spf=pass smtp.mailfrom=jmu.edu.cn; arc=none smtp.client-ip=45.254.49.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jmu.edu.cn Received: from amadeus-Vostro-3710.lan (unknown [IPV6:240e:3b3:2c01:4970:eaac:ef59:d8ae:5dc6]) by smtp.qiye.163.com (Hmail) with ESMTPA id 8AF727E0130; Wed, 6 Mar 2024 22:03:37 +0800 (CST) From: Chukun Pan To: Bjorn Andersson Cc: Konrad Dybcio , Krzysztof Kozlowski , Conor Dooley , Rob Herring , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Chukun Pan Subject: [PATCH v2 3/4] arm64: dts: qcom: ipq6018: move mp5496 regulator outside soc dtsi Date: Wed, 6 Mar 2024 22:03:05 +0800 Message-Id: <20240306140306.876188-4-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240306140306.876188-1-amadeus@jmu.edu.cn> References: <20240306140306.876188-1-amadeus@jmu.edu.cn> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVlDTk4fVh5PHx9IT01MGB8eT1UTARMWGhIXJBQOD1 lXWRgSC1lBWUlPSx5BSBlIQUkYS0pBT0JMS0EeGhoYQR4dTkJBH0MaHkFOHxhNWVdZFhoPEhUdFF lBWU9LSFVKTEpPTENVSktLVUpCS0tZBg++ X-HM-Tid: 0a8e1413ada803a2kunm8af727e0130 X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6MjI6ITo5OTMWOUMYTUhNCRI9 IhhPFA1VSlVKTEtCTEhIQ0pDS09JVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUlP Sx5BSBlIQUkYS0pBT0JMS0EeGhoYQR4dTkJBH0MaHkFOHxhNWVdZCAFZQU9NSUI3Bg++ Some IPQ60xx SoCs don't have the mp5496 pmic chips. The mp5496 pmic is not part of the ipq60xx SoC, and the mp5496 node is the same for devices with pmic, so create a common dtsi. Signed-off-by: Chukun Pan --- arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 1 + arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi | 29 ++++++++++++++++++++ arch/arm64/boot/dts/qcom/ipq6018.dtsi | 14 ---------- 3 files changed, 30 insertions(+), 14 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts index f5f4827c0e17..8331890e529e 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts +++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts @@ -8,6 +8,7 @@ /dts-v1/; #include "ipq6018.dtsi" +#include "ipq6018-mp5496.dtsi" / { model = "Qualcomm Technologies, Inc. IPQ6018/AP-CP01-C1"; diff --git a/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi b/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi new file mode 100644 index 000000000000..841fd757bee7 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +&rpm_requests { + regulators { + compatible = "qcom,rpm-mp5496-regulators"; + + ipq6018_s2: s2 { + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1062500>; + regulator-always-on; + }; + }; +}; + +&CPU0 { + cpu-supply = <&ipq6018_s2>; +}; + +&CPU1 { + cpu-supply = <&ipq6018_s2>; +}; + +&CPU2 { + cpu-supply = <&ipq6018_s2>; +}; + +&CPU3 { + cpu-supply = <&ipq6018_s2>; +}; diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 064b5706a289..823b87fdcefd 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -43,7 +43,6 @@ CPU0: cpu@0 { clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; clock-names = "cpu"; operating-points-v2 = <&cpu_opp_table>; - cpu-supply = <&ipq6018_s2>; #cooling-cells = <2>; }; @@ -56,7 +55,6 @@ CPU1: cpu@1 { clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; clock-names = "cpu"; operating-points-v2 = <&cpu_opp_table>; - cpu-supply = <&ipq6018_s2>; #cooling-cells = <2>; }; @@ -69,7 +67,6 @@ CPU2: cpu@2 { clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; clock-names = "cpu"; operating-points-v2 = <&cpu_opp_table>; - cpu-supply = <&ipq6018_s2>; #cooling-cells = <2>; }; @@ -82,7 +79,6 @@ CPU3: cpu@3 { clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; clock-names = "cpu"; operating-points-v2 = <&cpu_opp_table>; - cpu-supply = <&ipq6018_s2>; #cooling-cells = <2>; }; @@ -184,16 +180,6 @@ glink-edge { rpm_requests: rpm-requests { compatible = "qcom,rpm-ipq6018"; qcom,glink-channels = "rpm_requests"; - - regulators { - compatible = "qcom,rpm-mp5496-regulators"; - - ipq6018_s2: s2 { - regulator-min-microvolt = <725000>; - regulator-max-microvolt = <1062500>; - regulator-always-on; - }; - }; }; }; }; From patchwork Wed Mar 6 14:03:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chukun Pan X-Patchwork-Id: 13584118 Received: from mail-m49198.qiye.163.com (mail-m49198.qiye.163.com [45.254.49.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D645613248F; Wed, 6 Mar 2024 14:03:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709733840; cv=none; b=eGYrk359E8qxZ7aOMf/GZxpRWoZjklVdiff1ulYAVlT7Mr0rySG8opdYFxDgwc6YUqrRJw/YLzC+rHSMwzrfE2WTwzAqUHimyzlGdE1UClrbd55iHV3FK4sMrriKVhPlch8OGxJ0cNZBkjdHkmPQT733dFvpgb0jSY3nfE5PzYY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709733840; c=relaxed/simple; bh=L64mzeVNFc5OsAcWRE5Ix+mgIBf8QZHe+Pr/czduqRQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=a5yyAEcIk1ElusAW3IbjZQ8j+ZXIcQ4TRERMVG+0wre4XqqoHdZqv2Fi0JGwBZP8r7wSBHGvn64+blfv2TgF8VgA31zCdUuoKme8ZzuHz/pTAl8ENUYU+7XnwJJA8u43P/oLU5uJc7ajo3F651YvDS01goNuz7WC9yrfXilqDME= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn; spf=pass smtp.mailfrom=jmu.edu.cn; arc=none smtp.client-ip=45.254.49.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jmu.edu.cn Received: from amadeus-Vostro-3710.lan (unknown [IPV6:240e:3b3:2c01:4970:eaac:ef59:d8ae:5dc6]) by smtp.qiye.163.com (Hmail) with ESMTPA id 16F147E0132; Wed, 6 Mar 2024 22:03:38 +0800 (CST) From: Chukun Pan To: Bjorn Andersson Cc: Konrad Dybcio , Krzysztof Kozlowski , Conor Dooley , Rob Herring , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Chukun Pan , Robert Marko Subject: [PATCH v2 4/4] arm64: dts: qcom: ipq6018-mp5496: add LDOA2 regulator Date: Wed, 6 Mar 2024 22:03:06 +0800 Message-Id: <20240306140306.876188-5-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240306140306.876188-1-amadeus@jmu.edu.cn> References: <20240306140306.876188-1-amadeus@jmu.edu.cn> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVkaTx9JVk0aSEJDTUxCHxkdTFUTARMWGhIXJBQOD1 lXWRgSC1lBWUlPSx5BSBlIQUkYS0pBT0JMS0EeGhoYQR4dTkJBH0MaHkFOHxhNWVdZFhoPEhUdFF lBWU9LSFVKTEpPTENVSktLVUpCS0tZBg++ X-HM-Tid: 0a8e1413afcc03a2kunm16f147e0132 X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6Kzo6KSo*HjMPA0MZGEgoCRI1 GgMKCTJVSlVKTEtCTEhIQ0pDTUtMVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUlP Sx5BSBlIQUkYS0pBT0JMS0EeGhoYQR4dTkJBH0MaHkFOHxhNWVdZCAFZQUlISU43Bg++ Add LDOA2 regulator of MP5496 to support SDCC voltage scaling. Suggested-by: Robert Marko Signed-off-by: Chukun Pan --- arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi b/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi index 841fd757bee7..9910bec8a70f 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi @@ -9,9 +9,18 @@ ipq6018_s2: s2 { regulator-max-microvolt = <1062500>; regulator-always-on; }; + + ipq6018_l2: l2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; }; }; +&sdhc { + vqmmc-supply = <&ipq6018_l2>; +}; + &CPU0 { cpu-supply = <&ipq6018_s2>; };