From patchwork Fri Mar 15 08:34:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UGV0ZXIgV2FuZyAo546L5L+h5Y+LKQ==?= X-Patchwork-Id: 13593160 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 35F22C54E66 for ; Fri, 15 Mar 2024 08:35:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=kIq4WDamNAejLOlLbfTnowDxoUNzQaKvxhfTroNW3B4=; b=u5tPuEtlDM+Qz4D/WpVUX0IuBa dciYX9jf+Uk02pbAaK5o67k47zZE58JPcfH9wtmXxaoXOfjdXaC5YRj9128xtlPBpSXFSlUoWTra9 Pdwjfoa6tCsiREerRxZ6+BpObyjU9R5QDimOJ4+3ruEKPDNKL/GyKaKxJU4un33FNqhoKDtM8WD6j hXi+21HY8mIw0A+2Ng8GWaJfU3B7P3Tuj5CFdTplLVYxokLZ5J36D13TVQK48+HECe9V6KRwnL2KY kja15+NpMyq1mda/tK4Y0oHOaU0Bi5umuAIHzvQLddrjSk/DWP9rZCNoTZB72YKiSvrNXWPkjHAut M73ccD9Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rl31v-0000000HAhU-03WH; Fri, 15 Mar 2024 08:35:07 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rl31n-0000000HAbw-3OSO for linux-mediatek@lists.infradead.org; Fri, 15 Mar 2024 08:35:03 +0000 X-UUID: e5d53252e2a611ee9aa9374d6d45775a-20240315 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=kIq4WDamNAejLOlLbfTnowDxoUNzQaKvxhfTroNW3B4=; b=Cg2Yya2kgBcLzFaYWHlupA0NxLaMN9lkAr3de2qDy3yxpwAbRQOG/sZh1O6nB02dFYRQO2R8viLQA3TiZrgu6a7sWXmQ7btUiIbN0E279Jx4uxfKJk9L/9gsUhbo0pz/AZKKDstHn9WIzAsSrD4EiOQDxMUv/HYGkb/7mlBUKmI=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.37,REQID:b480dd25-5e1d-4568-a252-89652068c3d8,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:6f543d0,CLOUDID:0bd0eeff-c16b-4159-a099-3b9d0558e447,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES :1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: e5d53252e2a611ee9aa9374d6d45775a-20240315 Received: from mtkmbs14n1.mediatek.inc [(172.21.101.75)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 46592572; Fri, 15 Mar 2024 01:34:54 -0700 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 15 Mar 2024 16:34:50 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 15 Mar 2024 16:34:50 +0800 From: To: , , , , CC: , , , , , , , , , , , , , , Subject: [PATCH v2 1/7] ufs: host: mediatek: fix vsx/vccqx control logic Date: Fri, 15 Mar 2024 16:34:42 +0800 Message-ID: <20240315083448.7185-2-peter.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240315083448.7185-1-peter.wang@mediatek.com> References: <20240315083448.7185-1-peter.wang@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--6.435800-8.000000 X-TMASE-MatchedRID: pO+4S45NqGgMQLXc2MGSbO7KTDtx8CgguftX4oH7dy7I9EDAP/dptnzK 3Q9zSFL709NQNrxIpFYBtjkcfRMmqe3NIrNSYNRX4RtSDjG+z7DoatYL/ATKmL/A+0D1to6P9Gb SSaq0f4MRsHN+CG+OBlY5wOHo2QlHj2hRzH1UwuAURSScn+QSXt0H8LFZNFG73Yq8RVaZivVXBl d66gU5uBkSdfES7f3hGCZJhkKb/b/kxfO2+4tQJnvTu24Jt2HH X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--6.435800-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: B88309B41904768C1A60F4D39D39C4D5043DE9CE936F6FE1B5441FA846FEB74E2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240315_013500_378379_56F9AF66 X-CRM114-Status: GOOD ( 13.73 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Peter Wang VSX(the upper layer of VCCQ/VCCQ2) should 1. Always set to hpm mode if ufs device is active. 2. Enter lpm mode only if ufs device is not active. VCCQX should 1. Keep hpm mode if vccq and vccq2 not set in dts. 2. Keep hpm mode if vcc not set in dts keep vcc always on. 3. Keep hpm if broken vcc keep vcc always on and not allow vccq lpm. 4. Except upper case, can enter lpm mode if ufs device is not active. Acked-by: Chun-Hung Wu Signed-off-by: Peter Wang --- drivers/ufs/host/ufs-mediatek.c | 41 +++++++++++++++++++++++---------- drivers/ufs/host/ufs-mediatek.h | 6 +++++ 2 files changed, 35 insertions(+), 12 deletions(-) diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c index 776bca4f70c8..147b5286ec98 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -119,6 +119,13 @@ static bool ufs_mtk_is_pmc_via_fastauto(struct ufs_hba *hba) return !!(host->caps & UFS_MTK_CAP_PMC_VIA_FASTAUTO); } +static bool ufs_mtk_is_allow_vccqx_lpm(struct ufs_hba *hba) +{ + struct ufs_mtk_host *host = ufshcd_get_variant(hba); + + return (host->caps & UFS_MTK_CAP_ALLOW_VCCQX_LPM); +} + static void ufs_mtk_cfg_unipro_cg(struct ufs_hba *hba, bool enable) { u32 tmp; @@ -1271,27 +1278,37 @@ static void ufs_mtk_vsx_set_lpm(struct ufs_hba *hba, bool lpm) static void ufs_mtk_dev_vreg_set_lpm(struct ufs_hba *hba, bool lpm) { - if (!hba->vreg_info.vccq && !hba->vreg_info.vccq2) - return; + bool skip_vccqx = false; - /* Skip if VCC is assumed always-on */ - if (!hba->vreg_info.vcc) - return; - - /* Bypass LPM when device is still active */ + /* Prevent entering LPM when device is still active */ if (lpm && ufshcd_is_ufs_dev_active(hba)) return; - /* Bypass LPM if VCC is enabled */ - if (lpm && hba->vreg_info.vcc->enabled) - return; + /* Skip vccqx lpm control and control vsx only */ + if (!hba->vreg_info.vccq && !hba->vreg_info.vccq2) + skip_vccqx = true; + + /* VCC is always-on, control vsx only */ + if (!hba->vreg_info.vcc) + skip_vccqx = true; + + /* Broken vcc keep vcc always on, most case control vsx only */ + if (lpm && hba->vreg_info.vcc && hba->vreg_info.vcc->enabled) { + /* Some device vccqx/vsx can enter lpm */ + if (ufs_mtk_is_allow_vccqx_lpm(hba)) + skip_vccqx = false; + else /* control vsx only */ + skip_vccqx = true; + } if (lpm) { - ufs_mtk_vccqx_set_lpm(hba, lpm); + if (!skip_vccqx) + ufs_mtk_vccqx_set_lpm(hba, lpm); ufs_mtk_vsx_set_lpm(hba, lpm); } else { ufs_mtk_vsx_set_lpm(hba, lpm); - ufs_mtk_vccqx_set_lpm(hba, lpm); + if (!skip_vccqx) + ufs_mtk_vccqx_set_lpm(hba, lpm); } } diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h index f76e80d91729..d0a5ab17860a 100644 --- a/drivers/ufs/host/ufs-mediatek.h +++ b/drivers/ufs/host/ufs-mediatek.h @@ -136,6 +136,12 @@ enum ufs_mtk_host_caps { UFS_MTK_CAP_VA09_PWR_CTRL = 1 << 1, UFS_MTK_CAP_DISABLE_AH8 = 1 << 2, UFS_MTK_CAP_BROKEN_VCC = 1 << 3, + + /* + * Override UFS_MTK_CAP_BROKEN_VCC's behavior to + * allow vccqx upstream to enter LPM + */ + UFS_MTK_CAP_ALLOW_VCCQX_LPM = 1 << 5, UFS_MTK_CAP_PMC_VIA_FASTAUTO = 1 << 6, }; From patchwork Fri Mar 15 08:34:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UGV0ZXIgV2FuZyAo546L5L+h5Y+LKQ==?= X-Patchwork-Id: 13593162 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A7F7C54E69 for ; Fri, 15 Mar 2024 08:35:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ATX7DE3pf+GNEBqDAhFhJVT5DKLBcrGcVoJ0/mRV3gQ=; b=4iGPPfor8tOKHilbdWExdVpLBQ VvG/dmbIVVDFUaZUyCpZIO7DGqH6qh5xyiSq5iIEndptlC7Ap9ZWyvhWwU5d5g7RMYJbFZtNDk7Ww H4DTbLt82rIv3Jxb+zOVBBqpkNviPqDxXi4dR0zLrBNyu/Wgxn2vHZmTpVjqfaubTV85XilP5mR0J 2YFy7W7Xt6Mo2g3TAEZulvOQPePie3KGi3TCvE0P6oC85+mKq6PAWUDrTEDvMBEpI6F8+lted2ZyB +Ehje7qdkCH0tJqVAtY9HRzGFuN7TqtOc2QNsuHFgnEoLhyxG6qCG+wPTg/VDb3ennUDKVd9bGqCa FXeDkF0A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rl31v-0000000HAhw-2CMT; Fri, 15 Mar 2024 08:35:07 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rl31p-0000000HAeK-2KP3 for linux-mediatek@lists.infradead.org; Fri, 15 Mar 2024 08:35:03 +0000 X-UUID: e64631aae2a611ee9aa9374d6d45775a-20240315 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=ATX7DE3pf+GNEBqDAhFhJVT5DKLBcrGcVoJ0/mRV3gQ=; b=Kt3dzgX1TG+4Ny8HNgZIwKTeu9lvEIElIxvE6R0hj+ZHGK86IkcZb/ZVq0HnqwefbffJ7xYhzFLy6aLcGh/i1i/qWplbrlOXYvazRCj+O2nmU58vBpLZk2s4A1bXJ7tfqrxBI8uW5y/nAuXSX5hOx0fLyCr+LGAsLL8BmNzlBgc=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.37,REQID:9f3820cd-d89a-4d3e-b1bf-0ddda8e467e0,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:6f543d0,CLOUDID:2e047190-e2c0-40b0-a8fe-7c7e47299109,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES :1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: e64631aae2a611ee9aa9374d6d45775a-20240315 Received: from mtkmbs14n1.mediatek.inc [(172.21.101.75)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1273614618; Fri, 15 Mar 2024 01:34:55 -0700 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 15 Mar 2024 16:34:50 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 15 Mar 2024 16:34:50 +0800 From: To: , , , , CC: , , , , , , , , , , , , , , Subject: [PATCH v2 2/7] ufs: host: mediatek: tx skew fix Date: Fri, 15 Mar 2024 16:34:43 +0800 Message-ID: <20240315083448.7185-3-peter.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240315083448.7185-1-peter.wang@mediatek.com> References: <20240315083448.7185-1-peter.wang@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--4.857300-8.000000 X-TMASE-MatchedRID: n/G9Jfep/EYMQLXc2MGSbIzb2GR6Ttd39Nx/wC/5BIDfc2Xd6VJ+yqE9 PHeVbwLZeeTK1AUftLLijpjet3oGSJCoy9iDotiwjoyKzEmtrEdYN1akkye0qOkviQKjlVkeoBf JbWQaw4Pc3nKzIYoy4oAy6p60ZV62fJ5/bZ6npdjKayT/BQTiGtJaX40YooekqswO62qermAz8M fXufKgqBRTidULKtoa/IaBPoZPwlUXpWXAorqW3pG7NytUycyAZ30APAmfP3O0PdybCyoACq/XF oPK0hZ9dATQdtPksR+3/JiWOe6GXXSWgQ2GpXdZbxffl9hhCBw= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--4.857300-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: EC9D5EAE5EE4ED939A91AD8637D2DB819933FAB94736ED65F7E0D3C9A9A73D432000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240315_013501_835612_EDE0B3DF X-CRM114-Status: GOOD ( 11.16 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Peter Wang Mediatek tx skew issue fix by check dts setting and vendor/model. Then set PA_TACTIVATE set 8 Acked-by: Chun-Hung Wu Reviewed-by: Avri Altman Signed-off-by: Peter Wang --- drivers/ufs/host/ufs-mediatek.c | 21 +++++++++++++++++++++ drivers/ufs/host/ufs-mediatek.h | 1 + 2 files changed, 22 insertions(+) diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c index 147b5286ec98..25bf5a13cddd 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -119,6 +119,13 @@ static bool ufs_mtk_is_pmc_via_fastauto(struct ufs_hba *hba) return !!(host->caps & UFS_MTK_CAP_PMC_VIA_FASTAUTO); } +static bool ufs_mtk_is_tx_skew_fix(struct ufs_hba *hba) +{ + struct ufs_mtk_host *host = ufshcd_get_variant(hba); + + return (host->caps & UFS_MTK_CAP_TX_SKEW_FIX); +} + static bool ufs_mtk_is_allow_vccqx_lpm(struct ufs_hba *hba) { struct ufs_mtk_host *host = ufshcd_get_variant(hba); @@ -630,6 +637,9 @@ static void ufs_mtk_init_host_caps(struct ufs_hba *hba) if (of_property_read_bool(np, "mediatek,ufs-pmc-via-fastauto")) host->caps |= UFS_MTK_CAP_PMC_VIA_FASTAUTO; + if (of_property_read_bool(np, "mediatek,ufs-tx-skew-fix")) + host->caps |= UFS_MTK_CAP_TX_SKEW_FIX; + dev_info(hba->dev, "caps: 0x%x", host->caps); } @@ -1423,6 +1433,17 @@ static int ufs_mtk_apply_dev_quirks(struct ufs_hba *hba) if (mid == UFS_VENDOR_SAMSUNG) { ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 6); ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME), 10); + } else if (mid == UFS_VENDOR_MICRON) { + /* Only for the host which have TX skew issue */ + if (ufs_mtk_is_tx_skew_fix(hba) && + (STR_PRFX_EQUAL("MT128GBCAV2U31", dev_info->model) || + STR_PRFX_EQUAL("MT256GBCAV4U31", dev_info->model) || + STR_PRFX_EQUAL("MT512GBCAV8U31", dev_info->model) || + STR_PRFX_EQUAL("MT256GBEAX4U40", dev_info->model) || + STR_PRFX_EQUAL("MT512GAYAX4U40", dev_info->model) || + STR_PRFX_EQUAL("MT001TAYAX8U40", dev_info->model))) { + ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 8); + } } /* diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h index d0a5ab17860a..c1acbfc5568f 100644 --- a/drivers/ufs/host/ufs-mediatek.h +++ b/drivers/ufs/host/ufs-mediatek.h @@ -143,6 +143,7 @@ enum ufs_mtk_host_caps { */ UFS_MTK_CAP_ALLOW_VCCQX_LPM = 1 << 5, UFS_MTK_CAP_PMC_VIA_FASTAUTO = 1 << 6, + UFS_MTK_CAP_TX_SKEW_FIX = 1 << 7, }; struct ufs_mtk_crypt_cfg { From patchwork Fri Mar 15 08:34:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UGV0ZXIgV2FuZyAo546L5L+h5Y+LKQ==?= X-Patchwork-Id: 13593179 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AA8CCC54E58 for ; Fri, 15 Mar 2024 08:55:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=co97dusQYPEklPIpu86QgWV11cpjh4YHyUtI7SGFiQY=; b=TFr4vZ38y6RXV7ydw5dljllrDK Kcs6MLIhvDPidiHtr7XOFgJy0ey2RqNy0AmwLjIagi5K21O43hysvSk60bL0pm/f3WYdwbn4SsrR4 aymF2fT/OGrzovL6e6SjQy7oNlD01rKDE/yg6yc6b2yKctof0dIjnCUj3YTgzvDi4FzUBbqp84put mf7Q2Oi9FzT6vzub3+R97IyoR3d1+2Sb5s6ZlRRVa63tAp3se78P1u/JqZDn5L8LFYTFGTF+ZNQYU Kl9HhbL+qHnV/BOVF/qbwceDTpHTQL0lyFGnBaGTSQc//sqJ/k2qv/hlrKzisK/8O+5qfDQvLWOm5 Gp4BXKPQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rl3LA-0000000HEUr-0myG; Fri, 15 Mar 2024 08:55:00 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rl3L8-0000000HETG-029v for linux-mediatek@lists.infradead.org; Fri, 15 Mar 2024 08:54:59 +0000 X-UUID: b15451eae2a911eeacdb61a41848c7d2-20240315 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=co97dusQYPEklPIpu86QgWV11cpjh4YHyUtI7SGFiQY=; b=e3/AIe7de8ofkTMjkkwM22aPB4S/giKh3SqmJSTBJBgvD8Vqn6KXkf++yLAtpXczLKrYZx1yeWNEIyjVWLFiCXd2UNItj2ZwZ37TUeeuFOrtGByPriF1lSzyqNwyIxSWw6/smoygUgEXFNrXv7oy2kR6Jb0NYpAhnZgQ1spjYWE=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.37,REQID:5b57dfa6-d260-4388-8a83-3d577d30f8e5,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:6f543d0,CLOUDID:aa7c0a85-8d4f-477b-89d2-1e3bdbef96d1,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES :1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: b15451eae2a911eeacdb61a41848c7d2-20240315 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 736700871; Fri, 15 Mar 2024 01:54:54 -0700 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 15 Mar 2024 16:34:50 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 15 Mar 2024 16:34:50 +0800 From: To: , , , , CC: , , , , , , , , , , , , , , Subject: [PATCH v2 3/7] ufs: host: mediatek: Add UFS_MTK_CAP_DISABLE_MCQ Date: Fri, 15 Mar 2024 16:34:44 +0800 Message-ID: <20240315083448.7185-4-peter.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240315083448.7185-1-peter.wang@mediatek.com> References: <20240315083448.7185-1-peter.wang@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--9.664600-8.000000 X-TMASE-MatchedRID: Dz2rI8EJB2APRVepDWIjx7iMC5wdwKqdT2fFmw5H8VPI9EDAP/dptm/Y agJ/V3Z5L7y59K1QGD/G81sj4r28+AxAtdzYwZJsH5YQyOg71ZZMkOX0UoduuQqiCYa6w8tvlUN mxPSthYIULfbRmZ/onHhbWkjJzPSiFm2HuAZVgfZfwzQfOH01PDJcsSAcBZLamyiLZetSf8mfop 0ytGwvXiq2rl3dzGQ1l3+bAt/YFVRLioE7CwaedVoA92s8DJ3qyWh+cGWvov7FbXKUXP6jRWgGZ NLBHGNe X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--9.664600-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 9A9341DD883609E319E4AC0196D5F112CE51C50D14BDD4B24523ED0E53B8A8D42000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240315_015458_145578_1F16C356 X-CRM114-Status: GOOD ( 11.58 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Po-Wen Kao Add new mediatek host cap UFS_MTK_CAP_DISABLE_MCQ to allow disable MCQ feature by assigning dts boolean property "mediatek,ufs-disable-mcq"" Acked-by: Chun-Hung Wu Reviewed-by: Avri Altman Reviewed-by: Peter Wang Signed-off-by: Peter Wang Signed-off-by: Po-Wen Kao --- drivers/ufs/host/ufs-mediatek.c | 12 ++++++++++++ drivers/ufs/host/ufs-mediatek.h | 1 + 2 files changed, 13 insertions(+) diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c index 25bf5a13cddd..2ee7881533ec 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -640,6 +640,9 @@ static void ufs_mtk_init_host_caps(struct ufs_hba *hba) if (of_property_read_bool(np, "mediatek,ufs-tx-skew-fix")) host->caps |= UFS_MTK_CAP_TX_SKEW_FIX; + if (of_property_read_bool(np, "mediatek,ufs-disable-mcq")) + host->caps |= UFS_MTK_CAP_DISABLE_MCQ; + dev_info(hba->dev, "caps: 0x%x", host->caps); } @@ -874,6 +877,9 @@ static void ufs_mtk_init_mcq_irq(struct ufs_hba *hba) host->mcq_nr_intr = UFSHCD_MAX_Q_NR; pdev = container_of(hba->dev, struct platform_device, dev); + if (host->caps & UFS_MTK_CAP_DISABLE_MCQ) + goto failed; + for (i = 0; i < host->mcq_nr_intr; i++) { /* irq index 0 is legacy irq, sq/cq irq start from index 1 */ irq = platform_get_irq(pdev, i + 1); @@ -1585,6 +1591,12 @@ static int ufs_mtk_clk_scale_notify(struct ufs_hba *hba, bool scale_up, static int ufs_mtk_get_hba_mac(struct ufs_hba *hba) { + struct ufs_mtk_host *host = ufshcd_get_variant(hba); + + /* MCQ operation not permitted */ + if (host->caps & UFS_MTK_CAP_DISABLE_MCQ) + return -EPERM; + return MAX_SUPP_MAC; } diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h index c1acbfc5568f..3f698af5f5ac 100644 --- a/drivers/ufs/host/ufs-mediatek.h +++ b/drivers/ufs/host/ufs-mediatek.h @@ -144,6 +144,7 @@ enum ufs_mtk_host_caps { UFS_MTK_CAP_ALLOW_VCCQX_LPM = 1 << 5, UFS_MTK_CAP_PMC_VIA_FASTAUTO = 1 << 6, UFS_MTK_CAP_TX_SKEW_FIX = 1 << 7, + UFS_MTK_CAP_DISABLE_MCQ = 1 << 8, }; struct ufs_mtk_crypt_cfg { From patchwork Fri Mar 15 08:34:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UGV0ZXIgV2FuZyAo546L5L+h5Y+LKQ==?= X-Patchwork-Id: 13593180 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 92645C54E58 for ; Fri, 15 Mar 2024 08:55:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=yE4JBQTCPH3gA6ZXKyx8sgWao+HvBsWrcvvs5VHR2/A=; b=jklzOy4f1JgMQOB3DvPB4xD7Lm Bn7MyAgfPQCX5go8Gn+AlllhtojpEUdq4/pDm5GIqp9hU6QOW7xki3iru3eraVmY9KFUQZx3/KjiK GOyMuxjYcFNkSITRBKoBBgWuKLcR4BLLrd3zA2ijVIAGym8gc4EsmGaaLFYg90DxcAWo0IXwWnBkC rNpPL1YnCVYKNKe4JZob4uQmzB532O1b9/3E3Ri4PsrAjMOjhQveQa2UtJ0TYqGfQ0JXgdC3V5Hg4 PXrOwLHDB70+Szl04YoVHRGacpOp244Y39iCRt3NUQ8kxO8eHOMoAA1AacMA9LjqqrQYXdrZJkA1l ZM9bx4Vg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rl3Lm-0000000HEaq-0nr7; Fri, 15 Mar 2024 08:55:38 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rl3Li-0000000HEZz-3awd for linux-mediatek@lists.infradead.org; Fri, 15 Mar 2024 08:55:36 +0000 X-UUID: c64b7b82e2a911ee9aa9374d6d45775a-20240315 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=yE4JBQTCPH3gA6ZXKyx8sgWao+HvBsWrcvvs5VHR2/A=; b=A6wEVPsSzSwREgj+fK2WnF7HB0eLeSdQtc/kL3qPGYjeBiTAMPA/bG6Ifpf5JiUdCVzs9hG4y+Ya8rVuGTU2aivJgkFiIUKObbwZxY84wmfYiGdSUIg8BM1WMX5lr1T48PUpOlN/U9iRjXa6tTPNGznuAsj7IcyhBQ6LuySNr7o=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.37,REQID:9823e178-93cf-4547-a0ba-be4abc2dd55d,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:6f543d0,CLOUDID:4b7e0a85-8d4f-477b-89d2-1e3bdbef96d1,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES :1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: c64b7b82e2a911ee9aa9374d6d45775a-20240315 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 452472908; Fri, 15 Mar 2024 01:55:29 -0700 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 15 Mar 2024 16:34:51 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 15 Mar 2024 16:34:51 +0800 From: To: , , , , CC: , , , , , , , , , , , , , , Subject: [PATCH v2 4/7] ufs: host: mediatek: ufs mtk sip command reconstruct Date: Fri, 15 Mar 2024 16:34:45 +0800 Message-ID: <20240315083448.7185-5-peter.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240315083448.7185-1-peter.wang@mediatek.com> References: <20240315083448.7185-1-peter.wang@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--6.741700-8.000000 X-TMASE-MatchedRID: jxLDw2lrPpv9jxte3IFskLiMC5wdwKqdf6/Md8Lb2l84YKAM3oRt9l0c vQ4E8DdUXk6mOXfvRmBM8qdoCvOVvj13WcdbGR6QyeVujmXuYYXzWEMQjooUzUYvSDWdWaRh/c+ POq0n3JUSIx4SDL9Y5pNNyCYD/Z/9g4jZH72x494XrP0cYcrA24EcpMn6x9cZCqIJhrrDy28J64 /kWP1C5qnX7naLYMc4ou7eTOm27Q0YB2fOueQzjxRFJJyf5BJe3QfwsVk0UbvdirxFVpmK9aHch 3WEjd2F0nn3c1dbxAlDWsS2bc6upr30xNSH2BlAtZz3gO3LWCI= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--6.741700-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 32482157928C4B65CAFD2AEC8DABE8A6FAEB78881EBB02EE5CA424F9AEC2BE422000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240315_015534_925143_C1FB2B17 X-CRM114-Status: GOOD ( 14.46 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Po-Wen Kao Move sip command and define to a new sip header file. Acked-by: Chun-Hung Wu Reviewed-by: Peter Wang Signed-off-by: Peter Wang Signed-off-by: Po-Wen Kao --- drivers/ufs/host/ufs-mediatek-sip.h | 90 +++++++++++++++++++++++++++++ drivers/ufs/host/ufs-mediatek.c | 3 +- drivers/ufs/host/ufs-mediatek.h | 79 ------------------------- 3 files changed, 92 insertions(+), 80 deletions(-) create mode 100755 drivers/ufs/host/ufs-mediatek-sip.h diff --git a/drivers/ufs/host/ufs-mediatek-sip.h b/drivers/ufs/host/ufs-mediatek-sip.h new file mode 100755 index 000000000000..35d1d5e76a2c --- /dev/null +++ b/drivers/ufs/host/ufs-mediatek-sip.h @@ -0,0 +1,90 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2022 MediaTek Inc. + */ + +#ifndef _UFS_MEDIATEK_SIP_H +#define _UFS_MEDIATEK_SIP_H + +#include + +/* + * SiP (Slicon Partner) commands + */ +#define MTK_SIP_UFS_CONTROL MTK_SIP_SMC_CMD(0x276) +#define UFS_MTK_SIP_VA09_PWR_CTRL BIT(0) +#define UFS_MTK_SIP_DEVICE_RESET BIT(1) +#define UFS_MTK_SIP_CRYPTO_CTRL BIT(2) +#define UFS_MTK_SIP_REF_CLK_NOTIFICATION BIT(3) +#define UFS_MTK_SIP_HOST_PWR_CTRL BIT(5) +#define UFS_MTK_SIP_GET_VCC_NUM BIT(6) +#define UFS_MTK_SIP_DEVICE_PWR_CTRL BIT(7) + + +/* + * Multi-VCC by Numbering + */ +enum ufs_mtk_vcc_num { + UFS_VCC_NONE = 0, + UFS_VCC_1, + UFS_VCC_2, + UFS_VCC_MAX +}; + +/* + * Host Power Control options + */ +enum { + HOST_PWR_HCI = 0, + HOST_PWR_MPHY +}; + +/* + * SMC call wrapper function + */ +struct ufs_mtk_smc_arg { + unsigned long cmd; + struct arm_smccc_res *res; + unsigned long v1; + unsigned long v2; + unsigned long v3; + unsigned long v4; + unsigned long v5; + unsigned long v6; + unsigned long v7; +}; + + +static inline void _ufs_mtk_smc(struct ufs_mtk_smc_arg s) +{ + arm_smccc_smc(MTK_SIP_UFS_CONTROL, + s.cmd, + s.v1, s.v2, s.v3, s.v4, s.v5, s.v6, s.res); +} + +#define ufs_mtk_smc(...) \ + _ufs_mtk_smc((struct ufs_mtk_smc_arg) {__VA_ARGS__}) + +/* Sip kernel interface */ +#define ufs_mtk_va09_pwr_ctrl(res, on) \ + ufs_mtk_smc(UFS_MTK_SIP_VA09_PWR_CTRL, &(res), on) + +#define ufs_mtk_crypto_ctrl(res, enable) \ + ufs_mtk_smc(UFS_MTK_SIP_CRYPTO_CTRL, &(res), enable) + +#define ufs_mtk_ref_clk_notify(on, stage, res) \ + ufs_mtk_smc(UFS_MTK_SIP_REF_CLK_NOTIFICATION, &(res), on, stage) + +#define ufs_mtk_device_reset_ctrl(high, res) \ + ufs_mtk_smc(UFS_MTK_SIP_DEVICE_RESET, &(res), high) + +#define ufs_mtk_host_pwr_ctrl(opt, on, res) \ + ufs_mtk_smc(UFS_MTK_SIP_HOST_PWR_CTRL, &(res), opt, on) + +#define ufs_mtk_get_vcc_num(res) \ + ufs_mtk_smc(UFS_MTK_SIP_GET_VCC_NUM, &(res)) + +#define ufs_mtk_device_pwr_ctrl(on, ufs_version, res) \ + ufs_mtk_smc(UFS_MTK_SIP_DEVICE_PWR_CTRL, &(res), on, ufs_version) + +#endif /* !_UFS_MEDIATEK_SIP_H */ diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c index 2ee7881533ec..bb5b11185d8a 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -20,13 +20,14 @@ #include #include #include -#include #include #include "ufshcd-pltfrm.h" #include #include + #include "ufs-mediatek.h" +#include "ufs-mediatek-sip.h" static int ufs_mtk_config_mcq(struct ufs_hba *hba, bool irq); diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h index 3f698af5f5ac..9226e95c4a60 100644 --- a/drivers/ufs/host/ufs-mediatek.h +++ b/drivers/ufs/host/ufs-mediatek.h @@ -8,7 +8,6 @@ #include #include -#include /* * MCQ define and struct @@ -100,18 +99,6 @@ enum { VS_HIB_EXIT = 13, }; -/* - * SiP commands - */ -#define MTK_SIP_UFS_CONTROL MTK_SIP_SMC_CMD(0x276) -#define UFS_MTK_SIP_VA09_PWR_CTRL BIT(0) -#define UFS_MTK_SIP_DEVICE_RESET BIT(1) -#define UFS_MTK_SIP_CRYPTO_CTRL BIT(2) -#define UFS_MTK_SIP_REF_CLK_NOTIFICATION BIT(3) -#define UFS_MTK_SIP_HOST_PWR_CTRL BIT(5) -#define UFS_MTK_SIP_GET_VCC_NUM BIT(6) -#define UFS_MTK_SIP_DEVICE_PWR_CTRL BIT(7) - /* * VS_DEBUGCLOCKENABLE */ @@ -198,70 +185,4 @@ struct ufs_mtk_host { struct ufs_mtk_mcq_intr_info mcq_intr_info[UFSHCD_MAX_Q_NR]; }; -/* - * Multi-VCC by Numbering - */ -enum ufs_mtk_vcc_num { - UFS_VCC_NONE = 0, - UFS_VCC_1, - UFS_VCC_2, - UFS_VCC_MAX -}; - -/* - * Host Power Control options - */ -enum { - HOST_PWR_HCI = 0, - HOST_PWR_MPHY -}; - -/* - * SMC call wrapper function - */ -struct ufs_mtk_smc_arg { - unsigned long cmd; - struct arm_smccc_res *res; - unsigned long v1; - unsigned long v2; - unsigned long v3; - unsigned long v4; - unsigned long v5; - unsigned long v6; - unsigned long v7; -}; - -static void _ufs_mtk_smc(struct ufs_mtk_smc_arg s) -{ - arm_smccc_smc(MTK_SIP_UFS_CONTROL, - s.cmd, s.v1, s.v2, s.v3, s.v4, s.v5, s.v6, s.res); -} - -#define ufs_mtk_smc(...) \ - _ufs_mtk_smc((struct ufs_mtk_smc_arg) {__VA_ARGS__}) - -/* - * SMC call interface - */ -#define ufs_mtk_va09_pwr_ctrl(res, on) \ - ufs_mtk_smc(UFS_MTK_SIP_VA09_PWR_CTRL, &(res), on) - -#define ufs_mtk_crypto_ctrl(res, enable) \ - ufs_mtk_smc(UFS_MTK_SIP_CRYPTO_CTRL, &(res), enable) - -#define ufs_mtk_ref_clk_notify(on, stage, res) \ - ufs_mtk_smc(UFS_MTK_SIP_REF_CLK_NOTIFICATION, &(res), on, stage) - -#define ufs_mtk_device_reset_ctrl(high, res) \ - ufs_mtk_smc(UFS_MTK_SIP_DEVICE_RESET, &(res), high) - -#define ufs_mtk_host_pwr_ctrl(opt, on, res) \ - ufs_mtk_smc(UFS_MTK_SIP_HOST_PWR_CTRL, &(res), opt, on) - -#define ufs_mtk_get_vcc_num(res) \ - ufs_mtk_smc(UFS_MTK_SIP_GET_VCC_NUM, &(res)) - -#define ufs_mtk_device_pwr_ctrl(on, ufs_ver, res) \ - ufs_mtk_smc(UFS_MTK_SIP_DEVICE_PWR_CTRL, &(res), on, ufs_ver) - #endif /* !_UFS_MEDIATEK_H */ From patchwork Fri Mar 15 08:34:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UGV0ZXIgV2FuZyAo546L5L+h5Y+LKQ==?= X-Patchwork-Id: 13593165 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BEDB4C54E58 for ; Fri, 15 Mar 2024 08:36:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=fydS8KBtthi1h3b4IeD9/II1N6JzyYB+1Hi99jvkzCo=; b=vS3rWJXhL4LZjO31a5XEoafoZq MsIPlxMZ/JZaPw+ojjDFHbcoyC6VCnJ7XWE4V+M+C6gV8o7GuxOdx5jaS1WxlFS/aGvJbKgw8wnPd wGdAEULyfCVpPJ8zYo8qBX/OP/W+euMGaIecJ49Q83/EnYEby6tWgOuwwF+UKsJBnS/bA2feaMfsw +8cefRX9NrMzS/aOyCWRjaNJR646mJlNd69vMr0Jsk2S3QfDSwpqJTzqnSsjBactCT5PUKji4Pn/n 8yV30RYBE5/tmmccSdPGy1owv2Lon+vauawRfZd6tG35ttjve6CbBTgJqMHk9EJ7PBBb2TTndDSki aaAQOU3w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rl32u-0000000HB9F-1riY; Fri, 15 Mar 2024 08:36:08 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rl32p-0000000HB5B-2DA6 for linux-mediatek@lists.infradead.org; Fri, 15 Mar 2024 08:36:05 +0000 X-UUID: 0c2595fae2a711eeacdb61a41848c7d2-20240315 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=fydS8KBtthi1h3b4IeD9/II1N6JzyYB+1Hi99jvkzCo=; b=TDhzrJrP0xJilDblVU8G4+Qywvtrkc/opoLOSTexDxISJKaV1t3KvZWTtW4P0JRf72HO9pGGJT4yLa0j0iy8mriUxmAXFT5cFwjdHLj1YaaXRElJj8KdyfUk7tb71Krx/gjaKXn1SdNzJWaKSK6hMXEhKhlq9xTCIVYTPG7b1wM=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.37,REQID:6c0718dd-7d51-4cc2-86ee-4e76ae18fcb1,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:6f543d0,CLOUDID:9d077190-e2c0-40b0-a8fe-7c7e47299109,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES :1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 0c2595fae2a711eeacdb61a41848c7d2-20240315 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1062647806; Fri, 15 Mar 2024 01:35:58 -0700 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 15 Mar 2024 16:34:51 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 15 Mar 2024 16:34:51 +0800 From: To: , , , , CC: , , , , , , , , , , , , , , Subject: [PATCH v2 5/7] ufs: host: mediatek: rename host power control API Date: Fri, 15 Mar 2024 16:34:46 +0800 Message-ID: <20240315083448.7185-6-peter.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240315083448.7185-1-peter.wang@mediatek.com> References: <20240315083448.7185-1-peter.wang@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--8.382800-8.000000 X-TMASE-MatchedRID: Dz2rI8EJB2ASsMJYjeJjbpXi1z8zt1TRVg8Cu6buTGUH8UzOewTxw64T oUk/aSm1G04xakpCTBluGm5dWKYjJW94Ipa1otxoFYJUGv4DL3xo3Yq5PCwLAvNhzIgXtFJV88y Ax0zkDh7IrNi4B9W0wmRsrGzt2UVHWrGyEceiJjOO0rt0LpQGedVeTBbTX7DomyiLZetSf8mfop 0ytGwvXiq2rl3dzGQ1l3+bAt/YFVQrDtKO1nMb87ylVHbseLLr9peJJrwQXnmJjf1mJVm5IF8I4 oUq5Vga X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--8.382800-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: C01B34E67F7175378414B0B793A12B756D2599DB6D4BDD5D41C9AA142BEDD6D22000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240315_013603_630276_43E79BDF X-CRM114-Status: GOOD ( 11.13 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Po-Wen Kao Mediatek host power include two part: 1. ufshci power, which is the main power of ufs host controller. 2. ufshci crypto sram power, which is the power of ufs crypto engine. This host power control is actually control crypto sram power. Rename it for easy maintain. Acked-by: Chun-Hung Wu Reviewed-by: Avri Altman Reviewed-by: Peter Wang Signed-off-by: Peter Wang Signed-off-by: Po-Wen Kao --- drivers/ufs/host/ufs-mediatek-sip.h | 13 +++---------- drivers/ufs/host/ufs-mediatek.c | 4 ++-- 2 files changed, 5 insertions(+), 12 deletions(-) diff --git a/drivers/ufs/host/ufs-mediatek-sip.h b/drivers/ufs/host/ufs-mediatek-sip.h index 35d1d5e76a2c..c26513aedee3 100755 --- a/drivers/ufs/host/ufs-mediatek-sip.h +++ b/drivers/ufs/host/ufs-mediatek-sip.h @@ -16,7 +16,7 @@ #define UFS_MTK_SIP_DEVICE_RESET BIT(1) #define UFS_MTK_SIP_CRYPTO_CTRL BIT(2) #define UFS_MTK_SIP_REF_CLK_NOTIFICATION BIT(3) -#define UFS_MTK_SIP_HOST_PWR_CTRL BIT(5) +#define UFS_MTK_SIP_SRAM_PWR_CTRL BIT(5) #define UFS_MTK_SIP_GET_VCC_NUM BIT(6) #define UFS_MTK_SIP_DEVICE_PWR_CTRL BIT(7) @@ -31,13 +31,6 @@ enum ufs_mtk_vcc_num { UFS_VCC_MAX }; -/* - * Host Power Control options - */ -enum { - HOST_PWR_HCI = 0, - HOST_PWR_MPHY -}; /* * SMC call wrapper function @@ -78,8 +71,8 @@ static inline void _ufs_mtk_smc(struct ufs_mtk_smc_arg s) #define ufs_mtk_device_reset_ctrl(high, res) \ ufs_mtk_smc(UFS_MTK_SIP_DEVICE_RESET, &(res), high) -#define ufs_mtk_host_pwr_ctrl(opt, on, res) \ - ufs_mtk_smc(UFS_MTK_SIP_HOST_PWR_CTRL, &(res), opt, on) +#define ufs_mtk_sram_pwr_ctrl(on, res) \ + ufs_mtk_smc(UFS_MTK_SIP_SRAM_PWR_CTRL, &(res), on) #define ufs_mtk_get_vcc_num(res) \ ufs_mtk_smc(UFS_MTK_SIP_GET_VCC_NUM, &(res)) diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c index bb5b11185d8a..90523652a6fb 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -1376,7 +1376,7 @@ static int ufs_mtk_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op, if (ufshcd_is_link_off(hba)) ufs_mtk_device_reset_ctrl(0, res); - ufs_mtk_host_pwr_ctrl(HOST_PWR_HCI, false, res); + ufs_mtk_sram_pwr_ctrl(false, res); return 0; fail: @@ -1397,7 +1397,7 @@ static int ufs_mtk_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op) if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) ufs_mtk_dev_vreg_set_lpm(hba, false); - ufs_mtk_host_pwr_ctrl(HOST_PWR_HCI, true, res); + ufs_mtk_sram_pwr_ctrl(true, res); err = ufs_mtk_mphy_power_on(hba, true); if (err) From patchwork Fri Mar 15 08:34:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UGV0ZXIgV2FuZyAo546L5L+h5Y+LKQ==?= X-Patchwork-Id: 13593163 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8AC1BC54E58 for ; Fri, 15 Mar 2024 08:36:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=oeAzBoL9EBJWz2qwI3onG0bmYDXNeq0oJ9wAQA83NiU=; b=pu/TrpbIHKgS3EB9MGb9dyETIe I9P0WzlZ6Ns/o5k5QNsdIz4D5sWCSYukLdyYpsTOHSZ6BXHM3jgGVeqtiEnWwhWEVSp6o33rFMSIm C4RTj5QTwJJIk9B4Hu4nflVcHHKZhLJEg5HfNa8om4VoNzl2JrnNWdgpGb5shtijVD9/18+VzwVas nVO3FjgThV/4NoaY9UlpVfE0zoqKvCs/8/d24e9tPNRWWtIrz4qX0faSgPxy/Qngx+B8PsdeQBQEv SeIEcPI1AFxJxsrgGeSBnWD4XlJHLvfXWlY8jHl/vGqU579nBH/xYcOx3O/EFzXQPOTgwGQA+PreR J3HSa9kQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rl32s-0000000HB7P-0eOQ; Fri, 15 Mar 2024 08:36:06 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rl32o-0000000HB3e-1zYM for linux-mediatek@lists.infradead.org; Fri, 15 Mar 2024 08:36:04 +0000 X-UUID: 0d075d46e2a711eeacdb61a41848c7d2-20240315 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=oeAzBoL9EBJWz2qwI3onG0bmYDXNeq0oJ9wAQA83NiU=; b=BQwlOg/vzUrx94EIV+M8Xy3K9V0Zz/NZ1+oKlxHL/7FFGAosTB1tESfH4e/eaUnQMtWDZpt2jN3cRIMRofmoofxFnKPEqe5WtzjkPqWJ52iNSnhjmjWWLjoggKcoIosQUJWMBewI9bNC+HpsAc31dYM5MxFlW27i1c8Zic6FsLc=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.37,REQID:16f09b58-9c3e-47db-9c7d-c772b5e06227,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:6f543d0,CLOUDID:c3e98981-4f93-4875-95e7-8c66ea833d57,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES :1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 0d075d46e2a711eeacdb61a41848c7d2-20240315 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 981904574; Fri, 15 Mar 2024 01:36:00 -0700 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 15 Mar 2024 16:34:51 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 15 Mar 2024 16:34:51 +0800 From: To: , , , , CC: , , , , , , , , , , , , , , Subject: [PATCH v2 6/7] ufs: host: mediatek: support mphy reset Date: Fri, 15 Mar 2024 16:34:47 +0800 Message-ID: <20240315083448.7185-7-peter.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240315083448.7185-1-peter.wang@mediatek.com> References: <20240315083448.7185-1-peter.wang@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--3.982300-8.000000 X-TMASE-MatchedRID: pO+4S45NqGgMQLXc2MGSbHTnOygHVQpOKx5ICGp/WtE1LB46LFAAklO4 BD7nLMxnlTJXKqh1ne0FNz4MVU+iBPDZOKmFLlvIVU3yVpaj3Qz0O7M3lSnTWxqB+wKK9uZeQmZ 9+1UBYL38s+61e4dE7OM+w5me8ld4HxPMjOKY7A81yT2WGspnOMRB0bsfrpPI34T9cYMsdwyovi qi0Ulcpy5jTX93RJHTezxWo31ggUESo09hC/CfsnPSd/w3TEtqlekI0xnK/LEfJy08VBayAmYo2 UxAR0dC/jgY96F76fmOh+wyNBrFXDJiNuKohDcKzKSG3JdyKAPqtV2AGMNPaiHWPYzouJUy X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--3.982300-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 868B550B241EF93FD85E393556C72F669E959B90092E606A820678E1BB2C1F762000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240315_013602_546344_3635DBE0 X-CRM114-Status: GOOD ( 14.75 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Peter Wang This patch will reset mphy when host reset. Backup mphy setting after mphy reset control get. Restore mphy setting after mphy reset. Acked-by: Chun-Hung Wu Signed-off-by: Peter Wang --- drivers/ufs/host/ufs-mediatek-sip.h | 9 ++++++++- drivers/ufs/host/ufs-mediatek.c | 14 ++++++++++++++ drivers/ufs/host/ufs-mediatek.h | 1 + 3 files changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/ufs/host/ufs-mediatek-sip.h b/drivers/ufs/host/ufs-mediatek-sip.h index c26513aedee3..caeb70a6ae83 100755 --- a/drivers/ufs/host/ufs-mediatek-sip.h +++ b/drivers/ufs/host/ufs-mediatek-sip.h @@ -19,7 +19,7 @@ #define UFS_MTK_SIP_SRAM_PWR_CTRL BIT(5) #define UFS_MTK_SIP_GET_VCC_NUM BIT(6) #define UFS_MTK_SIP_DEVICE_PWR_CTRL BIT(7) - +#define UFS_MTK_SIP_MPHY_CTRL BIT(8) /* * Multi-VCC by Numbering @@ -31,6 +31,10 @@ enum ufs_mtk_vcc_num { UFS_VCC_MAX }; +enum ufs_mtk_mphy_op { + UFS_MPHY_BACKUP = 0, + UFS_MPHY_RESTORE +}; /* * SMC call wrapper function @@ -80,4 +84,7 @@ static inline void _ufs_mtk_smc(struct ufs_mtk_smc_arg s) #define ufs_mtk_device_pwr_ctrl(on, ufs_version, res) \ ufs_mtk_smc(UFS_MTK_SIP_DEVICE_PWR_CTRL, &(res), on, ufs_version) +#define ufs_mtk_mphy_ctrl(op, res) \ + ufs_mtk_smc(UFS_MTK_SIP_MPHY_CTRL, &(res), op) + #endif /* !_UFS_MEDIATEK_SIP_H */ diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c index 90523652a6fb..a18978060c77 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -185,16 +185,23 @@ static void ufs_mtk_crypto_enable(struct ufs_hba *hba) static void ufs_mtk_host_reset(struct ufs_hba *hba) { struct ufs_mtk_host *host = ufshcd_get_variant(hba); + struct arm_smccc_res res; reset_control_assert(host->hci_reset); reset_control_assert(host->crypto_reset); reset_control_assert(host->unipro_reset); + reset_control_assert(host->mphy_reset); usleep_range(100, 110); reset_control_deassert(host->unipro_reset); reset_control_deassert(host->crypto_reset); reset_control_deassert(host->hci_reset); + reset_control_deassert(host->mphy_reset); + + /* restore mphy setting aftre mphy reset */ + if (host->mphy_reset) + ufs_mtk_mphy_ctrl(UFS_MPHY_RESTORE, res); } static void ufs_mtk_init_reset_control(struct ufs_hba *hba, @@ -219,6 +226,8 @@ static void ufs_mtk_init_reset(struct ufs_hba *hba) "unipro_rst"); ufs_mtk_init_reset_control(hba, &host->crypto_reset, "crypto_rst"); + ufs_mtk_init_reset_control(hba, &host->mphy_reset, + "mphy_rst"); } static int ufs_mtk_hce_enable_notify(struct ufs_hba *hba, @@ -918,6 +927,7 @@ static int ufs_mtk_init(struct ufs_hba *hba) struct device *dev = hba->dev; struct ufs_mtk_host *host; int err = 0; + struct arm_smccc_res res; host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL); if (!host) { @@ -946,6 +956,10 @@ static int ufs_mtk_init(struct ufs_hba *hba) ufs_mtk_init_reset(hba); + /* backup mphy setting if mphy can reset */ + if (host->mphy_reset) + ufs_mtk_mphy_ctrl(UFS_MPHY_BACKUP, res); + /* Enable runtime autosuspend */ hba->caps |= UFSHCD_CAP_RPM_AUTOSUSPEND; diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h index 9226e95c4a60..eb3744ae3a42 100644 --- a/drivers/ufs/host/ufs-mediatek.h +++ b/drivers/ufs/host/ufs-mediatek.h @@ -167,6 +167,7 @@ struct ufs_mtk_host { struct reset_control *hci_reset; struct reset_control *unipro_reset; struct reset_control *crypto_reset; + struct reset_control *mphy_reset; struct ufs_hba *hba; struct ufs_mtk_crypt_cfg *crypt; struct ufs_mtk_clk mclk; From patchwork Fri Mar 15 08:34:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UGV0ZXIgV2FuZyAo546L5L+h5Y+LKQ==?= X-Patchwork-Id: 13593164 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EDE13C54E69 for ; Fri, 15 Mar 2024 08:36:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ecMA01LP50J6lRFqtYdENU85JQZaLx7qJ7aeFXH0xqQ=; b=RCOKeIY0SbDFnCxEqQLm/4Pv69 4ArXh+SFc4CKoz7oiWVeGuU/eQJ3YW+C5+bVBWf7TtG862rSspkJ04DCF9Vt1scr9oSBQg7lbiR/p 4pmR3SEdkxmHcGoM3wj8n0bceFTlHmKqtVvW40ncU8NMdHK1YYmVkL2FMG8F8BOn74NTlTkcO12qE JF78FaJWl7SchppFT2vZ6b9kX8wigzucF0yzfAuOZOACivk8YsJsGhnwCI0sssVP14cVfbvVI3Yj5 kMgoHf9rwph4d97R4rQ0rFTN1JmWTLfFTlp2TzLUCW3Qu+ehZufXN7g0nNt0aa1AA81y1mXaqEYsv V7pF9nBA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rl32s-0000000HB7u-2Y81; Fri, 15 Mar 2024 08:36:06 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rl32o-0000000HB2p-11OG for linux-mediatek@lists.infradead.org; Fri, 15 Mar 2024 08:36:04 +0000 X-UUID: 0c968f08e2a711eeacdb61a41848c7d2-20240315 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=ecMA01LP50J6lRFqtYdENU85JQZaLx7qJ7aeFXH0xqQ=; b=Xn8GUyV+cSfhGY8/egYBB5JK6tS+eKLlp+Ih87l1qrbGSSTWQabDTinfU3y6+TWrO3gN6Lpy0Fh6qL2pnztHENkFMsgfl5dXVqFm2ukpUKXk+/Dndu237LZQw9RnDpvjNr+oBJFsJrscbxg2rOPCE8+0HcEzbc+GIRHUFS3Mwes=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.37,REQID:a632a4a9-5812-48cc-9ae8-17fee0285c38,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:6f543d0,CLOUDID:99430a85-8d4f-477b-89d2-1e3bdbef96d1,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES :1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 0c968f08e2a711eeacdb61a41848c7d2-20240315 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 2066824345; Fri, 15 Mar 2024 01:35:59 -0700 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 15 Mar 2024 16:34:51 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 15 Mar 2024 16:34:51 +0800 From: To: , , , , CC: , , , , , , , , , , , , , , Subject: [PATCH v2 7/7] ufs: host: mediatek: support rtff in PM flow Date: Fri, 15 Mar 2024 16:34:48 +0800 Message-ID: <20240315083448.7185-8-peter.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240315083448.7185-1-peter.wang@mediatek.com> References: <20240315083448.7185-1-peter.wang@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--5.756500-8.000000 X-TMASE-MatchedRID: +k55+NgUc6Y1vivz3L6ga2NW0DAjL5p+zqP/yfxANUEXdhT0BAdFznB4 4IkzjfYylTJXKqh1ne0FNz4MVU+iBBgEuFFWa742l1zsjZ1/6axezmeoa8MJ819eTSR8I6duIub j9bOa7Mt6G/iBW18et3tNt2X25HGOfmIXcnp2U88SEYfcJF0pRRv1UCk/2TUEfmBSyEqHyB82R9 SMlLpezOLzNWBegCW2wgn7iDBesS3CttcwYNipX3i4XEoPXecxWHaGPdLLJclsHFt677ncFWEaV JBK6IktvLtmQPPQ8Wk= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--5.756500-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 6E089987526F8DCC015C342EDBECA6167FE36F069BBE819426C5E8EABE8B47B12000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240315_013602_295128_AF950DD8 X-CRM114-Status: GOOD ( 12.21 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Alice Chao Add mtcmos control function and config. Reviewed-by: Peter Wang Acked-by: Chun-Hung Wu Signed-off-by: Peter Wang Signed-off-by: Alice Chao --- drivers/ufs/host/ufs-mediatek-sip.h | 4 ++++ drivers/ufs/host/ufs-mediatek.c | 35 +++++++++++++++++++++++++++++ drivers/ufs/host/ufs-mediatek.h | 2 ++ 3 files changed, 41 insertions(+) diff --git a/drivers/ufs/host/ufs-mediatek-sip.h b/drivers/ufs/host/ufs-mediatek-sip.h index caeb70a6ae83..7d17aedf6fb8 100755 --- a/drivers/ufs/host/ufs-mediatek-sip.h +++ b/drivers/ufs/host/ufs-mediatek-sip.h @@ -20,6 +20,7 @@ #define UFS_MTK_SIP_GET_VCC_NUM BIT(6) #define UFS_MTK_SIP_DEVICE_PWR_CTRL BIT(7) #define UFS_MTK_SIP_MPHY_CTRL BIT(8) +#define UFS_MTK_SIP_MTCMOS_CTRL BIT(9) /* * Multi-VCC by Numbering @@ -87,4 +88,7 @@ static inline void _ufs_mtk_smc(struct ufs_mtk_smc_arg s) #define ufs_mtk_mphy_ctrl(op, res) \ ufs_mtk_smc(UFS_MTK_SIP_MPHY_CTRL, &(res), op) +#define ufs_mtk_mtcmos_ctrl(op, res) \ + ufs_mtk_smc(UFS_MTK_SIP_MTCMOS_CTRL, &(res), op) + #endif /* !_UFS_MEDIATEK_SIP_H */ diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c index a18978060c77..1629323df6cb 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -127,6 +127,13 @@ static bool ufs_mtk_is_tx_skew_fix(struct ufs_hba *hba) return (host->caps & UFS_MTK_CAP_TX_SKEW_FIX); } +static bool ufs_mtk_is_rtff_mtcmos(struct ufs_hba *hba) +{ + struct ufs_mtk_host *host = ufshcd_get_variant(hba); + + return (host->caps & UFS_MTK_CAP_RTFF_MTCMOS); +} + static bool ufs_mtk_is_allow_vccqx_lpm(struct ufs_hba *hba) { struct ufs_mtk_host *host = ufshcd_get_variant(hba); @@ -653,6 +660,9 @@ static void ufs_mtk_init_host_caps(struct ufs_hba *hba) if (of_property_read_bool(np, "mediatek,ufs-disable-mcq")) host->caps |= UFS_MTK_CAP_DISABLE_MCQ; + if (of_property_read_bool(np, "mediatek,ufs-rtff-mtcmos")) + host->caps |= UFS_MTK_CAP_RTFF_MTCMOS; + dev_info(hba->dev, "caps: 0x%x", host->caps); } @@ -993,6 +1003,15 @@ static int ufs_mtk_init(struct ufs_hba *hba) * Enable phy clocks specifically here. */ ufs_mtk_mphy_power_on(hba, true); + + if (ufs_mtk_is_rtff_mtcmos(hba)) { + /* First Restore here, to avoid backup unexpected value */ + ufs_mtk_mtcmos_ctrl(false, res); + + /* Power on to init */ + ufs_mtk_mtcmos_ctrl(true, res); + } + ufs_mtk_setup_clocks(hba, true, POST_CHANGE); host->ip_ver = ufshcd_readl(hba, REG_UFS_MTK_IP_VER); @@ -1823,6 +1842,7 @@ static void ufs_mtk_remove(struct platform_device *pdev) static int ufs_mtk_system_suspend(struct device *dev) { struct ufs_hba *hba = dev_get_drvdata(dev); + struct arm_smccc_res res; int ret; ret = ufshcd_system_suspend(dev); @@ -1831,15 +1851,22 @@ static int ufs_mtk_system_suspend(struct device *dev) ufs_mtk_dev_vreg_set_lpm(hba, true); + if (ufs_mtk_is_rtff_mtcmos(hba)) + ufs_mtk_mtcmos_ctrl(false, res); + return 0; } static int ufs_mtk_system_resume(struct device *dev) { struct ufs_hba *hba = dev_get_drvdata(dev); + struct arm_smccc_res res; ufs_mtk_dev_vreg_set_lpm(hba, false); + if (ufs_mtk_is_rtff_mtcmos(hba)) + ufs_mtk_mtcmos_ctrl(true, res); + return ufshcd_system_resume(dev); } #endif @@ -1848,6 +1875,7 @@ static int ufs_mtk_system_resume(struct device *dev) static int ufs_mtk_runtime_suspend(struct device *dev) { struct ufs_hba *hba = dev_get_drvdata(dev); + struct arm_smccc_res res; int ret = 0; ret = ufshcd_runtime_suspend(dev); @@ -1856,12 +1884,19 @@ static int ufs_mtk_runtime_suspend(struct device *dev) ufs_mtk_dev_vreg_set_lpm(hba, true); + if (ufs_mtk_is_rtff_mtcmos(hba)) + ufs_mtk_mtcmos_ctrl(false, res); + return 0; } static int ufs_mtk_runtime_resume(struct device *dev) { struct ufs_hba *hba = dev_get_drvdata(dev); + struct arm_smccc_res res; + + if (ufs_mtk_is_rtff_mtcmos(hba)) + ufs_mtk_mtcmos_ctrl(true, res); ufs_mtk_dev_vreg_set_lpm(hba, false); diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h index eb3744ae3a42..bb314e4fa293 100644 --- a/drivers/ufs/host/ufs-mediatek.h +++ b/drivers/ufs/host/ufs-mediatek.h @@ -132,6 +132,8 @@ enum ufs_mtk_host_caps { UFS_MTK_CAP_PMC_VIA_FASTAUTO = 1 << 6, UFS_MTK_CAP_TX_SKEW_FIX = 1 << 7, UFS_MTK_CAP_DISABLE_MCQ = 1 << 8, + /* Control MTCMOS with RTFF */ + UFS_MTK_CAP_RTFF_MTCMOS = 1 << 9, }; struct ufs_mtk_crypt_cfg {