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Acked-by: Krzysztof Kozlowski Signed-off-by: Xu Yang --- Changes in v3: - new patch due to missed this little one Changes in v4: - no changes Changes in v5: - add Acked-by tag Changes in v6: - no changes Changes in v7: - no changes Changes in v8: - no changes Changes in v9: - no changes Changes in v10: - no changes --- Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml b/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml index 2d3589d284b2..0a6e7ac1b37e 100644 --- a/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml +++ b/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml @@ -33,6 +33,7 @@ properties: - fsl,imx7ulp-usbmisc - fsl,imx8mm-usbmisc - fsl,imx8mn-usbmisc + - fsl,imx8ulp-usbmisc - const: fsl,imx7d-usbmisc - const: fsl,imx6q-usbmisc - items: From patchwork Thu Mar 21 08:14:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xu Yang X-Patchwork-Id: 13598456 Received: from EUR04-VI1-obe.outbound.protection.outlook.com (mail-vi1eur04on2050.outbound.protection.outlook.com [40.107.8.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B3A7F5B1E9 for ; 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Signed-off-by: Xu Yang --- Changes in v2: - no changes Changes in v3: - no changes Changes in v4: - no changes Changes in v5: - no changes Changes in v6: - drop usbphy aliases Changes in v7: - no changes Changes in v8: - no changes Changes in v9: - no changes Changes in v10: - no changes --- arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 62 ++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index c4a0082f30d3..7da9461a5745 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -472,6 +472,68 @@ usdhc2: mmc@298f0000 { status = "disabled"; }; + usbotg1: usb@29900000 { + compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb"; + reg = <0x29900000 0x200>; + interrupts = ; + clocks = <&pcc4 IMX8ULP_CLK_USB0>; + power-domains = <&scmi_devpd IMX8ULP_PD_USB0>; + phys = <&usbphy1>; + fsl,usbmisc = <&usbmisc1 0>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x8>; + rx-burst-size-dword = <0x8>; + status = "disabled"; + }; + + usbmisc1: usbmisc@29900200 { + compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc", + "fsl,imx6q-usbmisc"; + #index-cells = <1>; + reg = <0x29900200 0x200>; + status = "disabled"; + }; + + usbphy1: usb-phy@29910000 { + compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy"; + reg = <0x29910000 0x10000>; + interrupts = ; + clocks = <&pcc4 IMX8ULP_CLK_USB0_PHY>; + #phy-cells = <0>; + status = "disabled"; + }; + + usbotg2: usb@29920000 { + compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb"; + reg = <0x29920000 0x200>; + interrupts = ; + clocks = <&pcc4 IMX8ULP_CLK_USB1>; + power-domains = <&scmi_devpd IMX8ULP_PD_USDHC2_USB1>; + phys = <&usbphy2>; + fsl,usbmisc = <&usbmisc2 0>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x8>; + rx-burst-size-dword = <0x8>; + status = "disabled"; + }; + + usbmisc2: usbmisc@29920200 { + compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc", + "fsl,imx6q-usbmisc"; + #index-cells = <1>; + reg = <0x29920200 0x200>; + status = "disabled"; + }; + + usbphy2: usb-phy@29930000 { + compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy"; + reg = <0x29930000 0x10000>; + interrupts = ; + clocks = <&pcc4 IMX8ULP_CLK_USB1_PHY>; + #phy-cells = <0>; + status = "disabled"; + }; + fec: ethernet@29950000 { compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec"; reg = <0x29950000 0x10000>; From patchwork Thu Mar 21 08:14:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xu Yang X-Patchwork-Id: 13598457 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2066.outbound.protection.outlook.com [40.107.21.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 49A966A8DD for ; Thu, 21 Mar 2024 08:14:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Signed-off-by: Xu Yang --- Changes in v2: - fix format as suggusted by Fabio - add PTN5150 nodes Changes in v3: - no changes Changes in v4: - no changes Changes in v5: - no changes Changes in v6: - no changes Changes in v7: - no changes Changes in v8: - no changes Changes in v9: - no changes Changes in v10: - no changes --- arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 84 +++++++++++++++++++ 1 file changed, 84 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts index 69dd8e31027c..bf418af31039 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts @@ -133,6 +133,64 @@ pcal6408: gpio@21 { gpio-controller; #gpio-cells = <2>; }; + + ptn5150_1: typec@1d { + compatible = "nxp,ptn5150"; + reg = <0x1d>; + int-gpios = <&gpiof 3 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_typec1>; + status = "disabled"; + }; + + ptn5150_2: typec@3d { + compatible = "nxp,ptn5150"; + reg = <0x3d>; + int-gpios = <&gpiof 5 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_typec2>; + status = "disabled"; + }; +}; + +&usbotg1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1>; + dr_mode = "otg"; + hnp-disable; + srp-disable; + adp-disable; + over-current-active-low; + status = "okay"; +}; + +&usbphy1 { + fsl,tx-d-cal = <110>; + status = "okay"; +}; + +&usbmisc1 { + status = "okay"; +}; + +&usbotg2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb2>; + dr_mode = "otg"; + hnp-disable; + srp-disable; + adp-disable; + over-current-active-low; + status = "okay"; +}; + +&usbphy2 { + fsl,tx-d-cal = <110>; + status = "okay"; +}; + +&usbmisc2 { + status = "okay"; }; &usdhc0 { @@ -224,6 +282,32 @@ MX8ULP_PAD_PTE13__LPI2C7_SDA 0x20 >; }; + pinctrl_typec1: typec1grp { + fsl,pins = < + MX8ULP_PAD_PTF3__PTF3 0x3 + >; + }; + + pinctrl_typec2: typec2grp { + fsl,pins = < + MX8ULP_PAD_PTF5__PTF5 0x3 + >; + }; + + pinctrl_usb1: usb1grp { + fsl,pins = < + MX8ULP_PAD_PTF2__USB0_ID 0x10003 + MX8ULP_PAD_PTF4__USB0_OC 0x10003 + >; + }; + + pinctrl_usb2: usb2grp { + fsl,pins = < + MX8ULP_PAD_PTD23__USB1_ID 0x10003 + MX8ULP_PAD_PTF6__USB1_OC 0x10003 + >; + }; + pinctrl_usdhc0: usdhc0grp { fsl,pins = < MX8ULP_PAD_PTD1__SDHC0_CMD 0x3 From patchwork Thu Mar 21 08:14:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xu Yang X-Patchwork-Id: 13598458 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2061.outbound.protection.outlook.com [40.107.21.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5627D58AD6 for ; Thu, 21 Mar 2024 08:14:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.21.61 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711008887; cv=fail; b=fbHGHBJ4q89K9hIgfpkfaLROVUgez6FwxMvRLGlNcE3yUM+eR2j3fgbFTT1ujq7sVYnHTQ1KzPfn5Qn3PSQlWkWE1jKGCbgqvfVPjtiKedqwEYMUaGTOXeCfPx1GSGD26oyIYRVk88Xg7Ue/lnjMU7z9OuBaItL3ERIDNEo9COg= ARC-Message-Signature: i=2; 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Thu, 21 Mar 2024 08:14:40 +0000 From: Xu Yang To: gregkh@linuxfoundation.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, conor+dt@kernel.org Cc: s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, peter.chen@kernel.org, xu.yang_2@nxp.com, jun.li@nxp.com, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v10 04/11] dt-bindings: usb: chipidea,usb2-imx: move imx parts to dedicated schema Date: Thu, 21 Mar 2024 16:14:32 +0800 Message-Id: <20240321081439.541799-4-xu.yang_2@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240321081439.541799-1-xu.yang_2@nxp.com> References: <20240321081439.541799-1-xu.yang_2@nxp.com> X-ClientProxiedBy: SG2PR02CA0022.apcprd02.prod.outlook.com (2603:1096:3:17::34) To DU2PR04MB8822.eurprd04.prod.outlook.com (2603:10a6:10:2e1::11) Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU2PR04MB8822:EE_|AS8PR04MB9191:EE_ X-MS-Office365-Filtering-Correlation-Id: 3b7b1dd6-ce96-400f-7193-08dc497ef4bc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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This will separate i.MX parts out of ci-hdrc-usb2.yaml and add a new schema for NXP ChipIdea USB2 Controller, also add a common schema. 1. Copy common ci-hdrc-usb2.yaml properties to a new shared chipidea,usb2-common.yaml schema. 2. Move fsl,* compatible devices and imx spefific properties to dedicated binding file chipidea,usb2-imx.yaml. Reviewed-by: Rob Herring Signed-off-by: Xu Yang --- Changes in v6: - new patch Changes in v7: - not remove ci-hdrc-usb2.yaml and move imx parts to ci-hdrc-usb2-imx.yaml Changes in v8: - rename yaml name to chipidea,usb2-common.yaml and chipidea,usb2-imx.yaml - remove common properties from ci-hdrc-usb2.yaml - add new end line to chipidea,usb2-common.yaml - remove fsl,anatop since it's not needed by controller - fix pinctrl-names formats Changes in v9: - add Rb tag Changes in v10: - no changes --- .../bindings/usb/chipidea,usb2-common.yaml | 200 ++++++++++ .../bindings/usb/chipidea,usb2-imx.yaml | 193 ++++++++++ .../devicetree/bindings/usb/ci-hdrc-usb2.yaml | 360 +----------------- 3 files changed, 396 insertions(+), 357 deletions(-) create mode 100644 Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml create mode 100644 Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml diff --git a/Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml b/Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml new file mode 100644 index 000000000000..d2a7d2ecf48a --- /dev/null +++ b/Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml @@ -0,0 +1,200 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/chipidea,usb2-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: USB2 ChipIdea USB controller Common Properties + +maintainers: + - Xu Yang + +properties: + reg: + minItems: 1 + maxItems: 2 + + interrupts: + minItems: 1 + maxItems: 2 + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + minItems: 1 + maxItems: 3 + + dr_mode: true + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + reset-names: + maxItems: 1 + + "#reset-cells": + const: 1 + + phy_type: true + + itc-setting: + description: + interrupt threshold control register control, the setting should be + aligned with ITC bits at register USBCMD. + $ref: /schemas/types.yaml#/definitions/uint32 + + ahb-burst-config: + description: + it is vendor dependent, the required value should be aligned with + AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This property is + used to change AHB burst configuration, check the chipidea spec for + meaning of each value. If this property is not existed, it will use + the reset value. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0x0 + maximum: 0x7 + + tx-burst-size-dword: + description: + it is vendor dependent, the tx burst size in dword (4 bytes), This + register represents the maximum length of a the burst in 32-bit + words while moving data from system memory to the USB bus, the value + of this property will only take effect if property "ahb-burst-config" + is set to 0, if this property is missing the reset default of the + hardware implementation will be used. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0x0 + maximum: 0x20 + + rx-burst-size-dword: + description: + it is vendor dependent, the rx burst size in dword (4 bytes), This + register represents the maximum length of a the burst in 32-bit words + while moving data from the USB bus to system memory, the value of + this property will only take effect if property "ahb-burst-config" + is set to 0, if this property is missing the reset default of the + hardware implementation will be used. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0x0 + maximum: 0x20 + + extcon: + description: + Phandles to external connector devices. First phandle should point + to external connector, which provide "USB" cable events, the second + should point to external connector device, which provide "USB-HOST" + cable events. If one of the external connector devices is not + required, empty <0> phandle should be specified. + $ref: /schemas/types.yaml#/definitions/phandle-array + minItems: 1 + items: + - description: vbus extcon + - description: id extcon + + phy-clkgate-delay-us: + description: + The delay time (us) between putting the PHY into low power mode and + gating the PHY clock. + + non-zero-ttctrl-ttha: + description: + After setting this property, the value of register ttctrl.ttha + will be 0x7f; if not, the value will be 0x0, this is the default + value. It needs to be very carefully for setting this property, it + is recommended that consult with your IC engineer before setting + this value. On the most of chipidea platforms, the "usage_tt" flag + at RTL is 0, so this property only affects siTD. + + If this property is not set, the max packet size is 1023 bytes, and + if the total of packet size for previous transactions are more than + 256 bytes, it can't accept any transactions within this frame. The + use case is single transaction, but higher frame rate. + + If this property is set, the max packet size is 188 bytes, it can + handle more transactions than above case, it can accept transactions + until it considers the left room size within frame is less than 188 + bytes, software needs to make sure it does not send more than 90% + maximum_periodic_data_per_frame. The use case is multiple + transactions, but less frame rate. + type: boolean + + mux-controls: + description: + The mux control for toggling host/device output of this controller. + It's expected that a mux state of 0 indicates device mode and a mux + state of 1 indicates host mode. + maxItems: 1 + + mux-control-names: + const: usb_switch + + pinctrl-names: + description: + Names for optional pin modes in "default", "host", "device". + In case of HSIC-mode, "idle" and "active" pin modes are mandatory. + In this case, the "idle" state needs to pull down the data and + strobe pin and the "active" state needs to pull up the strobe pin. + oneOf: + - items: + - const: idle + - const: active + - items: + - const: default + - const: host + - const: device + - items: + - const: default + - enum: + - host + - device + - items: + - const: default + + pinctrl-0: + maxItems: 1 + + pinctrl-1: + maxItems: 1 + + phys: + maxItems: 1 + + phy-names: + const: usb-phy + + vbus-supply: + description: reference to the VBUS regulator. + + usb-phy: + description: phandle for the PHY device. Use "phys" instead. + maxItems: 1 + deprecated: true + + port: + description: + Any connector to the data bus of this controller should be modelled + using the OF graph bindings specified, if the "usb-role-switch" + property is used. + $ref: /schemas/graph.yaml#/properties/port + + reset-gpios: + maxItems: 1 + +dependencies: + port: [ usb-role-switch ] + mux-controls: [ mux-control-names ] + +required: + - reg + - interrupts + +allOf: + - $ref: usb-hcd.yaml# + - $ref: usb-drd.yaml# + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml new file mode 100644 index 000000000000..cdbb224e9f68 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml @@ -0,0 +1,193 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/chipidea,usb2-imx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP USB2 ChipIdea USB controller + +maintainers: + - Xu Yang + +properties: + compatible: + oneOf: + - enum: + - fsl,imx27-usb + - items: + - enum: + - fsl,imx23-usb + - fsl,imx25-usb + - fsl,imx28-usb + - fsl,imx35-usb + - fsl,imx50-usb + - fsl,imx51-usb + - fsl,imx53-usb + - fsl,imx6q-usb + - fsl,imx6sl-usb + - fsl,imx6sx-usb + - fsl,imx6ul-usb + - fsl,imx7d-usb + - fsl,vf610-usb + - const: fsl,imx27-usb + - items: + - enum: + - fsl,imx8dxl-usb + - fsl,imx8ulp-usb + - const: fsl,imx7ulp-usb + - const: fsl,imx6ul-usb + - items: + - enum: + - fsl,imx8mm-usb + - fsl,imx8mn-usb + - const: fsl,imx7d-usb + - const: fsl,imx27-usb + - items: + - enum: + - fsl,imx6sll-usb + - fsl,imx7ulp-usb + - const: fsl,imx6ul-usb + - const: fsl,imx27-usb + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + minItems: 1 + maxItems: 3 + + fsl,usbmisc: + description: + Phandler of non-core register device, with one argument that + indicate usb controller index + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to usbmisc node + - description: index of usb controller + + disable-over-current: + type: boolean + description: disable over current detect + + over-current-active-low: + type: boolean + description: over current signal polarity is active low + + over-current-active-high: + type: boolean + description: + Over current signal polarity is active high. It's recommended to + specify the over current polarity. + + power-active-high: + type: boolean + description: power signal polarity is active high + + external-vbus-divider: + type: boolean + description: enables off-chip resistor divider for Vbus + + samsung,picophy-pre-emp-curr-control: + description: + HS Transmitter Pre-Emphasis Current Control. This signal controls + the amount of current sourced to the USB_OTG*_DP and USB_OTG*_DN + pins after a J-to-K or K-to-J transition. The range is from 0x0 to + 0x3, the default value is 0x1. Details can refer to TXPREEMPAMPTUNE0 + bits of USBNC_n_PHY_CFG1. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0x0 + maximum: 0x3 + + samsung,picophy-dc-vol-level-adjust: + description: + HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC + level voltage. The range is from 0x0 to 0xf, the default value is + 0x3. Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0x0 + maximum: 0xf + + fsl,picophy-rise-fall-time-adjust: + description: + HS Transmitter Rise/Fall Time Adjustment. Adjust the rise/fall times + of the high-speed transmitter waveform. It has no unit. The rise/fall + time will be increased or decreased by a certain percentage relative + to design default time. (0:-10%; 1:design default; 2:+15%; 3:+20%) + Details can refer to TXRISETUNE0 bit of USBNC_n_PHY_CFG1. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3 + default: 1 + + fsl,usbphy: + description: phandle of usb phy that connects to the port. Use "phys" instead. + $ref: /schemas/types.yaml#/definitions/phandle + deprecated: true + +required: + - compatible + +allOf: + - $ref: chipidea,usb2-common.yaml# + - if: + properties: + phy_type: + const: hsic + required: + - phy_type + then: + properties: + pinctrl-names: + items: + - const: idle + - const: active + +unevaluatedProperties: false + +examples: + - | + #include + #include + + usb@30b10000 { + compatible = "fsl,imx7d-usb", "fsl,imx27-usb"; + reg = <0x30b10000 0x200>; + interrupts = ; + clocks = <&clks IMX7D_USB_CTRL_CLK>; + fsl,usbphy = <&usbphynop1>; + fsl,usbmisc = <&usbmisc1 0>; + phy-clkgate-delay-us = <400>; + }; + + # Example for HSIC: + - | + #include + #include + + usb@2184400 { + compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; + reg = <0x02184400 0x200>; + interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_USBOH3>; + fsl,usbphy = <&usbphynop1>; + fsl,usbmisc = <&usbmisc 2>; + phy_type = "hsic"; + dr_mode = "host"; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x10>; + rx-burst-size-dword = <0x10>; + pinctrl-names = "idle", "active"; + pinctrl-0 = <&pinctrl_usbh2_idle>; + pinctrl-1 = <&pinctrl_usbh2_active>; + #address-cells = <1>; + #size-cells = <0>; + + ethernet@1 { + compatible = "usb424,9730"; + reg = <1>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml index 3b56e0edb1c6..cc5787a8cfa3 100644 --- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml +++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml @@ -15,7 +15,6 @@ properties: oneOf: - enum: - chipidea,usb2 - - fsl,imx27-usb - lsi,zevio-usb - nuvoton,npcm750-udc - nvidia,tegra20-ehci @@ -31,40 +30,6 @@ properties: - nvidia,tegra124-ehci - nvidia,tegra210-ehci - const: nvidia,tegra30-ehci - - items: - - enum: - - fsl,imx23-usb - - fsl,imx25-usb - - fsl,imx28-usb - - fsl,imx35-usb - - fsl,imx50-usb - - fsl,imx51-usb - - fsl,imx53-usb - - fsl,imx6q-usb - - fsl,imx6sl-usb - - fsl,imx6sx-usb - - fsl,imx6ul-usb - - fsl,imx7d-usb - - fsl,vf610-usb - - const: fsl,imx27-usb - - items: - - enum: - - fsl,imx8dxl-usb - - fsl,imx8ulp-usb - - const: fsl,imx7ulp-usb - - const: fsl,imx6ul-usb - - items: - - enum: - - fsl,imx8mm-usb - - fsl,imx8mn-usb - - const: fsl,imx7d-usb - - const: fsl,imx27-usb - - items: - - enum: - - fsl,imx6sll-usb - - fsl,imx7ulp-usb - - const: fsl,imx6ul-usb - - const: fsl,imx27-usb - items: - const: xlnx,zynq-usb-2.20a - const: chipidea,usb2 @@ -73,163 +38,18 @@ properties: - nuvoton,npcm845-udc - const: nuvoton,npcm750-udc - reg: - minItems: 1 - maxItems: 2 - - interrupts: - minItems: 1 - maxItems: 2 - clocks: minItems: 1 - maxItems: 3 + maxItems: 2 clock-names: minItems: 1 - maxItems: 3 - - dr_mode: true - - power-domains: - maxItems: 1 - - resets: - maxItems: 1 - - reset-names: - maxItems: 1 - - "#reset-cells": - const: 1 - - phy_type: true - - itc-setting: - description: - interrupt threshold control register control, the setting should be - aligned with ITC bits at register USBCMD. - $ref: /schemas/types.yaml#/definitions/uint32 - - ahb-burst-config: - description: - it is vendor dependent, the required value should be aligned with - AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This property is - used to change AHB burst configuration, check the chipidea spec for - meaning of each value. If this property is not existed, it will use - the reset value. - $ref: /schemas/types.yaml#/definitions/uint32 - minimum: 0x0 - maximum: 0x7 - - tx-burst-size-dword: - description: - it is vendor dependent, the tx burst size in dword (4 bytes), This - register represents the maximum length of a the burst in 32-bit - words while moving data from system memory to the USB bus, the value - of this property will only take effect if property "ahb-burst-config" - is set to 0, if this property is missing the reset default of the - hardware implementation will be used. - $ref: /schemas/types.yaml#/definitions/uint32 - minimum: 0x0 - maximum: 0x20 - - rx-burst-size-dword: - description: - it is vendor dependent, the rx burst size in dword (4 bytes), This - register represents the maximum length of a the burst in 32-bit words - while moving data from the USB bus to system memory, the value of - this property will only take effect if property "ahb-burst-config" - is set to 0, if this property is missing the reset default of the - hardware implementation will be used. - $ref: /schemas/types.yaml#/definitions/uint32 - minimum: 0x0 - maximum: 0x20 - - extcon: - description: - Phandles to external connector devices. First phandle should point - to external connector, which provide "USB" cable events, the second - should point to external connector device, which provide "USB-HOST" - cable events. If one of the external connector devices is not - required, empty <0> phandle should be specified. - $ref: /schemas/types.yaml#/definitions/phandle-array - minItems: 1 - items: - - description: vbus extcon - - description: id extcon - - phy-clkgate-delay-us: - description: - The delay time (us) between putting the PHY into low power mode and - gating the PHY clock. - - non-zero-ttctrl-ttha: - description: - After setting this property, the value of register ttctrl.ttha - will be 0x7f; if not, the value will be 0x0, this is the default - value. It needs to be very carefully for setting this property, it - is recommended that consult with your IC engineer before setting - this value. On the most of chipidea platforms, the "usage_tt" flag - at RTL is 0, so this property only affects siTD. - - If this property is not set, the max packet size is 1023 bytes, and - if the total of packet size for previous transactions are more than - 256 bytes, it can't accept any transactions within this frame. The - use case is single transaction, but higher frame rate. - - If this property is set, the max packet size is 188 bytes, it can - handle more transactions than above case, it can accept transactions - until it considers the left room size within frame is less than 188 - bytes, software needs to make sure it does not send more than 90% - maximum_periodic_data_per_frame. The use case is multiple - transactions, but less frame rate. - type: boolean - - mux-controls: - description: - The mux control for toggling host/device output of this controller. - It's expected that a mux state of 0 indicates device mode and a mux - state of 1 indicates host mode. - maxItems: 1 - - mux-control-names: - const: usb_switch + maxItems: 2 operating-points-v2: description: A phandle to the OPP table containing the performance states. $ref: /schemas/types.yaml#/definitions/phandle - pinctrl-names: - description: - Names for optional pin modes in "default", "host", "device". - In case of HSIC-mode, "idle" and "active" pin modes are mandatory. - In this case, the "idle" state needs to pull down the data and - strobe pin and the "active" state needs to pull up the strobe pin. - oneOf: - - items: - - const: idle - - const: active - - items: - - const: default - - enum: - - host - - device - - items: - - const: default - - pinctrl-0: - maxItems: 1 - - pinctrl-1: - maxItems: 1 - - phys: - maxItems: 1 - - phy-names: - const: usb-phy - phy-select: description: Phandler of TCSR node with two argument that indicate register @@ -240,87 +60,6 @@ properties: - description: register offset - description: phy index - vbus-supply: - description: reference to the VBUS regulator. - - fsl,usbmisc: - description: - Phandler of non-core register device, with one argument that - indicate usb controller index - $ref: /schemas/types.yaml#/definitions/phandle-array - items: - - items: - - description: phandle to usbmisc node - - description: index of usb controller - - fsl,anatop: - description: phandle for the anatop node. - $ref: /schemas/types.yaml#/definitions/phandle - - disable-over-current: - type: boolean - description: disable over current detect - - over-current-active-low: - type: boolean - description: over current signal polarity is active low - - over-current-active-high: - type: boolean - description: - Over current signal polarity is active high. It's recommended to - specify the over current polarity. - - power-active-high: - type: boolean - description: power signal polarity is active high - - external-vbus-divider: - type: boolean - description: enables off-chip resistor divider for Vbus - - samsung,picophy-pre-emp-curr-control: - description: - HS Transmitter Pre-Emphasis Current Control. This signal controls - the amount of current sourced to the USB_OTG*_DP and USB_OTG*_DN - pins after a J-to-K or K-to-J transition. The range is from 0x0 to - 0x3, the default value is 0x1. Details can refer to TXPREEMPAMPTUNE0 - bits of USBNC_n_PHY_CFG1. - $ref: /schemas/types.yaml#/definitions/uint32 - minimum: 0x0 - maximum: 0x3 - - samsung,picophy-dc-vol-level-adjust: - description: - HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC - level voltage. The range is from 0x0 to 0xf, the default value is - 0x3. Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1. - $ref: /schemas/types.yaml#/definitions/uint32 - minimum: 0x0 - maximum: 0xf - - fsl,picophy-rise-fall-time-adjust: - description: - HS Transmitter Rise/Fall Time Adjustment. Adjust the rise/fall times - of the high-speed transmitter waveform. It has no unit. The rise/fall - time will be increased or decreased by a certain percentage relative - to design default time. (0:-10%; 1:design default; 2:+15%; 3:+20%) - Details can refer to TXRISETUNE0 bit of USBNC_n_PHY_CFG1. - $ref: /schemas/types.yaml#/definitions/uint32 - minimum: 0 - maximum: 3 - default: 1 - - usb-phy: - description: phandle for the PHY device. Use "phys" instead. - maxItems: 1 - deprecated: true - - fsl,usbphy: - description: phandle of usb phy that connects to the port. Use "phys" instead. - $ref: /schemas/types.yaml#/definitions/phandle - deprecated: true - nvidia,phy: description: phandle of usb phy that connects to the port. Use "phys" instead. $ref: /schemas/types.yaml#/definitions/phandle @@ -331,16 +70,6 @@ properties: type: boolean deprecated: true - port: - description: - Any connector to the data bus of this controller should be modelled - using the OF graph bindings specified, if the "usb-role-switch" - property is used. - $ref: /schemas/graph.yaml#/properties/port - - reset-gpios: - maxItems: 1 - ulpi: type: object additionalProperties: false @@ -350,67 +79,13 @@ properties: type: object $ref: /schemas/phy/qcom,usb-hs-phy.yaml -dependencies: - port: [ usb-role-switch ] - mux-controls: [ mux-control-names ] - required: - compatible - - reg - - interrupts allOf: + - $ref: chipidea,usb2-common.yaml# - $ref: usb-hcd.yaml# - $ref: usb-drd.yaml# - - if: - properties: - phy_type: - const: hsic - required: - - phy_type - then: - properties: - pinctrl-names: - items: - - const: idle - - const: active - else: - properties: - pinctrl-names: - minItems: 1 - maxItems: 2 - oneOf: - - items: - - const: default - - enum: - - host - - device - - items: - - const: default - - if: - properties: - compatible: - contains: - enum: - - chipidea,usb2 - - lsi,zevio-usb - - nuvoton,npcm750-udc - - nvidia,tegra20-udc - - nvidia,tegra30-udc - - nvidia,tegra114-udc - - nvidia,tegra124-udc - - qcom,ci-hdrc - - xlnx,zynq-usb-2.20a - then: - properties: - fsl,usbmisc: false - disable-over-current: false - over-current-active-low: false - over-current-active-high: false - power-active-high: false - external-vbus-divider: false - samsung,picophy-pre-emp-curr-control: false - samsung,picophy-dc-vol-level-adjust: false unevaluatedProperties: false @@ -438,33 +113,4 @@ examples: mux-control-names = "usb_switch"; }; - # Example for HSIC: - - | - #include - #include - - usb@2184400 { - compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; - reg = <0x02184400 0x200>; - interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6QDL_CLK_USBOH3>; - fsl,usbphy = <&usbphynop1>; - fsl,usbmisc = <&usbmisc 2>; - phy_type = "hsic"; - dr_mode = "host"; - ahb-burst-config = <0x0>; - tx-burst-size-dword = <0x10>; - rx-burst-size-dword = <0x10>; - pinctrl-names = "idle", "active"; - pinctrl-0 = <&pinctrl_usbh2_idle>; - pinctrl-1 = <&pinctrl_usbh2_active>; - #address-cells = <1>; - #size-cells = <0>; - - ethernet@1 { - compatible = "usb424,9730"; - reg = <1>; - }; - }; - ... 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Reviewed-by: Rob Herring Signed-off-by: Xu Yang --- Changes in v4: - new patch since v3's discussion - split the reg, interrupts, clock and clock-names properties into common part and device-specific Changes in v5: - keep common property unchanged - make if-then more readable - remove non imx part Changes in v6: - new patch based on ci-hdrc-usb2-imx.yaml Changes in v7: - no changes Changes in v8: - remove if:else:if:else:if:else block Changes in v9: - remove maxItems - make clock-names if it's not needed Changes in v10: - add Rb tag --- .../bindings/usb/chipidea,usb2-imx.yaml | 76 +++++++++++++++++++ 1 file changed, 76 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml index cdbb224e9f68..e2eb60eaf6fe 100644 --- a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml +++ b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml @@ -49,6 +49,12 @@ properties: - const: fsl,imx6ul-usb - const: fsl,imx27-usb + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + clocks: minItems: 1 maxItems: 3 @@ -144,6 +150,76 @@ allOf: - const: idle - const: active + # imx27 Soc needs three clocks + - if: + properties: + compatible: + const: fsl,imx27-usb + then: + properties: + clocks: + minItems: 3 + clock-names: + items: + - const: ipg + - const: ahb + - const: per + + # imx25 and imx35 Soc need three clocks + - if: + properties: + compatible: + contains: + enum: + - fsl,imx25-usb + - fsl,imx35-usb + then: + properties: + clocks: + minItems: 3 + clock-names: + items: + - const: ipg + - const: ahb + - const: per + + # imx7d Soc need one clock + - if: + properties: + compatible: + items: + - const: fsl,imx7d-usb + - const: fsl,imx27-usb + then: + properties: + clocks: + maxItems: 1 + clock-names: false + + # other Soc need one clock + - if: + properties: + compatible: + contains: + enum: + - fsl,imx23-usb + - fsl,imx28-usb + - fsl,imx50-usb + - fsl,imx51-usb + - fsl,imx53-usb + - fsl,imx6q-usb + - fsl,imx6sl-usb + - fsl,imx6sx-usb + - fsl,imx6ul-usb + - fsl,imx8mm-usb + - fsl,imx8mn-usb + - fsl,vf610-usb + then: + properties: + clocks: + maxItems: 1 + clock-names: false + unevaluatedProperties: false examples: From patchwork Thu Mar 21 08:14:34 2024 Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Zu5pF77OapdPFb8/1FTNoAMvW/DpyqHRfdHudmHHseUrWjixocB9rpwvufPsYk7XhMgqKxRBXar6OHCMCp7ZBqY5syBKXwf25+oStlesf1uvKH8CkoIoCfDmgYLObB4wanyOrsKF+7I/loGQRWya8nxvf7a7Rft9/XAH5/FM+1v1bEBIGnKooS7qdyh2ehkMertRn7wi7GRjV+udunjNXUKRXhKJ8zGABKEjQqAK5+Dq7wH0NQyJrRjSMEoaas4Ui6FATotN/oD6wYWUsRhsnmjI/B87hltDRLZcuajOTdLcKIQza5jWQSOwtWBK57toH0YQ2vfY4GeRtjbEg6dZQuj0SK/HZqMf+tP7qC0DFIhvn3pyAC5MlaiGb4bbpx+OZhNuASKNs5JSBybhwbC05e+UdePu48wWqq3VfvvsJ7aSalFDjC7GW/KUgapdYEkS6l2dglmcUqzu+nBqXJVfVODLOvC+Q/ii6RDWPfbllBeihGCpH8XanWsExdM2FxdSVQgppVkTOsUVi1Qn/tRx+IXuV1vzYngMI8RD/rGIgMka8nfOcaSzRRMCinhmjwl21o3/onhXW/jbXXfPQ1E86hdbzJ2Y1PqiGrtE3ibQHnxKLAC6i4Q8wL6vLGqtBwmHsXXOhTLHfyPBssee6WjR6yic7bw3Yf1VUZzHM2JYV8NS4QigThU0CzVjn8Jh7qcFgDuQyILrCLUFMun0slbm7bdqAnKHi6wl7CGW8J37cMRfMO95M3S4vKEr2Xp8xLsX6ET0/x0WICH4NJ4+FBY2qtySaULn25t4Hev5DbMdz9LC8TZ7gLqCDDrf1h21kk1NgdBOUMhFbm/tWPl7hATynnNoA57MdlnAM6xoDimwkwOtpmxLx4o+6Xvm32G43O552b7CozFMKy9mdyd9W9NrgMrz159+DEms6KYyZ437FGoFABmg6pIJe6hI5RaNNMlM8RFDiNyptI8UUcfpTxpqsnMxsUAsYltzTmds+85xWSl6B0wzKcEutPGnSNw33Ajg1vUH+LNg00fy04KCXuWtt2+OTiCgjPqSFKDuR+u4eODGCOyuwC3YxdTH3RDL4TVamwOlKo/5ugc9MW8Oe/h9cOYpvBL2xA2DNiw6zB8UptF67A10cCuE0ysOwVmUeWzxh8pzUaqHRl5LI9/PhW/F7FHZoze62/0Jh8mAco0+hefGMUkwkTs757xp0YhdxK80Z6U8xm+EjiZgu6xJ/kjnY/uNwDGLKbmLhpLTa+/VTDjMdj27p8MPgF6thS7BMNvAxLaEv9ef34N5Gv66HhkuYyv3jFTIbi84Pko9Rws46SYZ2yOv/XKPZwnYnEUCUnKwgX+fjoPUS2DqH15gaK0Sd85oLcmKjJVkRO4vx4AJswmflmRaUjGqqsV/FLytksLYpHnpAtZoz3U9lTr9SMpxmyDiwf1j/6sPRdO+GaQCsA0S5RMkytNs7TPH9xcDtLikU2c6wq6ip/6LmiW9vmuS5Sua3u5Wra7AQ6cYz26Q0M7nZ8KafDnI6d3auppESgC2jmj4Fyf4onhb+6/5QCMfO2tDQsOP8rN3Kq6VQmbYRKci9ugRcFPTGvgbiQSBp1+S X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9aec85de-9940-4a3e-623e-08dc497efb50 X-MS-Exchange-CrossTenant-AuthSource: DU2PR04MB8822.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Mar 2024 08:14:51.3015 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: EJ2I6wEFISwlKrqSg3SlMLdeOClHlX7Qrb5n8CFLK8ZLiPwbYmyH3rU6JTcylZ8Hf74I23iHZctMW1qGz8rhrg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB9191 The i.MX93 needs a wakup clock to work properly. This will add compatible and restriction for i.MX93 platform. Reviewed-by: Rob Herring Signed-off-by: Xu Yang --- Changes in v2: - no changes Changes in v3: - add clocks restriction Changes in v4: - use 'contains' rather 'items' Changes in v5: - rename clock name Changes in v6: - new patch based on ci-hdrc-usb2-imx.yaml Changes in v7: - no changes Changes in v8: - rewrite the restriction Changes in v9: - add Rb tag Changes in v10: - no changes --- .../bindings/usb/chipidea,usb2-imx.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml index e2eb60eaf6fe..8f6136f5d72e 100644 --- a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml +++ b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml @@ -40,6 +40,7 @@ properties: - enum: - fsl,imx8mm-usb - fsl,imx8mn-usb + - fsl,imx93-usb - const: fsl,imx7d-usb - const: fsl,imx27-usb - items: @@ -183,6 +184,23 @@ allOf: - const: ahb - const: per + # imx93 Soc needs two clocks + - if: + properties: + compatible: + contains: + enum: + - fsl,imx93-usb + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + items: + - const: usb_ctrl_root + - const: usb_wakeup + # imx7d Soc need one clock - if: properties: From patchwork Thu Mar 21 08:14:35 2024 Content-Type: text/plain; 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The usb phy needs it instead. Signed-off-by: Xu Yang --- Changes in v7: - new patch Changes in v8: - no changes Changes in v9: - no changes Changes in v10: - not remove fsl,anatop for imx6ul.dtsi since it's already removed --- arch/arm/boot/dts/nxp/imx/imx6sll.dtsi | 1 - arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 2 -- 2 files changed, 3 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi index 3659fd5ecfa6..ddeb5b37fb78 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi @@ -683,7 +683,6 @@ usbotg1: usb@2184000 { clocks = <&clks IMX6SLL_CLK_USBOH3>; fsl,usbphy = <&usbphy1>; fsl,usbmisc = <&usbmisc 0>; - fsl,anatop = <&anatop>; ahb-burst-config = <0x0>; tx-burst-size-dword = <0x10>; rx-burst-size-dword = <0x10>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi index df3a375f0a3e..b8d95957ca09 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi @@ -929,7 +929,6 @@ usbotg1: usb@2184000 { clocks = <&clks IMX6SX_CLK_USBOH3>; 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Thu, 21 Mar 2024 08:15:01 +0000 From: Xu Yang To: gregkh@linuxfoundation.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, conor+dt@kernel.org Cc: s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, peter.chen@kernel.org, xu.yang_2@nxp.com, jun.li@nxp.com, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v10 08/11] arm64: dts: imx93: add usb nodes Date: Thu, 21 Mar 2024 16:14:36 +0800 Message-Id: <20240321081439.541799-8-xu.yang_2@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240321081439.541799-1-xu.yang_2@nxp.com> References: <20240321081439.541799-1-xu.yang_2@nxp.com> X-ClientProxiedBy: SG2PR02CA0022.apcprd02.prod.outlook.com (2603:1096:3:17::34) To DU2PR04MB8822.eurprd04.prod.outlook.com (2603:10a6:10:2e1::11) Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU2PR04MB8822:EE_|AS8PR04MB9191:EE_ X-MS-Office365-Filtering-Correlation-Id: a0606714-29ca-424a-eecd-08dc497f0174 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Add them. Acked-by: Alexander Stein Tested-by: Alexander Stein # TQMa9352LA/CA Signed-off-by: Xu Yang --- Changes in v2: - fix format as suggested by Alexander - change compatible from fsl,imx8mm-usb to fsl,imx93-usb Changes in v3: - replace deprecated fsl,usbphy with phys as suggested by Alexander - reorder nodes Changes in v4: - fix the alignment Changes in v5: - rename usb_wakeup_clk to usb_wakeup Changes in v6: - rename usb_ctrl_root_clk to usb_ctrl_root Changes in v7: - no changes Changes in v8: - no changes Changes in v9: - no changes Changes in v10: - no changes --- arch/arm64/boot/dts/freescale/imx93.dtsi | 58 ++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index 8f2e7c42ad6e..4a7efccb4f67 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -183,6 +183,20 @@ mqs2: mqs2 { status = "disabled"; }; + usbphynop1: usbphynop1 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>; + clock-names = "main_clk"; + }; + + usbphynop2: usbphynop2 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>; + clock-names = "main_clk"; + }; + soc@0 { compatible = "simple-bus"; #address-cells = <1>; @@ -1167,6 +1181,50 @@ media_blk_ctrl: system-controller@4ac10000 { status = "disabled"; }; + usbotg1: usb@4c100000 { + compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb"; + reg = <0x4c100000 0x200>; + interrupts = ; + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>, + <&clk IMX93_CLK_HSIO_32K_GATE>; + clock-names = "usb_ctrl_root", "usb_wakeup"; + assigned-clocks = <&clk IMX93_CLK_HSIO>; + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; + assigned-clock-rates = <133000000>; + phys = <&usbphynop1>; + fsl,usbmisc = <&usbmisc1 0>; + status = "disabled"; + }; + + usbmisc1: usbmisc@4c100200 { + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc", + "fsl,imx6q-usbmisc"; + reg = <0x4c100200 0x200>; + #index-cells = <1>; + }; + + usbotg2: usb@4c200000 { + compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb"; + reg = <0x4c200000 0x200>; + interrupts = ; + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>, + <&clk IMX93_CLK_HSIO_32K_GATE>; + clock-names = "usb_ctrl_root", "usb_wakeup"; + assigned-clocks = <&clk IMX93_CLK_HSIO>; + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; + assigned-clock-rates = <133000000>; + phys = <&usbphynop2>; + fsl,usbmisc = <&usbmisc2 0>; + status = "disabled"; + }; + + usbmisc2: usbmisc@4c200200 { + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc", + "fsl,imx6q-usbmisc"; + reg = <0x4c200200 0x200>; + #index-cells = <1>; + }; + ddr-pmu@4e300dc0 { compatible = "fsl,imx93-ddr-pmu"; reg = <0x4e300dc0 0x200>; From patchwork Thu Mar 21 08:14:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xu Yang X-Patchwork-Id: 13598463 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2073.outbound.protection.outlook.com [40.107.21.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D923778293 for ; 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Enable them. Signed-off-by: Xu Yang --- Changes in v2: - remove status property in ptn5110 nodes - fix dt-schema warnings Changes in v3: - no changes Changes in v4: - no changes Changes in v5: - no changes Changes in v6: - no changes Changes in v7: - no changes Changes in v8: - no changes Changes in v9: - use compatible "nxp,ptn5110", "tcpci" Changes in v10: - no changes --- .../boot/dts/freescale/imx93-11x11-evk.dts | 118 ++++++++++++++++++ 1 file changed, 118 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts index 9921ea13ab48..ecc01d872e95 100644 --- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include #include "imx93.dtsi" / { @@ -104,6 +105,80 @@ &mu2 { status = "okay"; }; +&lpi2c3 { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_lpi2c3>; + pinctrl-1 = <&pinctrl_lpi2c3>; + status = "okay"; + + ptn5110: tcpc@50 { + compatible = "nxp,ptn5110", "tcpci"; + reg = <0x50>; + interrupt-parent = <&gpio3>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + + typec1_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + power-role = "dual"; + data-role = "dual"; + try-power-role = "sink"; + source-pdos = ; + sink-pdos = ; + op-sink-microwatt = <15000000>; + self-powered; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + typec1_dr_sw: endpoint { + remote-endpoint = <&usb1_drd_sw>; + }; + }; + }; + }; + }; + + ptn5110_2: tcpc@51 { + compatible = "nxp,ptn5110", "tcpci"; + reg = <0x51>; + interrupt-parent = <&gpio3>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + + typec2_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + power-role = "dual"; + data-role = "dual"; + try-power-role = "sink"; + source-pdos = ; + sink-pdos = ; + op-sink-microwatt = <15000000>; + self-powered; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + typec2_dr_sw: endpoint { + remote-endpoint = <&usb2_drd_sw>; + }; + }; + }; + }; + }; +}; + &eqos { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_eqos>; @@ -156,6 +231,42 @@ &lpuart5 { status = "okay"; }; +&usbotg1 { + dr_mode = "otg"; + hnp-disable; + srp-disable; + adp-disable; + usb-role-switch; + disable-over-current; + samsung,picophy-pre-emp-curr-control = <3>; + samsung,picophy-dc-vol-level-adjust = <7>; + status = "okay"; + + port { + usb1_drd_sw: endpoint { + remote-endpoint = <&typec1_dr_sw>; + }; + }; +}; + +&usbotg2 { + dr_mode = "otg"; + hnp-disable; + srp-disable; + adp-disable; + usb-role-switch; + disable-over-current; + samsung,picophy-pre-emp-curr-control = <3>; + samsung,picophy-dc-vol-level-adjust = <7>; + status = "okay"; + + port { + usb2_drd_sw: endpoint { + remote-endpoint = <&typec2_dr_sw>; + }; + }; +}; + &usdhc1 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; @@ -222,6 +333,13 @@ MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e >; 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Thu, 21 Mar 2024 08:15:11 +0000 From: Xu Yang To: gregkh@linuxfoundation.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, conor+dt@kernel.org Cc: s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, peter.chen@kernel.org, xu.yang_2@nxp.com, jun.li@nxp.com, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v10 10/11] arm64: dts: imx8m* remove clock-names property from usb controller node Date: Thu, 21 Mar 2024 16:14:38 +0800 Message-Id: <20240321081439.541799-10-xu.yang_2@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240321081439.541799-1-xu.yang_2@nxp.com> References: <20240321081439.541799-1-xu.yang_2@nxp.com> X-ClientProxiedBy: SG2PR02CA0022.apcprd02.prod.outlook.com (2603:1096:3:17::34) To DU2PR04MB8822.eurprd04.prod.outlook.com (2603:10a6:10:2e1::11) Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU2PR04MB8822:EE_|AS8PR04MB9191:EE_ X-MS-Office365-Filtering-Correlation-Id: c62b52ed-af14-4658-cb64-08dc497f078a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 3Q4wL0EFx3eLKRdMuLNw9jo+3Lz4silMh2bg8dWNWQEolcq8tZyJodypIDkb80OoJRDg6jmOQRa8ZE2roTajklmIqhH3l6odOe5VLhmmklKXGCgmaae0XgG3IjnS1NGPoMnuPE50Y4lpFzeP3qVQHH2tr4EGN77MauTsBWtkcZibAAfIheOT9Hvwmcju1H9jREnU9voCNRhvimTcoCcdgRBwhvndEhSMGH6e1ahrM1Pyb389WHgC0Z8mtbYPa1GK3U8SzS09jkg5uw0zE6l1xfCOmjhqiGvIE1CAOPDiQr3+77YfWDss/2/prffKngpq70/JaAsdjsMCIKKLe3+PBJ4PwMOja5S1R+U7Vyci7eCO1kU2pLypVLlSdrGSsbFqyQ+WSF8dIbgmzFVTuhrsFpCTwMDAGOqhgXVz54lPBLskZO9B4aQWsksyPnz/iz9Vn4puiKBn15U4hUfi1IXy/BB7zEZBmzaqYc1bRkaxra/lNmPDDVuLS8auBHEfqSU/h9JuKB3XJxLJsE4VsG0NOzPL5EnBsfAJYUcDMwwcnS7Tv8HrUAMiDp+/3uz0uu8H5h3V3TPa042sTT1YQPJmdp8gnPDj0doNoHAXTaje/VM6IWPoJOEH1od1yEvfDzlL1YkcVYoMKkTb6keBjqjNO5Mk915OF6lVyPzxe8vgoFR3DfAmI1wnFr/8Rboo3DP8OnMTkesJOgmS8fBWWbRC0xLaNiVlJL85PIS95l0cZOrZsekPtTNk5EZoUUwZtXqmQtU0+ZUnzqJadvy8mHdemSooq9AVbdWWRYTsKAXN+Kvm0jvvP+bI5eC78utoA3UJC/PTEH6hEbc0rfNLzFyEWhoJ8+IrSLxZhDzLF2npja9Xk84ZX6Ai2Mf6blwrmIcWkc4pCxHT4RJSQKy2IW46CcEUvRSgMsIuo62pY8QurFEwHT6lkSzLOdkxMlGS0qxQkiXnAB1BEYKaSwpFSAU+13CMGsHQIJJikFhsjVsGsXGlvgvzc5iYWlCLchBeexRXVLdkvDKhiXKB9YYF6i/8W4FOUQ0huXV+soefX5kfwi36OMpPKNYGutth5o1QRE+vJkWRlYzYEC3hg2w1y2LYwvNq5X+zyZvDJWX2eZ6/0STG1jJiil7itNSPYBus8yYIDiswwOjB39dChHHQXn6FtStEItSknd3v65oFauXJV2R9kgSsZggOJqtE3e1Y872iBz/LIxAsEdzX/UGnEODy6Kg+IGhazehA/MwiCjUDhwygdLeTwJBHBeFoHkGZLwAaFUIatvR6203wiuwJmOeMXlmYmEIp9o9MjmRh/vtzu01I8tCHV8q9/YSumMLZWLt+ZZ63nNvuqEYmCzGedMAX2AMXkE5HowW3NLYpgnRVekot5wD8wMc+oU+du7lVvpvDaYRHAmVBIVy7h2fFGY8PB8P6Vs1sqr0bu2/StKAi2DSqyAHid2/8lfRbMhyaBoOZ58V9NvOWumIy1d8iDFxJsVd2uDjGTs/7dqWmuK6OygcWjiGNQm65grVMmzPQWCIk7spG6y6kNRKN2g8fQCPqx8qAuYb6WnMrut29KYJg90wp3frzIbd742TG77UWiIKn X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: c62b52ed-af14-4658-cb64-08dc497f078a X-MS-Exchange-CrossTenant-AuthSource: DU2PR04MB8822.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Mar 2024 08:15:11.8719 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: u2HfenfNIR3Vl0yEaV4+NHCjcT7pNe8lrL5pVZya4DlEGm3htlBC5MULlX5JhVsqVwUdFc1/0rcx5wGuV23ZzQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB9191 The clock-names property is not needed by usb controller node on imx8mm/n. This will remove it. Signed-off-by: Xu Yang --- Changes in v9: - new patch Changes in v10: - no changes --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 2 -- arch/arm64/boot/dts/freescale/imx8mn.dtsi | 1 - 2 files changed, 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 8a1b42b94dce..696e96b15585 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -1253,7 +1253,6 @@ usbotg1: usb@32e40000 { reg = <0x32e40000 0x200>; interrupts = ; clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>; - clock-names = "usb1_ctrl_root_clk"; assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>; phys = <&usbphynop1>; @@ -1274,7 +1273,6 @@ usbotg2: usb@32e50000 { reg = <0x32e50000 0x200>; interrupts = ; clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>; - clock-names = "usb1_ctrl_root_clk"; assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>; 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Received: from DU2PR04MB8822.eurprd04.prod.outlook.com (2603:10a6:10:2e1::11) by AS8PR04MB9191.eurprd04.prod.outlook.com (2603:10a6:20b:44e::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7386.30; Thu, 21 Mar 2024 08:15:17 +0000 Received: from DU2PR04MB8822.eurprd04.prod.outlook.com ([fe80::d45f:4483:c11:68b0]) by DU2PR04MB8822.eurprd04.prod.outlook.com ([fe80::d45f:4483:c11:68b0%7]) with mapi id 15.20.7386.023; Thu, 21 Mar 2024 08:15:17 +0000 From: Xu Yang To: gregkh@linuxfoundation.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, conor+dt@kernel.org Cc: s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, peter.chen@kernel.org, xu.yang_2@nxp.com, jun.li@nxp.com, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v10 11/11] usb: chipidea: ci_hdrc_imx: align usb wakeup clock name with dt-bindings Date: Thu, 21 Mar 2024 16:14:39 +0800 Message-Id: <20240321081439.541799-11-xu.yang_2@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240321081439.541799-1-xu.yang_2@nxp.com> References: <20240321081439.541799-1-xu.yang_2@nxp.com> X-ClientProxiedBy: SG2PR02CA0022.apcprd02.prod.outlook.com (2603:1096:3:17::34) To DU2PR04MB8822.eurprd04.prod.outlook.com (2603:10a6:10:2e1::11) Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU2PR04MB8822:EE_|AS8PR04MB9191:EE_ X-MS-Office365-Filtering-Correlation-Id: 11b2b2c5-4670-4491-bb8b-08dc497f0ade X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: h1hwpql7VFXicOYsz1k0L7RfSAp+GuxUT2u4zy+WTORTolY3dC6GnAryyZ/gJyX9kXSMkeSOEmcwvbJ2LErZFGEO2hAWQh3RVuY5n2Uod0VR0pAiDuPORy9EAcj+FC8eTQSFmXtTNytPh13d1rT9q/ayNC507lpd8NiX0mph0fqgFiHZQTDl5/pxotARtlQLCsl8m4kVnBANZgJufmPFcIFyDdKBk+1ICgP61rFUPgmPixMqyhFjJ9YbcmSmlP1EBVGHCyMyQTNo84S+F2FuCgdywWc+xieONGLl8XuDnTGyL5Bbg32BKnk22SJAspIMmyuQn3LP9NkW1ts2OQHaUDubF3g23narKa9QG5Jwx8S37/zXUOfgvxjId2pj5QYzC1a/QeK6PBe825dtvcRd9WUrIGu53G6dVLdeWDilqI+ZtnQn965F4WXvI7cveo9zA6EHnzbFTq9XsRs38Ccx0pWxO8t2Olh35/McZbdYJWlxO94cI2vlTMp4T1lNJFfshm6szXXtOaVEFA8IHlLHNkPg1SaOv2qNw9Pada4W5FnDMVPmLqfhIByISXL8aNF565eg/y4N6qjDl6BKIBxGtq6lLLao41S1XaD26tTbjDzgNf2vOzKIb+byRA2HxU0tUwtsDmrQKakFg40lWUlSFGkslh1Vku6dfHB964mFtDr4aoC/gviUnD6XBu7tawSF3+8obdUDMGyYksf6660AFxzM50dvwB7PHzIpeLBg9cL5PdfgAwbYj4PDWP06+zP5ApMY4qgqTzg2xhQjXaF9Fuf1iH4z+H6DtADPFLFk5sKPeDPHI6Bx2Y76kqOOSqD1YBEh2wxWuZluoecSsXr8Da+uuZHL/Fx3s5A7wPuZ8CDB6P6kyjQC1PS/zCByq2txQLPHMh35midVCy7xgGiml+rvb3iq1A7hg+kPpuJHcvPPGxriYl/pOUpU4Z2zqxvEaZQepQsmQZ+sjtD8VcKO1x/houDF2QfCtT/4sOhY53qHwCP8pFCjohm+BceaWJkqPkMIaoB4/4U3y9GVfVUZIGd/N3mJE1otuelOddWme94JWlFJzbUdFvv7fD4968CGrFtd+MevULh616ZnlcqcwANrunPLTT/XA7nKDf84o5O4Mg0xk/O8MAaS18gUORLvE0xT9awnOsLHR4AU2ivvxF86y5fP6v6kwj4iLslzgLmWuGUJEJ0BtsXuVzQcDPDb9il40HvFXlBLC2NevDnXWKrF5HoXL1cQynZotydrDJj0ZOWk6qIqDMLM9bdb5Bq9s+O1gBVDpOYPcbNnk/aXtEjGiIpsxwv6aqwGZkWPvyG8ZpR3dbtbMHyqyAAtAlpabo7Djy4JGO89Xgtm7I+C1zePb97VfGPjgReCmHgwQPl743EOqRNoahdSrl4dArr0ARyBmdB0ZYRBKbUWXFDlOu8y32sIvFRUEXMp6WthMcWNyXTKhQVg9kPwbfLMruohkftHHSAOHqA8ePkZ/DTUoY4fMn0c5Kv7qOuxkls7y9fstQ+R73Nm2yVh2hufLlYIQWxK+92FOllpAwoJB7hI4zkErUfDsJWcR+ZpQXnBtxjXGSBT+Y98Hbo1c6ubfMpJ X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 11b2b2c5-4670-4491-bb8b-08dc497f0ade X-MS-Exchange-CrossTenant-AuthSource: DU2PR04MB8822.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Mar 2024 08:15:17.4855 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: iMK5FdPkPku/cLPXjl3KPopZqAFAhDQ1eGf8d/1XVBdMjMyYUeWxCC2HynQKLQVHcUBV0lMdtc1vo8nPo5TybQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB9191 The dt-bindings is going to use "usb_wakeup" as wakup clock name. This will align the change with dt-bindings. Acked-by: Peter Chen Signed-off-by: Xu Yang --- Changes in v5: - new patch Changes in v6: - add Acked-by tag Changes in v7: - no changes Changes in v8: - no changes Changes in v9: - no changes Changes in v10: - no changes --- drivers/usb/chipidea/ci_hdrc_imx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c b/drivers/usb/chipidea/ci_hdrc_imx.c index ae9a6a17ec6e..a17b6d619305 100644 --- a/drivers/usb/chipidea/ci_hdrc_imx.c +++ b/drivers/usb/chipidea/ci_hdrc_imx.c @@ -212,7 +212,7 @@ static int imx_get_clks(struct device *dev) /* Get wakeup clock. Not all of the platforms need to * handle this clock. So make it optional. */ - data->clk_wakeup = devm_clk_get_optional(dev, "usb_wakeup_clk"); + data->clk_wakeup = devm_clk_get_optional(dev, "usb_wakeup"); if (IS_ERR(data->clk_wakeup)) ret = dev_err_probe(dev, PTR_ERR(data->clk_wakeup), "Failed to get wakeup clk\n");