From patchwork Thu Mar 21 16:29:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?= X-Patchwork-Id: 13599101 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7E61CC54E58 for ; Thu, 21 Mar 2024 16:29:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Reply-To:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To: References:Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version: Subject:Date:From:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=S37BRJRHUs0m9rmZYk8ZUm5BKpFpOo24Sstyet9sBCs=; b=1vGFyEOWoTXQSc4nvk+ylUFSL1 pOyuVwsTuDwakoPnJrpIt112HwIBOsX5Ec6q8IRlsvIkk3ovRuV2dyv9qrNsE7G6Vr1XsbizMDyp+ CWnOgorwQuWZOVD8ErunvRQqEdYfv/Ki+0YPddsF+OoNOz8XlkhoAFj9NR2mhX7U5xpd2o1xokpGh udLtmGqejL3HktJjlz2lswbYenIK0bnGg58eb2CdHO3t9jl/ExsjntkKIjsMV/lHF5Fvmz88Wio7v iKQud3YSboF6Ki69z9lNFXv7NPI/zAojsqdWf84zAXDcyUesNrIBWJcGde10c1dIEJwJBKUjKVHUT ogUDPRtg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rnLIl-00000003moF-0Ozs; Thu, 21 Mar 2024 16:29:59 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rnLIU-00000003mgJ-4Ar0; Thu, 21 Mar 2024 16:29:44 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id C1BE0CE1397; Thu, 21 Mar 2024 16:29:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id F12EBC433C7; Thu, 21 Mar 2024 16:29:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711038580; bh=Dm1PpESmKUiBkJ+3cICRSDiBnf/1JiIG6XDigLGXMlQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=FbmFLEAR2OjkUz89fFAGbWQaIBm7VPp+wrODGf3cgpaW90dcMMuLPUIBy4ru/hhLb zfgNOMoZT4E2PAniw6E7a3cgj69iN8oHRRILIap1aZb7vlU72m1BtedZcv0Ia+qf9T vuAP8YSIFtNAijVsMjR9CQ8nG8mT4zlWwoYDf19CkpQDwdS7pbWPG585rZI/KUoNIm AVyj7tERnH4WO6w+4cFron94YQimE9rxVXrTVVp+Ge8/M9SV6CstakFSIFlInqNC+k YN6FSt43taTpm3dvkiUPLu4r8exbptcplSQC7tDyKaEKHjZXtxMq7aDLz35zQTva21 c6h466+5AOmww== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id DAD1ECD11C2; Thu, 21 Mar 2024 16:29:39 +0000 (UTC) From: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?= Date: Thu, 21 Mar 2024 19:29:13 +0300 Subject: [PATCH net v2 1/2] net: dsa: mt7530: fix enabling EEE on MT7531 switch on all boards MIME-Version: 1.0 Message-Id: <20240321-for-net-mt7530-fix-eee-for-mt7531-mt7988-v2-1-9af9d5041bfe@arinc9.com> References: <20240321-for-net-mt7530-fix-eee-for-mt7531-mt7988-v2-0-9af9d5041bfe@arinc9.com> In-Reply-To: <20240321-for-net-mt7530-fix-eee-for-mt7531-mt7988-v2-0-9af9d5041bfe@arinc9.com> To: Daniel Golle , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , =?utf-8?q?Ren=C3=A9_van_Dorst?= , Russell King , SkyLake Huang , Heiner Kallweit Cc: Bartel Eerdekens , mithat.guner@xeront.com, erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= , Florian Fainelli X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1711038558; l=3102; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=jPUSZ3Gz1HwFE6kGrRuGpoudPKmyUngv0UO3D4WqCPk=; b=PDdYcDWLl5PpsAn992chSxQxfWJGD18RI8e2IpPDL4UEksOruuIlksuJkAwm3bSzIZepdQ05O Pv6HZ7ZaNQkBAN7PxMeFnwusBGvksLdTarcCSmntqk+/6dnQ1ijKJO6 X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240321_092943_417005_DEBAEA68 X-CRM114-Status: GOOD ( 18.49 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: arinc.unal@arinc9.com Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Arınç ÜNAL The commit 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features") brought EEE support but did not enable EEE on MT7531 switch MACs. EEE is enabled on MT7531 switch MACs either by pulling the LAN2LED0 pin low on the board (bootstrapping), or unsetting the EEE_DIS bit on the trap register. There are existing boards that were not designed to pull the pin low. Therefore, unset the EEE_DIS bit on the trap register. Unlike MT7530, the modifiable trap register won't be populated identical to the trap status register after reset. Therefore, read from the trap status register, modify the bits, then write to the modifiable trap register. My testing on MT7531 shows a certain amount of traffic loss when EEE is enabled. That said, I haven't come across a board that enables EEE. So enable EEE on the switch MACs but disable EEE advertisement on the switch PHYs. This way, we don't change the behaviour of the majority of the boards that have this switch. With this change, EEE can now be enabled using ethtool. The disable EEE bit on the trap pertains to the LAN2LED0 pin which is usually used to control an LED. Once the bit is unset, the pin will be low. That will make the active low LED turn on. The pin is controlled by the switch PHY. It seems that the PHY controls the pin in the way that it inverts the pin state. That means depending on the wiring of the LED connected to LAN2LED0 on the board, the LED may be on without an active link. Fixes: 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features") Reviewed-by: Florian Fainelli Signed-off-by: Arınç ÜNAL --- drivers/net/dsa/mt7530.c | 14 ++++++++++++++ drivers/net/dsa/mt7530.h | 1 + 2 files changed, 15 insertions(+) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 678b51f9cea6..6aa99b590329 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2458,6 +2458,20 @@ mt7531_setup(struct dsa_switch *ds) /* Reset the switch through internal reset */ mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_SW_RST | SYS_CTRL_REG_RST); + /* Allow modifying the trap and enable Energy-Efficient Ethernet (EEE). + */ + val = mt7530_read(priv, MT7531_HWTRAP); + val |= CHG_STRAP; + val &= ~EEE_DIS; + mt7530_write(priv, MT7530_MHWTRAP, val); + + /* Disable EEE advertisement on the switch PHYs. */ + for (i = MT753X_CTRL_PHY_ADDR; + i < MT753X_CTRL_PHY_ADDR + MT7530_NUM_PHYS; i++) { + mt7531_ind_c45_phy_write(priv, i, MDIO_MMD_AN, MDIO_AN_EEE_ADV, + 0); + } + if (!priv->p5_sgmii) { mt7531_pll_setup(priv); } else { diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index a71166e0a7fc..509ed5362236 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -457,6 +457,7 @@ enum mt7531_clk_skew { #define XTAL_FSEL_M BIT(7) #define PHY_EN BIT(6) #define CHG_STRAP BIT(8) +#define EEE_DIS BIT(4) /* Register for hw trap modification */ #define MT7530_MHWTRAP 0x7804 From patchwork Thu Mar 21 16:29:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?= X-Patchwork-Id: 13599099 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 38068C6FD1F for ; Thu, 21 Mar 2024 16:29:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Reply-To:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To: References:Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version: Subject:Date:From:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=uT0RS+GHCXUGsygoGQD9BLYd7IURiN4ABN7OybgTysg=; b=AUZYtQEBKu1dAfCnkZQAOmBNEO TNlvfvmShEjRaL1m57rnRWkcAAEMLt+4V+P8LAu2Fcf74uYCzCvQVo2FaUhT4PGxud22N4vOEDKJz Bp15pE/4TFjg9k9dHB2NuMKVWJQ4T2x4FCrK/AoLbTsyUjMgDmmRtvhiBIl27nHHpOOchRjTZrBG5 0n/PbZUg4kFOZRgYClFgDXxeuJ8GO3YydhRpZoZNfKf6R2YpiW5K01JdGBNwAkHp4KWOQrqL2hmCg uSIrG5+YkGznxpPBCdyJ9KXVUFeABTC4pRUFNinOQlC8DQu6fU/yWqyrAJL+LgQvwHfW/PsFn4oFN tZu1R3hQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rnLIX-00000003mhi-33XM; Thu, 21 Mar 2024 16:29:45 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rnLIT-00000003mg2-277Y; Thu, 21 Mar 2024 16:29:42 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 63C4B611D3; Thu, 21 Mar 2024 16:29:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 05EFBC43390; Thu, 21 Mar 2024 16:29:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711038580; bh=yqJggufrP1i89wxFjM8Tt9txIjYYksGH/+vHGN6ns3E=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=LYJ9/HV+39Y7te7sja2d7kBc5OIodn3VAoSiWqcK2J5rjzi/3XGBLpjAQRzbegsoK L6G9TVYtsqbLO2dX2HzqOFkTSItY4nXYVPNJcC/U4zqhcwCN/R0cyiY8FH8X2VKyKe Vv0E6Ir8DN9lXN45HM81UCaZz3j25Tjz+7+vuKQwOz0Y0IMFfW9E24/afhMpsDM93d Mcw4qkd5kZmP71Pm+i6ZwYMeS+RPXjWedRc7n2V1di1TtPIBFcdCMHQz7A+PKVw4GY 4Ifk0zfWANkEC3/TxZm+orsBYwzhUqxYHcRmHIgDFsyaOsQ4met3yIvN6VMRUDaPOR dbK53Vy7+c2Tw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB9C5C54E58; Thu, 21 Mar 2024 16:29:39 +0000 (UTC) From: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?= Date: Thu, 21 Mar 2024 19:29:14 +0300 Subject: [PATCH net v2 2/2] net: dsa: mt7530: fix disabling EEE on failure on MT7531 and MT7988 MIME-Version: 1.0 Message-Id: <20240321-for-net-mt7530-fix-eee-for-mt7531-mt7988-v2-2-9af9d5041bfe@arinc9.com> References: <20240321-for-net-mt7530-fix-eee-for-mt7531-mt7988-v2-0-9af9d5041bfe@arinc9.com> In-Reply-To: <20240321-for-net-mt7530-fix-eee-for-mt7531-mt7988-v2-0-9af9d5041bfe@arinc9.com> To: Daniel Golle , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , =?utf-8?q?Ren=C3=A9_van_Dorst?= , Russell King , SkyLake Huang , Heiner Kallweit Cc: Bartel Eerdekens , mithat.guner@xeront.com, erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1711038558; l=1925; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=DsZ4XshfmuCrCshjsgaop6WdjUbPqTHmbY230mILEL4=; b=G2zxEWZRPd7T5UKeb3EAgsPQG9cW8YK9hK0H++LcTnAJNjhhJgyhrSeiqfRJhNLEsGOYGv3YL Xz5cm9hMjd9D4wjOKTWIi8jOtYCQjRFlvYMfzdA2Qu+EhTkWIamreOF X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240321_092941_639909_AEE58F06 X-CRM114-Status: GOOD ( 13.02 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: arinc.unal@arinc9.com Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Arınç ÜNAL The MT7531_FORCE_EEE1G and MT7531_FORCE_EEE100 bits let the PMCR_FORCE_EEE1G and PMCR_FORCE_EEE100 bits determine the 1G/100 EEE abilities of the MAC. If MT7531_FORCE_EEE1G and MT7531_FORCE_EEE100 are unset, the abilities are left to be determined by PHY auto polling. The commit 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features") made it so that the PMCR_FORCE_EEE1G and PMCR_FORCE_EEE100 bits are set on mt753x_phylink_mac_link_up(). But it did not set the MT7531_FORCE_EEE1G and MT7531_FORCE_EEE100 bits. Because of this, EEE will be enabled on the switch MACs by polling the PHY, regardless of the result of phy_init_eee(). Define these bits and add them to MT7531_FORCE_MODE which is being used by the subdriver. With this, EEE will be prevented from being enabled on the switch MACs when phy_init_eee() fails. Fixes: 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features") Signed-off-by: Arınç ÜNAL --- drivers/net/dsa/mt7530.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index 509ed5362236..5b99aeca34b4 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -299,11 +299,15 @@ enum mt7530_vlan_port_acc_frm { #define MT7531_FORCE_DPX BIT(29) #define MT7531_FORCE_RX_FC BIT(28) #define MT7531_FORCE_TX_FC BIT(27) +#define MT7531_FORCE_EEE100 BIT(26) +#define MT7531_FORCE_EEE1G BIT(25) #define MT7531_FORCE_MODE (MT7531_FORCE_LNK | \ MT7531_FORCE_SPD | \ MT7531_FORCE_DPX | \ MT7531_FORCE_RX_FC | \ - MT7531_FORCE_TX_FC) + MT7531_FORCE_TX_FC | \ + MT7531_FORCE_EEE100 | \ + MT7531_FORCE_EEE1G) #define PMCR_LINK_SETTINGS_MASK (PMCR_TX_EN | PMCR_FORCE_SPEED_1000 | \ PMCR_RX_EN | PMCR_FORCE_SPEED_100 | \ PMCR_TX_FC_EN | PMCR_RX_FC_EN | \