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[84.72.156.211]) by smtp.gmail.com with ESMTPSA id f25-20020a056402161900b0056bc0c44f02sm59151edv.96.2024.03.27.15.03.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Mar 2024 15:03:29 -0700 (PDT) From: Lothar Rubusch To: lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, eraretuya@gmail.com, l.rubusch@gmail.com Subject: [PATCH v5 1/7] iio: accel: adxl345: Make data_range obsolete Date: Wed, 27 Mar 2024 22:03:14 +0000 Message-Id: <20240327220320.15509-2-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240327220320.15509-1-l.rubusch@gmail.com> References: <20240327220320.15509-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Replace write() data_format by regmap_update_bits(), because bus specific pre-configuration may have happened before on the same register. For further updates to the data_format register then bus pre-configuration needs to be masked out. Remove the data_range field from the struct adxl345_data, because it is not used anymore. Signed-off-by: Lothar Rubusch --- drivers/iio/accel/adxl345_core.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl345_core.c index 8bd30a23e..35df5e372 100644 --- a/drivers/iio/accel/adxl345_core.c +++ b/drivers/iio/accel/adxl345_core.c @@ -37,7 +37,15 @@ #define ADXL345_POWER_CTL_MEASURE BIT(3) #define ADXL345_POWER_CTL_STANDBY 0x00 +#define ADXL345_DATA_FORMAT_RANGE GENMASK(1, 0) /* Set the g range */ +#define ADXL345_DATA_FORMAT_JUSTIFY BIT(2) /* Left-justified (MSB) mode */ #define ADXL345_DATA_FORMAT_FULL_RES BIT(3) /* Up to 13-bits resolution */ +#define ADXL345_DATA_FORMAT_SELF_TEST BIT(7) /* Enable a self test */ +#define ADXL345_DATA_FORMAT_MSK (ADXL345_DATA_FORMAT_RANGE | \ + ADXL345_DATA_FORMAT_JUSTIFY | \ + ADXL345_DATA_FORMAT_FULL_RES | \ + ADXL345_DATA_FORMAT_SELF_TEST) + #define ADXL345_DATA_FORMAT_2G 0 #define ADXL345_DATA_FORMAT_4G 1 #define ADXL345_DATA_FORMAT_8G 2 @@ -48,7 +56,6 @@ struct adxl345_data { const struct adxl345_chip_info *info; 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[84.72.156.211]) by smtp.gmail.com with ESMTPSA id f25-20020a056402161900b0056bc0c44f02sm59151edv.96.2024.03.27.15.03.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Mar 2024 15:03:30 -0700 (PDT) From: Lothar Rubusch To: lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, eraretuya@gmail.com, l.rubusch@gmail.com Subject: [PATCH v5 2/7] iio: accel: adxl345: Group bus configuration Date: Wed, 27 Mar 2024 22:03:15 +0000 Message-Id: <20240327220320.15509-3-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240327220320.15509-1-l.rubusch@gmail.com> References: <20240327220320.15509-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In the probe function group bus configuration and the indio_dev initialization to improve readability. Signed-off-by: Lothar Rubusch --- drivers/iio/accel/adxl345_core.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl345_core.c index 35df5e372..5c24ef9ca 100644 --- a/drivers/iio/accel/adxl345_core.c +++ b/drivers/iio/accel/adxl345_core.c @@ -229,18 +229,18 @@ int adxl345_core_probe(struct device *dev, struct regmap *regmap) if (!data->info) return -ENODEV; - /* Enable full-resolution mode */ - ret = regmap_update_bits(regmap, ADXL345_REG_DATA_FORMAT, - ADXL345_DATA_FORMAT_MSK, ADXL345_DATA_FORMAT_FULL_RES); - if (ret) - return dev_err_probe(dev, ret, "Failed to set data range\n"); - indio_dev->name = data->info->name; indio_dev->info = &adxl345_info; indio_dev->modes = INDIO_DIRECT_MODE; indio_dev->channels = adxl345_channels; indio_dev->num_channels = ARRAY_SIZE(adxl345_channels); + /* Enable full-resolution mode */ + ret = regmap_update_bits(regmap, ADXL345_REG_DATA_FORMAT, + ADXL345_DATA_FORMAT_MSK, ADXL345_DATA_FORMAT_FULL_RES); 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[84.72.156.211]) by smtp.gmail.com with ESMTPSA id f25-20020a056402161900b0056bc0c44f02sm59151edv.96.2024.03.27.15.03.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Mar 2024 15:03:31 -0700 (PDT) From: Lothar Rubusch To: lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, eraretuya@gmail.com, l.rubusch@gmail.com Subject: [PATCH v5 3/7] iio: accel: adxl345: Move defines to header Date: Wed, 27 Mar 2024 22:03:16 +0000 Message-Id: <20240327220320.15509-4-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240327220320.15509-1-l.rubusch@gmail.com> References: <20240327220320.15509-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Move defines to the header file. This keeps the defines block together in one location, when extended by new shared defines which then have to be in the header file. Signed-off-by: Lothar Rubusch --- drivers/iio/accel/adxl345.h | 37 ++++++++++++++++++++++++++++++++ drivers/iio/accel/adxl345_core.c | 36 ------------------------------- 2 files changed, 37 insertions(+), 36 deletions(-) diff --git a/drivers/iio/accel/adxl345.h b/drivers/iio/accel/adxl345.h index 284bd387c..564f7baf1 100644 --- a/drivers/iio/accel/adxl345.h +++ b/drivers/iio/accel/adxl345.h @@ -8,6 +8,43 @@ #ifndef _ADXL345_H_ #define _ADXL345_H_ +#include + +#define ADXL345_REG_DEVID 0x00 +#define ADXL345_REG_OFSX 0x1E +#define ADXL345_REG_OFSY 0x1F +#define ADXL345_REG_OFSZ 0x20 +#define ADXL345_REG_OFS_AXIS(index) (ADXL345_REG_OFSX + (index)) +#define ADXL345_REG_BW_RATE 0x2C +#define ADXL345_REG_POWER_CTL 0x2D +#define ADXL345_REG_DATA_FORMAT 0x31 +#define ADXL345_REG_DATAX0 0x32 +#define ADXL345_REG_DATAY0 0x34 +#define ADXL345_REG_DATAZ0 0x36 +#define ADXL345_REG_DATA_AXIS(index) \ + (ADXL345_REG_DATAX0 + (index) * sizeof(__le16)) + +#define ADXL345_BW_RATE GENMASK(3, 0) +#define ADXL345_BASE_RATE_NANO_HZ 97656250LL + +#define ADXL345_POWER_CTL_MEASURE BIT(3) +#define ADXL345_POWER_CTL_STANDBY 0x00 + +#define ADXL345_DATA_FORMAT_RANGE GENMASK(1, 0) /* Set the g range */ +#define ADXL345_DATA_FORMAT_JUSTIFY BIT(2) /* Left-justified (MSB) mode */ +#define ADXL345_DATA_FORMAT_FULL_RES BIT(3) /* Up to 13-bits resolution */ +#define ADXL345_DATA_FORMAT_SELF_TEST BIT(7) /* Enable a self test */ +#define ADXL345_DATA_FORMAT_MSK (ADXL345_DATA_FORMAT_RANGE | \ + ADXL345_DATA_FORMAT_JUSTIFY | \ + ADXL345_DATA_FORMAT_FULL_RES | \ + ADXL345_DATA_FORMAT_SELF_TEST) +#define ADXL345_DATA_FORMAT_2G 0 +#define ADXL345_DATA_FORMAT_4G 1 +#define ADXL345_DATA_FORMAT_8G 2 +#define ADXL345_DATA_FORMAT_16G 3 + +#define ADXL345_DEVID 0xE5 + /* * In full-resolution mode, scale factor is maintained at ~4 mg/LSB * in all g ranges. diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl345_core.c index 5c24ef9ca..c7c1156e8 100644 --- a/drivers/iio/accel/adxl345_core.c +++ b/drivers/iio/accel/adxl345_core.c @@ -17,42 +17,6 @@ #include "adxl345.h" -#define ADXL345_REG_DEVID 0x00 -#define ADXL345_REG_OFSX 0x1e -#define ADXL345_REG_OFSY 0x1f -#define ADXL345_REG_OFSZ 0x20 -#define ADXL345_REG_OFS_AXIS(index) (ADXL345_REG_OFSX + (index)) -#define ADXL345_REG_BW_RATE 0x2C -#define ADXL345_REG_POWER_CTL 0x2D -#define ADXL345_REG_DATA_FORMAT 0x31 -#define ADXL345_REG_DATAX0 0x32 -#define ADXL345_REG_DATAY0 0x34 -#define ADXL345_REG_DATAZ0 0x36 -#define ADXL345_REG_DATA_AXIS(index) \ - (ADXL345_REG_DATAX0 + (index) * sizeof(__le16)) - -#define ADXL345_BW_RATE GENMASK(3, 0) -#define ADXL345_BASE_RATE_NANO_HZ 97656250LL - -#define ADXL345_POWER_CTL_MEASURE BIT(3) -#define ADXL345_POWER_CTL_STANDBY 0x00 - -#define ADXL345_DATA_FORMAT_RANGE GENMASK(1, 0) /* Set the g range */ -#define ADXL345_DATA_FORMAT_JUSTIFY BIT(2) /* Left-justified (MSB) mode */ -#define ADXL345_DATA_FORMAT_FULL_RES BIT(3) /* Up to 13-bits resolution */ -#define ADXL345_DATA_FORMAT_SELF_TEST BIT(7) /* Enable a self test */ -#define ADXL345_DATA_FORMAT_MSK (ADXL345_DATA_FORMAT_RANGE | \ - ADXL345_DATA_FORMAT_JUSTIFY | \ - ADXL345_DATA_FORMAT_FULL_RES | \ - ADXL345_DATA_FORMAT_SELF_TEST) - -#define ADXL345_DATA_FORMAT_2G 0 -#define ADXL345_DATA_FORMAT_4G 1 -#define ADXL345_DATA_FORMAT_8G 2 -#define ADXL345_DATA_FORMAT_16G 3 - -#define ADXL345_DEVID 0xE5 - struct adxl345_data { const struct adxl345_chip_info *info; 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[84.72.156.211]) by smtp.gmail.com with ESMTPSA id f25-20020a056402161900b0056bc0c44f02sm59151edv.96.2024.03.27.15.03.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Mar 2024 15:03:32 -0700 (PDT) From: Lothar Rubusch To: lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, eraretuya@gmail.com, l.rubusch@gmail.com Subject: [PATCH v5 4/7] dt-bindings: iio: accel: adxl345: Add spi-3wire Date: Wed, 27 Mar 2024 22:03:17 +0000 Message-Id: <20240327220320.15509-5-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240327220320.15509-1-l.rubusch@gmail.com> References: <20240327220320.15509-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add spi-3wire because the device allows to be configured for spi 3-wire communication. Signed-off-by: Lothar Rubusch --- Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml index 07cacc3f6..280ed479e 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml @@ -32,6 +32,8 @@ properties: spi-cpol: true + spi-3wire: true + interrupts: maxItems: 1 From patchwork Wed Mar 27 22:03:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lothar Rubusch X-Patchwork-Id: 13607546 Received: from mail-ej1-f46.google.com (mail-ej1-f46.google.com [209.85.218.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC60B15443A; Wed, 27 Mar 2024 22:03:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711577017; cv=none; b=TPK6s7nIVlqOZ9T1UD4YTBHkyPp0xDeeY6tNubkf3gs0v/3reGJ9EQphleOXS4szY68oGH4NwRu32htS/bwd67y0GU7sGMsP7Gu9kWE6t04QtoJnjTQ7BXjsAgn5G+t/mTBwA8d2VKZxd40H4dAwNQMWcaxnDLs2O5IECN3SlLM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711577017; c=relaxed/simple; bh=99gZa2i0sUzSawrRZCPo/XlCgwX1PBlR4tNSa5sh+L0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=SN1Svsb4HsRd7hJxYGIUKDscDCZTyV4e3tvNC0QxfTKrA8CoYpfSxG2AGPLRSYBN5W7kurr/ZnMw/Vyi18D0+4ZHqYPoqFji2zJ8aZCmiVVC6rgGQwk8uYKWN+JGZKuDwP1V07+TIKMZ6Ir/PZaoQizf1dNMe/aDwfzP59S9PYk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=KYPrLiHZ; arc=none smtp.client-ip=209.85.218.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="KYPrLiHZ" Received: by mail-ej1-f46.google.com with SMTP id a640c23a62f3a-a46de423039so17813666b.0; Wed, 27 Mar 2024 15:03:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1711577014; x=1712181814; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=89IafmFZ/aI3kr80E1zIue4BOC9yvNRvlIwDPCL8NKM=; b=KYPrLiHZJWzE9k1cFkO27WjK+BUKX74OpXsRxFSvqM72cY8FFsoPctlqKQI/4hCn7W p+2Ag0ijAW5bUvcFZKfkKnF+hJUwhX3Aq7/BnZ3IJRyqxAA6fewuflDzs+ETV8vC6ap4 pbBgly8lEikfWTq8eDlVgR6A15Zzy4C8eNXOfZAQ2XArXftZptTXka6EG2fzT1bkAD5C Nq9hyvtP/U/vBDxzbwoy7XkAHpte8aMioKBgHIizcprx1Fl1iQwnQtg6as3+1FY2dwca o2Ne8gqZEbBzmVSUE2+4Zulw9ukZSrA2QsJhbwgQZW+gLwA6+7LNXMQNrvZfVPqHSUwB 6LdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711577014; x=1712181814; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=89IafmFZ/aI3kr80E1zIue4BOC9yvNRvlIwDPCL8NKM=; b=nyRTpGWXqQZh2XWDhA5cMhNnuJftUn9pSJB/vQ6IMEbIP9tFxSgusDKVTIStbjVg7T sTTXQBkG4Ugerqy2AW1+ZX2bhmMPcK/haWzuwJ81bO4+Yhkthcp8g4h15fhFr5KRSFxn 3ktSvHV/1E3N5f2OE1HDgENO9gXQudrtC99GtxpwUAdlGt4ZdsI0t6vOkrcZD97I3MwI RcHpQXfSVBlbDD/NlIdAJXi55z+DvLB7l/u5mSU2epmfN2nuApCeLkwKqbVtV9R20ebF jW8Hjbd94SyC0b63sxVKvSLKm+kxWqjJTxeHcYjXaXeSka2i5QFsjpcZewcY+gIggkUs j2wQ== X-Forwarded-Encrypted: i=1; AJvYcCX2D0MC17GwJTqBDUq0IbD+j2ebGbh/z/+b07Qeru434Qnps4rUPUw2p6IWmU4BN0cqJl3EbSBKFQZ39X2i4JuKM+/OcG6snH63t9Mf40OP6jC7DtrF7bVjH0BxJ1c4TIhbR4BmGKOVmg== X-Gm-Message-State: AOJu0Yx2MWqjYlXXYiXqdP6+bj++7UtXZ4TpJ2VxIt4hPjzjVeKodcrM VcBRaQUtkBhcFXeyARE04klLL7Ar2lRdy+HTzL0TwJFjkpTkQyUY X-Google-Smtp-Source: AGHT+IHjgcrbf7p6HGY/IJsRM+A/ALwN8WMUCZBO7hvHj3auPa7zmZ7DKEyV4ZgbPPw2WkqRwizfIg== X-Received: by 2002:a50:9559:0:b0:56c:995:5b with SMTP id v25-20020a509559000000b0056c0995005bmr1205178eda.11.1711577014126; Wed, 27 Mar 2024 15:03:34 -0700 (PDT) Received: from 51a0132e405f.v.cablecom.net (84-72-156-211.dclient.hispeed.ch. [84.72.156.211]) by smtp.gmail.com with ESMTPSA id f25-20020a056402161900b0056bc0c44f02sm59151edv.96.2024.03.27.15.03.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Mar 2024 15:03:33 -0700 (PDT) From: Lothar Rubusch To: lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, eraretuya@gmail.com, l.rubusch@gmail.com Subject: [PATCH v5 5/7] iio: accel: adxl345: Pass function pointer to core Date: Wed, 27 Mar 2024 22:03:18 +0000 Message-Id: <20240327220320.15509-6-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240327220320.15509-1-l.rubusch@gmail.com> References: <20240327220320.15509-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add a function pointer argument to the probe function in the core module to provide a way to pre-configure the bus. The passed setup function can be prepared in the bus specific spi or the i2c module, or NULL otherwise. It shall then be executed in the bus independent core module. Signed-off-by: Lothar Rubusch --- drivers/iio/accel/adxl345.h | 3 ++- drivers/iio/accel/adxl345_core.c | 10 +++++++++- drivers/iio/accel/adxl345_i2c.c | 2 +- drivers/iio/accel/adxl345_spi.c | 2 +- 4 files changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/iio/accel/adxl345.h b/drivers/iio/accel/adxl345.h index 564f7baf1..4ea9341d4 100644 --- a/drivers/iio/accel/adxl345.h +++ b/drivers/iio/accel/adxl345.h @@ -65,6 +65,7 @@ struct adxl345_chip_info { int uscale; }; -int adxl345_core_probe(struct device *dev, struct regmap *regmap); +int adxl345_core_probe(struct device *dev, struct regmap *regmap, + int (*setup)(struct device*, struct regmap*)); #endif /* _ADXL345_H_ */ diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl345_core.c index c7c1156e8..40aab7683 100644 --- a/drivers/iio/accel/adxl345_core.c +++ b/drivers/iio/accel/adxl345_core.c @@ -168,13 +168,21 @@ static void adxl345_powerdown(void *regmap) regmap_write(regmap, ADXL345_REG_POWER_CTL, ADXL345_POWER_CTL_STANDBY); } -int adxl345_core_probe(struct device *dev, struct regmap *regmap) +int adxl345_core_probe(struct device *dev, struct regmap *regmap, + int (*setup)(struct device*, struct regmap*)) { struct adxl345_data *data; struct iio_dev *indio_dev; u32 regval; int ret; + /* Perform optional initial bus specific configuration */ + if (setup) { + ret = setup(dev, regmap); + if (ret) + return ret; + } + ret = regmap_read(regmap, ADXL345_REG_DEVID, ®val); if (ret < 0) return dev_err_probe(dev, ret, "Error reading device ID\n"); diff --git a/drivers/iio/accel/adxl345_i2c.c b/drivers/iio/accel/adxl345_i2c.c index a3084b0a8..4065b8f7c 100644 --- a/drivers/iio/accel/adxl345_i2c.c +++ b/drivers/iio/accel/adxl345_i2c.c @@ -27,7 +27,7 @@ static int adxl345_i2c_probe(struct i2c_client *client) if (IS_ERR(regmap)) return dev_err_probe(&client->dev, PTR_ERR(regmap), "Error initializing regmap\n"); - return adxl345_core_probe(&client->dev, regmap); + return adxl345_core_probe(&client->dev, regmap, NULL); } static const struct adxl345_chip_info adxl345_i2c_info = { diff --git a/drivers/iio/accel/adxl345_spi.c b/drivers/iio/accel/adxl345_spi.c index 93ca349f1..1c0513bd3 100644 --- a/drivers/iio/accel/adxl345_spi.c +++ b/drivers/iio/accel/adxl345_spi.c @@ -33,7 +33,7 @@ static int adxl345_spi_probe(struct spi_device *spi) if (IS_ERR(regmap)) return dev_err_probe(&spi->dev, PTR_ERR(regmap), "Error initializing regmap\n"); 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[84.72.156.211]) by smtp.gmail.com with ESMTPSA id f25-20020a056402161900b0056bc0c44f02sm59151edv.96.2024.03.27.15.03.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Mar 2024 15:03:34 -0700 (PDT) From: Lothar Rubusch To: lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, eraretuya@gmail.com, l.rubusch@gmail.com Subject: [PATCH v5 6/7] iio: accel: adxl345: Add comment to probe Date: Wed, 27 Mar 2024 22:03:19 +0000 Message-Id: <20240327220320.15509-7-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240327220320.15509-1-l.rubusch@gmail.com> References: <20240327220320.15509-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add a comment to the probe() function to describe the passed function pointer setup in particular. Signed-off-by: Lothar Rubusch --- drivers/iio/accel/adxl345_core.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl345_core.c index 40aab7683..0046e8d19 100644 --- a/drivers/iio/accel/adxl345_core.c +++ b/drivers/iio/accel/adxl345_core.c @@ -168,6 +168,16 @@ static void adxl345_powerdown(void *regmap) regmap_write(regmap, ADXL345_REG_POWER_CTL, ADXL345_POWER_CTL_STANDBY); } +/** + * adxl345_core_probe() - probe and setup for the adxl345 accelerometer, + * also covers the adlx375 accelerometer + * @dev: Driver model representation of the device + * @regmap: Regmap instance for the device + * @setup: Setup routine to be executed right before the standard device + * setup + * + * Return: 0 on success, negative errno on error + */ int adxl345_core_probe(struct device *dev, struct regmap *regmap, int (*setup)(struct device*, struct regmap*)) { From patchwork Wed Mar 27 22:03:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lothar Rubusch X-Patchwork-Id: 13607548 Received: from mail-lf1-f52.google.com (mail-lf1-f52.google.com [209.85.167.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 787C51552EB; Wed, 27 Mar 2024 22:03:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711577020; cv=none; b=CjlmS8hpIWaEu4PHPI+qbbFvGx+wy0SsHIW3a+BLbaOr1rtgdtrRMfLbKkXReCFm/1CqXLfZ0RMxk1fLElbb0z9NXY3IOUPvhXuoAF3iUlKE+YQvpRbWbQ23LI+DgPUHYM6ygA6CGGHG08QscoY2JVTOHryHX1qEa9J3pJ1HTZI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711577020; c=relaxed/simple; bh=M6AuuuSxjeMQyVLwZxWmhaaq1eq0ZZCoM/yjkhatSRQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=dkqxveqDklJE8vvUzDJC2PO/EcDbiLen6vIjyPDxCf2cmWD5Y5xwtnGXtHtQA7A0AU5Iyv/9OJYgoiQC0FX5Nh3/HS1nbwHNO8TARYE0QDNkLTLKDTJ+5FD2HN2y8IerQmNxB7nwID1zg3EYUKoHEfNgZTwjSadlf2xz8DIBBdc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=YRyZ2gRP; arc=none smtp.client-ip=209.85.167.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="YRyZ2gRP" Received: by mail-lf1-f52.google.com with SMTP id 2adb3069b0e04-513da1c1f26so273538e87.3; Wed, 27 Mar 2024 15:03:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1711577016; x=1712181816; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BZUndJ3DD47y3ywaAfiwyQ7ryKmAeKm2Vgw1guGNzKQ=; b=YRyZ2gRPoinKDUCjmMawKZ6VSIkGO4b1zMavBaUtQtNC/g5bUyi59QNxiJJgAvnCK/ qq4/t0GLh9vaSBT9YA8OimdDBVB/GmnxRSvbrHrqWxhRiDFFGUFY14GKF6J5bDY00LWN 7LCN+LUf3UsGmDNGUr/eb9dOpttSrndJzdSqmAjgL8Uh/2bxX6GbGRCViD4i6QuD31JU olYT4ZM05j/Q2zCBrqokE8E03q0pXbOrn8BQ0YUgRdF1hTWDf66HjYwsLSzM8ZcfF4+Y /b8EMphnL/0mUgmAhdiruRJwx0YDrh6cklP81hJ3yS4zwed28+I684CODAG2xpHPVD+r iyeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711577016; x=1712181816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BZUndJ3DD47y3ywaAfiwyQ7ryKmAeKm2Vgw1guGNzKQ=; b=CSmQu/ltjoPUpfy6yMOnVshBYJGwEMrP14FAqFLH+HY18Uv8dynPpp8FwaDXedRzxq ind76Jz7KGJEK8/OzJXtGbnoncSK8Y8WmBzwkFCRswEq/NQg2llspcMH/Qe4/ZBqlrVN QuHHdKOcoQ+lRyzDlXA1dlztZOkEdTebGNfmO29wQOY2/nOT2DhYWlgEjBRIQyaAZssR mWH2Ivxl76leGkKu+KpiHEMyq9jajIjEzgG9AIfB9i1Z+RX6a2hZ/PxdW2d9kSxCY4vb VSt5UlbAxyQxm3vc3xlYFl+kdyCIZvWmA+faNUpRQT3xuG9Iz9pO7oVsn2jtNYyxt8wi kG4Q== X-Forwarded-Encrypted: i=1; AJvYcCUVCjpRh69Zm5LnwqoZqioSEjUs+HSJ+v6NSv5X3PtRozF+nOBaf7PMem4KYinb6qcGBjJNlWjGu2A+Vm/r3n0kpjfQ0KF9q1QqdB6hLxueZkr3HKBeZPxnLcl8OPAYkEKjU/I1nYFnsA== X-Gm-Message-State: AOJu0YyleuCbVMQhSLwsiNsSlIcM6m32aaEITi/qrtYyHeK8Nj1GS7RO t/syOyDyP4IA3K0hF6V9r43zw5IDoPhTYv9YHb2KRV5TqtXnoBv+ X-Google-Smtp-Source: AGHT+IH28rgpRyR91X0Tct3qGtcWzyLxHNUYT+ZeaaaAVeqgBmaoWIsnlixLlp7pthnLeGPhuNp0UA== X-Received: by 2002:a19:5e58:0:b0:513:a88b:3296 with SMTP id z24-20020a195e58000000b00513a88b3296mr474509lfi.9.1711577016344; Wed, 27 Mar 2024 15:03:36 -0700 (PDT) Received: from 51a0132e405f.v.cablecom.net (84-72-156-211.dclient.hispeed.ch. [84.72.156.211]) by smtp.gmail.com with ESMTPSA id f25-20020a056402161900b0056bc0c44f02sm59151edv.96.2024.03.27.15.03.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Mar 2024 15:03:35 -0700 (PDT) From: Lothar Rubusch To: lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, eraretuya@gmail.com, l.rubusch@gmail.com Subject: [PATCH v5 7/7] iio: accel: adxl345: Add spi-3wire option Date: Wed, 27 Mar 2024 22:03:20 +0000 Message-Id: <20240327220320.15509-8-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240327220320.15509-1-l.rubusch@gmail.com> References: <20240327220320.15509-1-l.rubusch@gmail.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add a setup function implementation to the spi module to enable spi-3wire as option when specified in the device-tree. Signed-off-by: Lothar Rubusch --- drivers/iio/accel/adxl345.h | 2 ++ drivers/iio/accel/adxl345_spi.c | 12 +++++++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/iio/accel/adxl345.h b/drivers/iio/accel/adxl345.h index 4ea9341d4..e6bc3591c 100644 --- a/drivers/iio/accel/adxl345.h +++ b/drivers/iio/accel/adxl345.h @@ -30,6 +30,8 @@ #define ADXL345_POWER_CTL_MEASURE BIT(3) #define ADXL345_POWER_CTL_STANDBY 0x00 +#define ADXL345_DATA_FORMAT_SPI_3WIRE BIT(6) /* 3-wire SPI mode */ + #define ADXL345_DATA_FORMAT_RANGE GENMASK(1, 0) /* Set the g range */ #define ADXL345_DATA_FORMAT_JUSTIFY BIT(2) /* Left-justified (MSB) mode */ #define ADXL345_DATA_FORMAT_FULL_RES BIT(3) /* Up to 13-bits resolution */ diff --git a/drivers/iio/accel/adxl345_spi.c b/drivers/iio/accel/adxl345_spi.c index 1c0513bd3..f145d5c1d 100644 --- a/drivers/iio/accel/adxl345_spi.c +++ b/drivers/iio/accel/adxl345_spi.c @@ -20,6 +20,16 @@ static const struct regmap_config adxl345_spi_regmap_config = { .read_flag_mask = BIT(7) | BIT(6), }; +static int adxl345_spi_setup(struct device *dev, struct regmap *regmap) +{ + struct spi_device *spi = container_of(dev, struct spi_device, dev); + + if (spi->mode & SPI_3WIRE) + return regmap_write(regmap, ADXL345_REG_DATA_FORMAT, + ADXL345_DATA_FORMAT_SPI_3WIRE); + return 0; +} + static int adxl345_spi_probe(struct spi_device *spi) { struct regmap *regmap; @@ -33,7 +43,7 @@ static int adxl345_spi_probe(struct spi_device *spi) if (IS_ERR(regmap)) return dev_err_probe(&spi->dev, PTR_ERR(regmap), "Error initializing regmap\n"); - return adxl345_core_probe(&spi->dev, regmap, NULL); + return adxl345_core_probe(&spi->dev, regmap, adxl345_spi_setup); } static const struct adxl345_chip_info adxl345_spi_info = {