From patchwork Fri Mar 29 09:11:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicola Vetrini X-Patchwork-Id: 13610409 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D99CDC6FD1F for ; Fri, 29 Mar 2024 09:12:01 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.699278.1091991 (Exim 4.92) (envelope-from ) id 1rq8H3-0001BX-Qp; Fri, 29 Mar 2024 09:11:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 699278.1091991; Fri, 29 Mar 2024 09:11:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rq8H3-0001BQ-OK; Fri, 29 Mar 2024 09:11:45 +0000 Received: by outflank-mailman (input) for mailman id 699278; Fri, 29 Mar 2024 09:11:44 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rq8H2-0000x2-By for xen-devel@lists.xenproject.org; Fri, 29 Mar 2024 09:11:44 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 5b9a590e-edac-11ee-afe3-a90da7624cb6; Fri, 29 Mar 2024 10:11:42 +0100 (CET) Received: from nico.bugseng.com (unknown [176.206.12.122]) by support.bugseng.com (Postfix) with ESMTPSA id 2285D4EE0743; Fri, 29 Mar 2024 10:11:41 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5b9a590e-edac-11ee-afe3-a90da7624cb6 From: Nicola Vetrini To: nicola.vetrini@bugseng.com, xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, michal.orzel@amd.com, xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com, consulting@bugseng.com, bertrand.marquis@arm.com, julien@xen.org, Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Subject: [XEN PATCH v3 1/7] x86/msi: address violation of MISRA C Rule 20.7 and coding style Date: Fri, 29 Mar 2024 10:11:29 +0100 Message-Id: <2f2c865f20d0296e623f1d65bed25c083f5dd497.1711700095.git.nicola.vetrini@bugseng.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 MISRA C Rule 20.7 states: "Expressions resulting from the expansion of macro parameters shall be enclosed in parentheses". Therefore, some macro definitions should gain additional parentheses to ensure that all current and future users will be safe with respect to expansions that can possibly alter the semantics of the passed-in macro parameter. While at it, the style of these macros has been somewhat uniformed. No functional change. Signed-off-by: Nicola Vetrini --- Changes in v2: - Make the style change more consistent --- xen/arch/x86/include/asm/msi.h | 49 +++++++++++++++++----------------- 1 file changed, 25 insertions(+), 24 deletions(-) diff --git a/xen/arch/x86/include/asm/msi.h b/xen/arch/x86/include/asm/msi.h index 997ccb87be0c..bd110c357ce4 100644 --- a/xen/arch/x86/include/asm/msi.h +++ b/xen/arch/x86/include/asm/msi.h @@ -147,33 +147,34 @@ int msi_free_irq(struct msi_desc *entry); */ #define NR_HP_RESERVED_VECTORS 20 -#define msi_control_reg(base) (base + PCI_MSI_FLAGS) -#define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO) -#define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI) -#define msi_data_reg(base, is64bit) \ - ( (is64bit == 1) ? base+PCI_MSI_DATA_64 : base+PCI_MSI_DATA_32 ) -#define msi_mask_bits_reg(base, is64bit) \ - ( (is64bit == 1) ? base+PCI_MSI_MASK_BIT : base+PCI_MSI_MASK_BIT-4) +#define msi_control_reg(base) ((base) + PCI_MSI_FLAGS) +#define msi_lower_address_reg(base) ((base) + PCI_MSI_ADDRESS_LO) +#define msi_upper_address_reg(base) ((base) + PCI_MSI_ADDRESS_HI) +#define msi_data_reg(base, is64bit) \ + (((is64bit) == 1) ? (base) + PCI_MSI_DATA_64 : (base) + PCI_MSI_DATA_32) +#define msi_mask_bits_reg(base, is64bit) \ + (((is64bit) == 1) ? (base) + PCI_MSI_MASK_BIT \ + : (base) + PCI_MSI_MASK_BIT - 4) #define msi_pending_bits_reg(base, is64bit) \ - ((base) + PCI_MSI_MASK_BIT + ((is64bit) ? 4 : 0)) -#define msi_disable(control) control &= ~PCI_MSI_FLAGS_ENABLE + ((base) + PCI_MSI_MASK_BIT + ((is64bit) ? 4 : 0)) +#define msi_disable(control) ({ (control) &= ~PCI_MSI_FLAGS_ENABLE }) #define multi_msi_capable(control) \ - (1 << ((control & PCI_MSI_FLAGS_QMASK) >> 1)) + (1 << (((control) & PCI_MSI_FLAGS_QMASK) >> 1)) #define multi_msi_enable(control, num) \ - control |= (((fls(num) - 1) << 4) & PCI_MSI_FLAGS_QSIZE); -#define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT)) -#define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT)) -#define msi_enable(control, num) multi_msi_enable(control, num); \ - control |= PCI_MSI_FLAGS_ENABLE - -#define msix_control_reg(base) (base + PCI_MSIX_FLAGS) -#define msix_table_offset_reg(base) (base + PCI_MSIX_TABLE) -#define msix_pba_offset_reg(base) (base + PCI_MSIX_PBA) -#define msix_enable(control) control |= PCI_MSIX_FLAGS_ENABLE -#define msix_disable(control) control &= ~PCI_MSIX_FLAGS_ENABLE -#define msix_table_size(control) ((control & PCI_MSIX_FLAGS_QSIZE)+1) -#define msix_unmask(address) (address & ~PCI_MSIX_VECTOR_BITMASK) -#define msix_mask(address) (address | PCI_MSIX_VECTOR_BITMASK) + ({ (control) |= (((fls(num) - 1) << 4) & PCI_MSI_FLAGS_QSIZE) }) +#define is_64bit_address(control) (!!((control) & PCI_MSI_FLAGS_64BIT)) +#define is_mask_bit_support(control) (!!((control) & PCI_MSI_FLAGS_MASKBIT)) +#define msi_enable(control, num) ({ multi_msi_enable(control, num); \ + (control) |= PCI_MSI_FLAGS_ENABLE }) + +#define msix_control_reg(base) ((base) + PCI_MSIX_FLAGS) +#define msix_table_offset_reg(base) ((base) + PCI_MSIX_TABLE) +#define msix_pba_offset_reg(base) ((base) + PCI_MSIX_PBA) +#define msix_enable(control) ({ (control) |= PCI_MSIX_FLAGS_ENABLE }) +#define msix_disable(control) ({ (control) &= ~PCI_MSIX_FLAGS_ENABLE }) +#define msix_table_size(control) (((control) & PCI_MSIX_FLAGS_QSIZE) + 1) +#define msix_unmask(address) ((address) & ~PCI_MSIX_VECTOR_BITMASK) +#define msix_mask(address) ((address) | PCI_MSIX_VECTOR_BITMASK) /* * MSI Defined Data Structures From patchwork Fri Mar 29 09:11:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicola Vetrini X-Patchwork-Id: 13610414 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8DAA4CD1292 for ; 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Fri, 29 Mar 2024 10:11:43 +0100 (CET) Received: from nico.bugseng.com (unknown [176.206.12.122]) by support.bugseng.com (Postfix) with ESMTPSA id 4DB7C4EE0744; Fri, 29 Mar 2024 10:11:42 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5c11d5b4-edac-11ee-afe3-a90da7624cb6 From: Nicola Vetrini To: nicola.vetrini@bugseng.com, xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, michal.orzel@amd.com, xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com, consulting@bugseng.com, bertrand.marquis@arm.com, julien@xen.org, Volodymyr Babchuk Subject: [XEN PATCH v3 2/7] arm/public: address violations of MISRA C Rule 20.7 Date: Fri, 29 Mar 2024 10:11:30 +0100 Message-Id: <142c27a41cea7402a68035dd466db0b47487fb06.1711700095.git.nicola.vetrini@bugseng.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 MISRA C Rule 20.7 states: "Expressions resulting from the expansion of macro parameters shall be enclosed in parentheses". Therefore, some macro definitions should gain additional parentheses to ensure that all current and future users will be safe with respect to expansions that can possibly alter the semantics of the passed-in macro parameter. No functional change. Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini --- xen/include/public/arch-arm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index a25e87dbda3a..e167e14f8df9 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -209,7 +209,7 @@ do { \ __typeof__(&(hnd)) _sxghr_tmp = &(hnd); \ _sxghr_tmp->q = 0; \ - _sxghr_tmp->p = val; \ + _sxghr_tmp->p = (val); \ } while ( 0 ) #define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val) From patchwork Fri Mar 29 09:11:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicola Vetrini X-Patchwork-Id: 13610416 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 93E04CD1294 for ; Fri, 29 Mar 2024 09:12:03 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.699280.1092011 (Exim 4.92) (envelope-from ) id 1rq8H5-0001em-Bm; Fri, 29 Mar 2024 09:11:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 699280.1092011; Fri, 29 Mar 2024 09:11:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rq8H5-0001ef-7D; Fri, 29 Mar 2024 09:11:47 +0000 Received: by outflank-mailman (input) for mailman id 699280; Fri, 29 Mar 2024 09:11:46 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rq8H4-0000x2-0m for xen-devel@lists.xenproject.org; Fri, 29 Mar 2024 09:11:46 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 5caf7aa1-edac-11ee-afe3-a90da7624cb6; Fri, 29 Mar 2024 10:11:44 +0100 (CET) Received: from nico.bugseng.com (unknown [176.206.12.122]) by support.bugseng.com (Postfix) with ESMTPSA id 026534EE0747; Fri, 29 Mar 2024 10:11:42 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5caf7aa1-edac-11ee-afe3-a90da7624cb6 From: Nicola Vetrini To: nicola.vetrini@bugseng.com, xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, michal.orzel@amd.com, xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com, consulting@bugseng.com, bertrand.marquis@arm.com, julien@xen.org, Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Subject: [XEN PATCH v3 3/7] x86/vPMU: address violations of MISRA C Rule 20.7 Date: Fri, 29 Mar 2024 10:11:31 +0100 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 MISRA C Rule 20.7 states: "Expressions resulting from the expansion of macro parameters shall be enclosed in parentheses". Therefore, some macro definitions should gain additional parentheses to ensure that all current and future users will be safe with respect to expansions that can possibly alter the semantics of the passed-in macro parameter. No functional change. Signed-off-by: Nicola Vetrini Acked-by: Jan Beulich --- xen/arch/x86/include/asm/vpmu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/include/asm/vpmu.h b/xen/arch/x86/include/asm/vpmu.h index f271f28e4a74..dae9b43dac6e 100644 --- a/xen/arch/x86/include/asm/vpmu.h +++ b/xen/arch/x86/include/asm/vpmu.h @@ -23,8 +23,8 @@ #define MSR_TYPE_ARCH_CTRL 4 /* Start of PMU register bank */ -#define vpmu_reg_pointer(ctxt, offset) ((void *)((uintptr_t)ctxt + \ - (uintptr_t)ctxt->offset)) +#define vpmu_reg_pointer(ctxt, offset) ((void *)((uintptr_t)(ctxt) + \ + (uintptr_t)(ctxt)->offset)) /* Arch specific operations shared by all vpmus */ struct arch_vpmu_ops { From patchwork Fri Mar 29 09:11:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicola Vetrini X-Patchwork-Id: 13610411 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E2E61CD1290 for ; Fri, 29 Mar 2024 09:12:02 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.699281.1092016 (Exim 4.92) (envelope-from ) id 1rq8H5-0001hj-Lj; Fri, 29 Mar 2024 09:11:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 699281.1092016; Fri, 29 Mar 2024 09:11:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rq8H5-0001gK-Er; Fri, 29 Mar 2024 09:11:47 +0000 Received: by outflank-mailman (input) for mailman id 699281; Fri, 29 Mar 2024 09:11:46 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rq8H4-0000ww-5C for xen-devel@lists.xenproject.org; Fri, 29 Mar 2024 09:11:46 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 5cfe1f74-edac-11ee-a1ef-f123f15fe8a2; Fri, 29 Mar 2024 10:11:44 +0100 (CET) Received: from nico.bugseng.com (unknown [176.206.12.122]) by support.bugseng.com (Postfix) with ESMTPSA id 0A5614EE0748; Fri, 29 Mar 2024 10:11:44 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5cfe1f74-edac-11ee-a1ef-f123f15fe8a2 From: Nicola Vetrini To: nicola.vetrini@bugseng.com, xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, michal.orzel@amd.com, xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com, consulting@bugseng.com, bertrand.marquis@arm.com, julien@xen.org, Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Subject: [XEN PATCH v3 4/7] x86/hvm: address violations of MISRA C Rule 20.7 Date: Fri, 29 Mar 2024 10:11:32 +0100 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 MISRA C Rule 20.7 states: "Expressions resulting from the expansion of macro parameters shall be enclosed in parentheses". Therefore, some macro definitions should gain additional parentheses to ensure that all current and future users will be safe with respect to expansions that can possibly alter the semantics of the passed-in macro parameter. No functional change. Signed-off-by: Nicola Vetrini Acked-by: Jan Beulich --- xen/arch/x86/hvm/domain.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/hvm/domain.c b/xen/arch/x86/hvm/domain.c index 7f6e362a702e..b96cf93dd0ef 100644 --- a/xen/arch/x86/hvm/domain.c +++ b/xen/arch/x86/hvm/domain.c @@ -132,9 +132,9 @@ int arch_set_info_hvm_guest(struct vcpu *v, const struct vcpu_hvm_context *ctx) s = (struct segment_register) \ { 0, { (r)->s ## _ar }, (r)->s ## _limit, (r)->s ## _base }; \ /* Set accessed / busy bit for present segments. */ \ - if ( s.p ) \ - s.type |= (x86_seg_##s != x86_seg_tr ? 1 : 2); \ - check_segment(&s, x86_seg_ ## s); }) + if ( (s).p ) \ + (s).type |= (x86_seg_##s != x86_seg_tr ? 1 : 2); \ + check_segment(&(s), x86_seg_ ## s); }) rc = SEG(cs, regs); rc |= SEG(ds, regs); From patchwork Fri Mar 29 09:11:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicola Vetrini X-Patchwork-Id: 13610415 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 210C2CD1291 for ; Fri, 29 Mar 2024 09:12:03 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.699283.1092028 (Exim 4.92) (envelope-from ) id 1rq8H6-0001vf-Bk; Fri, 29 Mar 2024 09:11:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 699283.1092028; Fri, 29 Mar 2024 09:11:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rq8H6-0001so-2z; Fri, 29 Mar 2024 09:11:48 +0000 Received: by outflank-mailman (input) for mailman id 699283; Fri, 29 Mar 2024 09:11:47 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rq8H5-0000ww-5Q for xen-devel@lists.xenproject.org; Fri, 29 Mar 2024 09:11:47 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 5d5014f1-edac-11ee-a1ef-f123f15fe8a2; Fri, 29 Mar 2024 10:11:45 +0100 (CET) Received: from nico.bugseng.com (unknown [176.206.12.122]) by support.bugseng.com (Postfix) with ESMTPSA id 80D7F4EE0742; Fri, 29 Mar 2024 10:11:44 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5d5014f1-edac-11ee-a1ef-f123f15fe8a2 From: Nicola Vetrini To: nicola.vetrini@bugseng.com, xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, michal.orzel@amd.com, xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com, consulting@bugseng.com, bertrand.marquis@arm.com, julien@xen.org, Simone Ballarin , Doug Goldstein , Andrew Cooper , George Dunlap , Jan Beulich Subject: [XEN PATCH v3 5/7] automation/eclair: add deviations for Rule 20.7 Date: Fri, 29 Mar 2024 10:11:33 +0100 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 These deviations deal with the following cases: - macro arguments used directly as initializer list arguments; - uses of the __config_enabled macro, that can't be brought into compliance without breaking its functionality; - exclude files that are out of scope (efi headers and cpu_idle); - uses of alternative_{call,vcall}[0-9] macros. The existing configuration for R20.7 is reordered so that it matches the cases listed in its documentation comment. Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini Reviewed-by: Stefano Stabellini --- .../eclair_analysis/ECLAIR/deviations.ecl | 25 +++++++++++++++++-- docs/misra/deviations.rst | 14 ++++++++++- docs/misra/rules.rst | 2 +- 3 files changed, 37 insertions(+), 4 deletions(-) diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl index de9ba723fbc7..70756503f594 100644 --- a/automation/eclair_analysis/ECLAIR/deviations.ecl +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl @@ -401,12 +401,33 @@ unexpected result when the structure is given as argument to a sizeof() operator -doc_begin="Code violating Rule 20.7 is safe when macro parameters are used: (1) as function arguments; (2) as macro arguments; (3) as array indices; (4) as lhs -in assignments." +in assignments; (5) as initializers, possibly designated, in initalizer lists." -config=MC3R1.R20.7,expansion_context= {safe, "context(__call_expr_arg_contexts)"}, +{safe, "left_right(^[(,\\[]$,^[),\\]]$)"}, {safe, "context(skip_to(__expr_non_syntactic_contexts, stmt_child(node(array_subscript_expr), subscript)))"}, {safe, "context(skip_to(__expr_non_syntactic_contexts, stmt_child(operator(assign), lhs)))"}, -{safe, "left_right(^[(,\\[]$,^[),\\]]$)"} +{safe, "context(skip_to(__expr_non_syntactic_contexts, stmt_child(node(init_list_expr||designated_init_expr), init)))"} +-doc_end + +-doc_begin="Violations involving the __config_enabled macros cannot be fixed without +breaking the macro's logic; futhermore, the macro is only ever used in the context +of the IS_ENABLED or STATIC_IF/STATIC_IF_NOT macros, so it always receives a literal +0 or 1 as input, posing no risk to safety." +-config=MC3R1.R20.7,reports+={safe, "any_area(any_loc(any_exp(macro(^___config_enabled$))))"} +-doc_end + +-doc_begin="Violations due to the use of macros defined in files that are +not in scope for compliance are allowed, as that is imported code." +-file_tag+={gnu_efi_include, "^xen/include/efi/.*$"} +-file_tag+={acpi_cpu_idle, "^xen/arch/x86/acpi/cpu_idle\\.c$"} +-config=MC3R1.R20.7,reports+={safe, "any_area(any_loc(file(gnu_efi_include)))"} +-config=MC3R1.R20.7,reports+={safe, "any_area(any_loc(file(acpi_cpu_idle)))"} +-doc_end + +-doc_begin="To avoid compromising readability, the macros alternative_(v)?call[0-9] are allowed +not to parenthesize their arguments." +-config=MC3R1.R20.7,reports+={safe, "any_area(any_loc(any_exp(macro(^alternative_(v)?call[0-9]$))))"} -doc_end -doc_begin="Uses of variadic macros that have one of their arguments defined as diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst index eb5ef2bd9dd6..5fdacfd420a1 100644 --- a/docs/misra/deviations.rst +++ b/docs/misra/deviations.rst @@ -345,7 +345,19 @@ Deviations related to MISRA C:2012 Rules: (1) as function arguments; (2) as macro arguments; (3) as array indices; - (4) as lhs in assignments. + (4) as lhs in assignments; + (5) as initializers, possibly designated, in initalizer lists. + - Tagged as `safe` for ECLAIR. + + * - R20.7 + - Violations due to the use of macros defined in files that are not + in scope for compliance are allowed, as that is imported code. + - Tagged as `safe` for ECLAIR. + + * - R20.7 + - To avoid compromising readability, the macros `alternative_(v)?call[0-9]` + are allowed not to parenthesize their arguments, as there are already + sanity checks in place. - Tagged as `safe` for ECLAIR. * - R20.12 diff --git a/docs/misra/rules.rst b/docs/misra/rules.rst index 1e134ccebc48..3914af08495b 100644 --- a/docs/misra/rules.rst +++ b/docs/misra/rules.rst @@ -560,7 +560,7 @@ maintainers if you want to suggest a change. shall be enclosed in parentheses - Extra parentheses are not required when macro parameters are used as function arguments, as macro arguments, array indices, lhs in - assignments + assignments or as initializers in initalizer lists. * - `Rule 20.9 `_ - Required From patchwork Fri Mar 29 09:11:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicola Vetrini X-Patchwork-Id: 13610412 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0F76FCD128E for ; Fri, 29 Mar 2024 09:12:03 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.699282.1092024 (Exim 4.92) (envelope-from ) id 1rq8H6-0001kE-22; Fri, 29 Mar 2024 09:11:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 699282.1092024; Fri, 29 Mar 2024 09:11:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rq8H5-0001jE-Lp; Fri, 29 Mar 2024 09:11:47 +0000 Received: by outflank-mailman (input) for mailman id 699282; Fri, 29 Mar 2024 09:11:47 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rq8H5-0000x2-0u for xen-devel@lists.xenproject.org; Fri, 29 Mar 2024 09:11:47 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 5d9a25db-edac-11ee-afe3-a90da7624cb6; Fri, 29 Mar 2024 10:11:45 +0100 (CET) Received: from nico.bugseng.com (unknown [176.206.12.122]) by support.bugseng.com (Postfix) with ESMTPSA id 1433F4EE0749; Fri, 29 Mar 2024 10:11:45 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5d9a25db-edac-11ee-afe3-a90da7624cb6 From: Nicola Vetrini To: nicola.vetrini@bugseng.com, xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, michal.orzel@amd.com, xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com, consulting@bugseng.com, bertrand.marquis@arm.com, julien@xen.org, Andrew Cooper , George Dunlap , Jan Beulich Subject: [XEN PATCH v3 6/7] xen/mm: address violations of MISRA C Rule 20.7 Date: Fri, 29 Mar 2024 10:11:34 +0100 Message-Id: <9fade8c540f19876fe7928ab91398bd5e94594b4.1711700095.git.nicola.vetrini@bugseng.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 MISRA C Rule 20.7 states: "Expressions resulting from the expansion of macro parameters shall be enclosed in parentheses". Therefore, some macro definitions should gain additional parentheses to ensure that all current and future users will be safe with respect to expansions that can possibly alter the semantics of the passed-in macro parameter. No functional change. Signed-off-by: Nicola Vetrini Acked-by: Jan Beulich --- xen/include/xen/mm.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h index 3e84960a365f..7561297a7553 100644 --- a/xen/include/xen/mm.h +++ b/xen/include/xen/mm.h @@ -415,15 +415,15 @@ page_list_splice(struct page_list_head *list, struct page_list_head *head) } #define page_list_for_each(pos, head) \ - for ( pos = (head)->next; pos; pos = page_list_next(pos, head) ) + for ( (pos) = (head)->next; (pos); (pos) = page_list_next(pos, head) ) #define page_list_for_each_safe(pos, tmp, head) \ - for ( pos = (head)->next; \ - pos ? (tmp = page_list_next(pos, head), 1) : 0; \ - pos = tmp ) + for ( (pos) = (head)->next; \ + (pos) ? ((tmp) = page_list_next(pos, head), 1) : 0; \ + (pos) = (tmp) ) #define page_list_for_each_safe_reverse(pos, tmp, head) \ - for ( pos = (head)->tail; \ - pos ? (tmp = page_list_prev(pos, head), 1) : 0; \ - pos = tmp ) + for ( (pos) = (head)->tail; \ + (pos) ? ((tmp) = page_list_prev(pos, head), 1) : 0; \ + (pos) = (tmp) ) #else # define page_list_head list_head # define PAGE_LIST_HEAD_INIT LIST_HEAD_INIT From patchwork Fri Mar 29 09:11:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicola Vetrini X-Patchwork-Id: 13610410 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9B494CD1288 for ; Fri, 29 Mar 2024 09:12:02 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.699284.1092050 (Exim 4.92) (envelope-from ) id 1rq8H7-0002Y4-TC; Fri, 29 Mar 2024 09:11:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 699284.1092050; Fri, 29 Mar 2024 09:11:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rq8H7-0002XR-Nf; Fri, 29 Mar 2024 09:11:49 +0000 Received: by outflank-mailman (input) for mailman id 699284; Fri, 29 Mar 2024 09:11:48 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rq8H6-0000ww-5X for xen-devel@lists.xenproject.org; Fri, 29 Mar 2024 09:11:48 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 5de8bcc3-edac-11ee-a1ef-f123f15fe8a2; Fri, 29 Mar 2024 10:11:46 +0100 (CET) Received: from nico.bugseng.com (unknown [176.206.12.122]) by support.bugseng.com (Postfix) with ESMTPSA id 8F3F84EE0C8D; Fri, 29 Mar 2024 10:11:45 +0100 (CET) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5de8bcc3-edac-11ee-a1ef-f123f15fe8a2 From: Nicola Vetrini To: nicola.vetrini@bugseng.com, xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, michal.orzel@amd.com, xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com, consulting@bugseng.com, bertrand.marquis@arm.com, julien@xen.org, Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Subject: [XEN PATCH v3 7/7] x86/amd: address violations of MISRA C Rule 20.7 Date: Fri, 29 Mar 2024 10:11:35 +0100 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 MISRA C Rule 20.7 states: "Expressions resulting from the expansion of macro parameters shall be enclosed in parentheses". Therefore, some macro definitions should gain additional parentheses to ensure that all current and future users will be safe with respect to expansions that can possibly alter the semantics of the passed-in macro parameter. No functional change. Signed-off-by: Nicola Vetrini Acked-by: Jan Beulich --- xen/arch/x86/include/asm/amd.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/include/asm/amd.h b/xen/arch/x86/include/asm/amd.h index 2cc0ce2e9fd2..fa4e0fc766aa 100644 --- a/xen/arch/x86/include/asm/amd.h +++ b/xen/arch/x86/include/asm/amd.h @@ -119,7 +119,8 @@ #define AMD_LEGACY_ERRATUM(...) -1 /* legacy */, __VA_ARGS__, 0 #define AMD_OSVW_ERRATUM(osvw_id, ...) osvw_id, __VA_ARGS__, 0 #define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \ - ((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end)) + (((f) << 24) | ((m_start) << 16) | ((s_start) << 12) | \ + ((m_end) << 4) | (s_end)) #define AMD_MODEL_RANGE_FAMILY(range) (((range) >> 24) & 0xff) #define AMD_MODEL_RANGE_START(range) (((range) >> 12) & 0xfff) #define AMD_MODEL_RANGE_END(range) ((range) & 0xfff)