From patchwork Mon Apr 1 17:21:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13612894 Received: from mail-ed1-f46.google.com (mail-ed1-f46.google.com [209.85.208.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9AEB14CDF9; Mon, 1 Apr 2024 17:22:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711992124; cv=none; b=qGCj79nF0RivD+ijl2YkkD5+GgX62NTRUGTi0Txa4j4aYgkVrkRIywu7PpZD5+sljYho8p+jA+aDnaepyyJaSM7BLrmfZl/ot1FLixf2LRL47ex5C8HuHyjuS3Co5PMLxm8psto4+IWpe+Pu7ldT4EPaaPrenEN13L+haGr9r6Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711992124; c=relaxed/simple; bh=9pkXLlIZF374osaBV+eI1C7R/HMu//q75xIYUjjHffg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=r2j8j3nnwRYu0G6gCzb0oWIKvwYePlD9cDr4X37YppW0kpmhyU3jidqPHpSXP3qsLHDnIp7Vkyc6MYB9jB/xde+AE2kwaIQfrQske9DNZymKXn0BBtBtnkDX1RLpAaTEb7avioBRYmSOcO0LsQlycJcnyT+mxC05DpUeVNaYek8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=NkX4Zgi5; arc=none smtp.client-ip=209.85.208.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="NkX4Zgi5" Received: by mail-ed1-f46.google.com with SMTP id 4fb4d7f45d1cf-56ca3e11006so2264830a12.3; Mon, 01 Apr 2024 10:22:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1711992120; x=1712596920; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6fFoNwrz7Z2PTKzKuXP+UfswKZFc2fljpsBuXAAeuEI=; b=NkX4Zgi5H8z+sJPPdRdVCyK/fG1WLgT7DdzhXF4nNaiKbSeSXEmRg9st3FGS+z12dJ kwuJSyvFHsVK03enw2Xc/IW7yoCbLGszAV94mYwoEVaR3mCUl05LH20OxAk1hr/ty7Om kBwfeuaYhvK4jQUS9vMjUICi9dVORM57V2TtReslD4yyiJweR/VE4VNVsQp7utaQBbq4 hhhZdlUhNfhuVhdpphOXeth7F1oyuBDlupluccSwGUN3BZcQQyJ9X/uz4ortLw8jchnP sqXJTgvIyoMp/SMRcv9/wpDQNsQELEN3bl7A25zwyCURAn2wwSFvNNMVF/l4NMvnBdX0 V2OA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711992120; x=1712596920; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6fFoNwrz7Z2PTKzKuXP+UfswKZFc2fljpsBuXAAeuEI=; b=P6Ay+s7WTGAaBN0N0k2W7TNt4CFEMPeCl5+jJHPG+K3UqBlaIHwPJ2+7jj0Dr1nRlR lceJNkRhJT7CKQ4kSqq72BSNMwNQS+b0jK0uAl1F3U8v8ArhrgXuiCc1xAOuRqIExibE pYu9R3wk2KJYdFWMMpMrlVTsfBh9waF7cLKjvOSIl8APtgsMojstZJgDInvZWi6qXfWT n+PqlSIz00b+Q8Dw6WGTdlsNDPPXNl/uWraNWpFMS1T0xIMTP4cdlyZqA7Y+1NoNdahj CZTH1vIrsybWKFqtXUxXWsFsf+U91X0aGjCzMTdpCZI8a1I8L7KnyQ6Q753NYH+BuhqL URxQ== X-Forwarded-Encrypted: i=1; AJvYcCXxUxU8BJtqEPVv2eVMxPdIGNe5cfYZOkIlBV+3o5zj7hjlgnKrbVQyhzVQSawPthuEM8LEjz35barXetQCOYnufKiini+0Ekdwnbyzg0Z3iNRNhFNWTgpYVk6yDHh3YZPzDzPFO0te5ehEVJU+vElJKYc+T9B+ehm93t0lN4CNFzdHl9KgDR4= X-Gm-Message-State: AOJu0YzTrf6KYL3gUcvH/6tOBOndS9fKpRenabSqwlm7zMJ4rgXt0j7Y Y3SxIrMaz2rxG4KEXiWHP4vf5boLc4QvecLfJeipT9PtdWGQCjTScaY1kySpbXo= X-Google-Smtp-Source: AGHT+IE4/VG0B5HoTCKmvqLWYLnVT8FpSlPmSR5QEOjh2WrU/JieThc0k2yE0m2DF5xwILNzl2mMDg== X-Received: by 2002:a17:907:9445:b0:a4e:5540:7c0c with SMTP id dl5-20020a170907944500b00a4e55407c0cmr4420351ejc.70.1711992119948; Mon, 01 Apr 2024 10:21:59 -0700 (PDT) Received: from localhost.localdomain (ccu40.neoplus.adsl.tpnet.pl. [83.30.144.40]) by smtp.gmail.com with ESMTPSA id xi7-20020a170906dac700b00a4e23486a5dsm5347949ejb.20.2024.04.01.10.21.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Apr 2024 10:21:59 -0700 (PDT) From: Adam Skladowski To: Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/4] arm64: dts: qcom: msm8976: Add IOMMU nodes Date: Mon, 1 Apr 2024 19:21:50 +0200 Message-Id: <20240401172153.9231-2-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240401172153.9231-1-a39.skl@gmail.com> References: <20240401172153.9231-1-a39.skl@gmail.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the nodes describing the apps and gpu iommu and its context banks that are found on msm8976 SoCs. Signed-off-by: Adam Skladowski --- arch/arm64/boot/dts/qcom/msm8976.dtsi | 81 +++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi index d2bb1ada361a..8bdcc1438177 100644 --- a/arch/arm64/boot/dts/qcom/msm8976.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi @@ -808,6 +808,87 @@ tcsr: syscon@1937000 { reg = <0x01937000 0x30000>; }; + apps_iommu: iommu@1ee0000 { + compatible = "qcom,msm8976-iommu", "qcom,msm-iommu-v2"; + reg = <0x01ee0000 0x3000>; + ranges = <0 0x01e20000 0x20000>; + + clocks = <&gcc GCC_SMMU_CFG_CLK>, + <&gcc GCC_APSS_TCU_CLK>; + clock-names = "iface", "bus"; + + qcom,iommu-secure-id = <17>; + + #address-cells = <1>; + #size-cells = <1>; + #iommu-cells = <1>; + + /* VFE */ + iommu-ctx@15000 { + compatible = "qcom,msm-iommu-v2-ns"; + reg = <0x15000 0x1000>; + qcom,ctx-asid = <20>; + interrupts = ; + }; + + /* VENUS NS */ + iommu-ctx@16000 { + compatible = "qcom,msm-iommu-v2-ns"; + reg = <0x16000 0x1000>; + qcom,ctx-asid = <21>; + interrupts = ; + }; + + /* MDP0 */ + iommu-ctx@17000 { + compatible = "qcom,msm-iommu-v2-ns"; + reg = <0x17000 0x1000>; + qcom,ctx-asid = <22>; + interrupts = ; + }; + }; + + gpu_iommu: iommu@1f08000 { + compatible = "qcom,msm8976-iommu", "qcom,msm-iommu-v2"; + ranges = <0 0x01f08000 0x8000>; + + clocks = <&gcc GCC_SMMU_CFG_CLK>, + <&gcc GCC_GFX3D_TCU_CLK>; + clock-names = "iface", "bus"; + + power-domains = <&gcc OXILI_CX_GDSC>; + + qcom,iommu-secure-id = <18>; + + #address-cells = <1>; + #size-cells = <1>; + #iommu-cells = <1>; + + /* gfx3d user */ + iommu-ctx@0 { + compatible = "qcom,msm-iommu-v2-ns"; + reg = <0x0 0x1000>; + qcom,ctx-asid = <0>; + interrupts = ; + }; + + /* gfx3d secure */ + iommu-ctx@1000 { + compatible = "qcom,msm-iommu-v2-sec"; + reg = <0x1000 0x1000>; + qcom,ctx-asid = <2>; + interrupts = ; + }; + + /* gfx3d priv */ + iommu-ctx@2000 { + compatible = "qcom,msm-iommu-v2-sec"; + reg = <0x2000 0x1000>; + qcom,ctx-asid = <1>; + interrupts = ; + }; + }; + spmi_bus: spmi@200f000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x0200f000 0x1000>, From patchwork Mon Apr 1 17:21:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13612895 Received: from mail-ej1-f52.google.com (mail-ej1-f52.google.com [209.85.218.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 376184D59F; Mon, 1 Apr 2024 17:22:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711992126; cv=none; b=daMCFfrAkCr/N0Bg1Kc4YlZaf5Y58o2N6h2lz2sHPN1fz6M4wFqhEbKZqVJelYlICpRk7mqSQpOlG8DTZt+hT5A95DEqfUVWr75vnfVZiJsThcKtNCxjw7fGA/1KXh/9gvW8v805NjjzDQmzTKLypTty/FQaHDlo7VD4lNc6nuk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711992126; c=relaxed/simple; bh=ZGuyczjhEAaFcL1aLiLuxg0XPqkkfM5zVph+1XjqoFw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=WwZSM2HuPskTL7C7onVGBaaPSPDR0vOVxi88yWO3IhnNqzPGEOCFNdQ/lbthFbjYyy2Km2Z5BeSX1ZKkg/CEcVNR39826ubp+b57PlJeZx3vIm4XrcRRkxpJ9F5RlstgxOiYBtUkyYuIRsnqPkgTNnirFmrpTMGS5jJ8ZUfENGk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=DKf8MqQW; arc=none smtp.client-ip=209.85.218.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="DKf8MqQW" Received: by mail-ej1-f52.google.com with SMTP id a640c23a62f3a-a44ad785a44so474855166b.3; Mon, 01 Apr 2024 10:22:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1711992122; x=1712596922; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xl1YvK1CPJJI3lt4hFJM8stWerakJiAw8KgauLK1Qr0=; b=DKf8MqQWRdnEocpDsZo75gDvYAjdO1lDoBh0EAZtG44qvkVbLLPwlDWFScws3ZMDqW Z8TM4htutXLNzGvmIO4nPlps+kiZxNJEX3d5DHCkctyyMlPHtk5/53qFrWX5NpoF1pja MUmZyFB/1q3FaIzNuyOjyNNbWALfGm6VTCnRnzigJAY5ERQrqVpoDymYq+16R8aIwpWb bUbDkmaNDtVRUzUP2yqp27XAZCyUH7LuwC1d5llsekI36ZJhO9aHBmEW9TVddTgcWplW XUi5+j2vU74P7UNeELkX/JG1kMRPTozLcYXYv0eLjpQaQ+qPYqDqGEdwnp9ihnmOIaT3 M5Fw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711992122; x=1712596922; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xl1YvK1CPJJI3lt4hFJM8stWerakJiAw8KgauLK1Qr0=; b=JHqnJcyLuq1ZMv7J4+3FHv79I9pmdjuuOwvFLRmUTtxZqPcDIUY0J2Hd8jRF3W/Pcd 89QxLeWTvmUa8yCQUgoYMzEDxHGVRakEIhJF7o0ilBnXq60QAPOWVk8fikTc3dWZzwPz TYtK2JiT1RVW8tlSgN6qZJNEUm5B0DvGj0WV2F2RtOvlTiYaJhBC/DIFAO1+QooxE8EU nIpuQ2aU8tysywU7+AHEOqSBtQ8yYBQxQzTqaBNUfscVyVbinrvCmBZP8hu3Iqgvpgwb 3J33GIK4wn0+5XM9fiZNhOXNn/hbf/vWdqloRD0jY4/z3sEwibjyhi3nq344QkZJkTNQ W61A== X-Forwarded-Encrypted: i=1; AJvYcCWXBcBi0aG6BhzKRVIUCr3ND2AENS54ZGV9Z0UMomPNNAerPzGzBSMztH7QksEpIS9zTP0mJSGn64/Qh7P+0YKTK5/7Sx4k0w+92k4IE4CYOrcgUZD9/BBzvk+1hXSaceSNZ3NbWkEYLBYs188J8y9sePXomIbnjmQcYmb9La0Q/Jsl3W7dLKw= X-Gm-Message-State: AOJu0YxNRvr4/TG7cRoFMeuqI4GyfWjodiBWvP+/SuG5C5TYwvDplGwC MBkK1yAKwZTxxbxbLf27PK6HgW47kt/1GdUZG6T/A2PY2BTWwMKBeYEa9w/tjXs= X-Google-Smtp-Source: AGHT+IEdMmX0GpUtGWuReUSISOs+DMtnMvskHgxIYrrpZoPbKLvGjrYalDybzDxsYZp8AVzQQKZT+w== X-Received: by 2002:a17:906:8312:b0:a46:206d:369b with SMTP id j18-20020a170906831200b00a46206d369bmr5996492ejx.28.1711992121968; Mon, 01 Apr 2024 10:22:01 -0700 (PDT) Received: from localhost.localdomain (ccu40.neoplus.adsl.tpnet.pl. [83.30.144.40]) by smtp.gmail.com with ESMTPSA id xi7-20020a170906dac700b00a4e23486a5dsm5347949ejb.20.2024.04.01.10.22.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Apr 2024 10:22:01 -0700 (PDT) From: Adam Skladowski To: Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/4] arm64: dts: qcom: msm8976: Add MDSS nodes Date: Mon, 1 Apr 2024 19:21:51 +0200 Message-Id: <20240401172153.9231-3-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240401172153.9231-1-a39.skl@gmail.com> References: <20240401172153.9231-1-a39.skl@gmail.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add MDSS nodes to support displays on MSM8976 SoC. Signed-off-by: Adam Skladowski --- arch/arm64/boot/dts/qcom/msm8976.dtsi | 274 +++++++++++++++++++++++++- 1 file changed, 270 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi index 8bdcc1438177..6be310079f5b 100644 --- a/arch/arm64/boot/dts/qcom/msm8976.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi @@ -785,10 +785,10 @@ gcc: clock-controller@1800000 { clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&rpmcc RPM_SMD_XO_A_CLK_SRC>, - <0>, - <0>, - <0>, - <0>; + <&mdss_dsi0_phy 1>, + <&mdss_dsi0_phy 0>, + <&mdss_dsi1_phy 1>, + <&mdss_dsi1_phy 0>; clock-names = "xo", "xo_a", "dsi0pll", @@ -808,6 +808,272 @@ tcsr: syscon@1937000 { reg = <0x01937000 0x30000>; }; + mdss: display-subsystem@1a00000 { + compatible = "qcom,mdss"; + + reg = <0x01a00000 0x1000>, + <0x01ab0000 0x3000>; + reg-names = "mdss_phys", "vbif_phys"; + + power-domains = <&gcc MDSS_GDSC>; + interrupts = ; + + interrupt-controller; + #interrupt-cells = <1>; + + clocks = <&gcc GCC_MDSS_AHB_CLK>, + <&gcc GCC_MDSS_AXI_CLK>, + <&gcc GCC_MDSS_VSYNC_CLK>, + <&gcc GCC_MDSS_MDP_CLK>; + clock-names = "iface", + "bus", + "vsync", + "core"; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + status = "disabled"; + + mdss_mdp: display-controller@1a01000 { + compatible = "qcom,msm8976-mdp5", "qcom,mdp5"; + reg = <0x01a01000 0x89000>; + reg-names = "mdp_phys"; + + interrupt-parent = <&mdss>; + interrupts = <0>; + + clocks = <&gcc GCC_MDSS_AHB_CLK>, + <&gcc GCC_MDSS_AXI_CLK>, + <&gcc GCC_MDSS_MDP_CLK>, + <&gcc GCC_MDSS_VSYNC_CLK>, + <&gcc GCC_MDP_TBU_CLK>, + <&gcc GCC_MDP_RT_TBU_CLK>; + clock-names = "iface", + "bus", + "core", + "vsync", + "tbu", + "tbu_rt"; + + operating-points-v2 = <&mdp_opp_table>; + power-domains = <&gcc MDSS_GDSC>; + + iommus = <&apps_iommu 22>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + mdss_mdp5_intf1_out: endpoint { + remote-endpoint = <&mdss_dsi0_in>; + }; + }; + + port@1 { + reg = <1>; + + mdss_mdp5_intf2_out: endpoint { + remote-endpoint = <&mdss_dsi1_in>; + }; + }; + }; + + mdp_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-177780000 { + opp-hz = /bits/ 64 <177780000>; + required-opps = <&rpmpd_opp_svs>; + }; + + opp-270000000 { + opp-hz = /bits/ 64 <270000000>; + required-opps = <&rpmpd_opp_svs_plus>; + }; + + opp-320000000 { + opp-hz = /bits/ 64 <320000000>; + required-opps = <&rpmpd_opp_nom>; + }; + opp-360000000 { + opp-hz = /bits/ 64 <360000000>; + required-opps = <&rpmpd_opp_turbo>; + }; + }; + }; + + mdss_dsi0: dsi@1a94000 { + compatible = "qcom,msm8976-dsi-ctrl", "qcom,mdss-dsi-ctrl"; + reg = <0x01a94000 0x25c>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <4>; + + clocks = <&gcc GCC_MDSS_MDP_CLK>, + <&gcc GCC_MDSS_AHB_CLK>, + <&gcc GCC_MDSS_AXI_CLK>, + <&gcc GCC_MDSS_BYTE0_CLK>, + <&gcc GCC_MDSS_PCLK0_CLK>, + <&gcc GCC_MDSS_ESC0_CLK>; + clock-names = "mdp_core", + "iface", + "bus", + "byte", + "pixel", + "core"; + + assigned-clocks = <&gcc GCC_MDSS_BYTE0_CLK_SRC>, + <&gcc GCC_MDSS_PCLK0_CLK_SRC>; + assigned-clock-parents = <&mdss_dsi0_phy 0>, + <&mdss_dsi0_phy 1>; + + phys = <&mdss_dsi0_phy>; + + operating-points-v2 = <&dsi0_opp_table>; + power-domains = <&gcc MDSS_GDSC>; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + mdss_dsi0_in: endpoint { + remote-endpoint = <&mdss_mdp5_intf1_out>; + }; + }; + + port@1 { + reg = <1>; + + mdss_dsi0_out: endpoint { + }; + }; + }; + + dsi0_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-125000000 { + opp-hz = /bits/ 64 <125000000>; + required-opps = <&rpmpd_opp_svs>; + + }; + + opp-161250000 { + opp-hz = /bits/ 64 <161250000>; + required-opps = <&rpmpd_opp_svs_plus>; + }; + + opp-187500000 { + opp-hz = /bits/ 64 <187500000>; + required-opps = <&rpmpd_opp_nom>; + }; + }; + }; + + mdss_dsi1: dsi@1a96000 { + compatible = "qcom,msm8976-dsi-ctrl", "qcom,mdss-dsi-ctrl"; + reg = <0x01a96000 0x300>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <5>; + + clocks = <&gcc GCC_MDSS_MDP_CLK>, + <&gcc GCC_MDSS_AHB_CLK>, + <&gcc GCC_MDSS_AXI_CLK>, + <&gcc GCC_MDSS_BYTE1_CLK>, + <&gcc GCC_MDSS_PCLK1_CLK>, + <&gcc GCC_MDSS_ESC1_CLK>; + clock-names = "mdp_core", + "iface", + "bus", + "byte", + "pixel", + "core"; + + assigned-clocks = <&gcc GCC_MDSS_BYTE1_CLK_SRC>, + <&gcc GCC_MDSS_PCLK1_CLK_SRC>; + assigned-clock-parents = <&mdss_dsi1_phy 0>, + <&mdss_dsi1_phy 1>; + + phys = <&mdss_dsi1_phy>; + + power-domains = <&gcc MDSS_GDSC>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + mdss_dsi1_in: endpoint { + remote-endpoint = <&mdss_mdp5_intf2_out>; + }; + }; + + port@1 { + reg = <1>; + + mdss_dsi1_out: endpoint { + }; + }; + }; + }; + + mdss_dsi0_phy: phy@1a94a00 { + compatible = "qcom,dsi-phy-28nm-hpm-fam-b"; + reg = <0x01a94a00 0xd4>, + <0x01a94400 0x280>, + <0x01a94b80 0x30>; + reg-names = "dsi_pll", + "dsi_phy", + "dsi_phy_regulator"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&gcc GCC_MDSS_AHB_CLK>, + <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "iface", "ref"; + + status = "disabled"; + }; + + mdss_dsi1_phy: phy@1a96a00 { + compatible = "qcom,dsi-phy-28nm-hpm-fam-b"; + reg = <0x01a96a00 0xd4>, + <0x01a96400 0x280>, + <0x01a96b80 0x30>; + reg-names = "dsi_pll", + "dsi_phy", + "dsi_phy_regulator"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&gcc GCC_MDSS_AHB_CLK>, + <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "iface", "ref"; + + status = "disabled"; + }; + }; + apps_iommu: iommu@1ee0000 { compatible = "qcom,msm8976-iommu", "qcom,msm-iommu-v2"; reg = <0x01ee0000 0x3000>; From patchwork Mon Apr 1 17:21:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13612899 Received: from mail-lf1-f43.google.com (mail-lf1-f43.google.com [209.85.167.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 761FF4F897; Mon, 1 Apr 2024 17:22:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711992128; cv=none; b=DWY/6QAyY0U7uM2PJRNQOpZ21EnBv43AOlC0QhsfLh1nKF7QVRm0oIwN8jYC95E8ghoz2+qY5RlwZetwr/wWUmuy/dOHW2YL/xJN1zLEgeGPT/sE3JV4uIdptad4LpBgjb4jvrF9LD3Y7Q5vkt9BK3XZ8cvBdopJ4XBt+d5rQc4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711992128; c=relaxed/simple; bh=sW3zpSlIGwFyAynd9cDIq/nNSDBBXDSfPehTUPeVDdI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=cA13JswhlA3XrFcPpTrBOMobbspfj+/Io6+nff0EGONbqlhi4rVullO9/pAL+hrz1DjyVYzVCjwAy3plG9p42tNjiVVu/0/FySrqFxbtE22guweX1Vmtle2NrNzqpmSInLu8ndblP8mfJbY0dZ7eqSxW7jWXuPSAoZJzAfoxbdA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=TMgrSLhB; arc=none smtp.client-ip=209.85.167.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="TMgrSLhB" Received: by mail-lf1-f43.google.com with SMTP id 2adb3069b0e04-513e6777af4so6985727e87.2; Mon, 01 Apr 2024 10:22:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1711992124; x=1712596924; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cA4GurxP5PJibrlcvf5UpY/AeoXbypPT8llBBvZXFbQ=; b=TMgrSLhBRXrIOwe8S3sg31s/IbhhydpV5EJzlH7iRg2//+rXZW82O7ztoKnGZSryAW ZtBBCbvsf5gYCAPZ274onoNLsJ/8adjE4w8+jLv3XQoazZKdIaVGyBzEzptcPV/013RZ vn/QftOVM5bIIkwSxoJ2j1PA+byyRI735nEl0dmtPKNd5FiSKlVGyaf4hRWIIPqy6Wk/ VSrvWcXoONK03WYLduw1T/SrcfsA722nDSkzjoxhw22dSi2jOQ8kAw07x5iHeWx9z/BU 7yiadJTxRXYhJ/NHwIfCaJbnB61wAoJZkJZH1K+fxCPYAEgVw+v68u92E2jOwWGU/GXp R+dA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711992124; x=1712596924; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cA4GurxP5PJibrlcvf5UpY/AeoXbypPT8llBBvZXFbQ=; b=r3aL6MhdmQIw/TWNtGeaYTEu4ZTkWCen/5oL+pG20vSC30rOAb5CpURU7LR5z8wq1M XrjyiCkRii6crEhToavCKfuvSU5M3egdBlJLTHFKztjpteK0ooH+h6m2MQSOW91UKN13 rPJN81skc2BQ25pAUBtKu5XaMiFO4uGkO1by4Pz6uxrtp4YXaMfMWG2Pd9Lto49JqIOV IkZTAoAAWj3edEeRio9H6P2eoFUZo5o+zNLLRjTHzHfBNW7n2LIOjtACl0dnpqJPmP5P 1wBiNc5QBUQZxKyP/xz8PmfyzSODOJNEXYmBh7A3nFcz0mx9+vMV4xr6QieSy+TNsIP+ mSLg== X-Forwarded-Encrypted: i=1; AJvYcCXSzF98dP0I9952hc39tEYKctRWy3iW6KPCp2yfCWM/h9Pgcy4r+BQd1Uxx29k/VoFor9fI26O/P6n4Ae2KyhKlnLXODVu+iFgy1QeqxoEJqscnIS+JxTci5JqHjUwWem4hEqNQIkGfRnzNCR2pZLc+KAOWh5wqT2vlANl6C+jMAimavi8xc/A= X-Gm-Message-State: AOJu0Yzwuh3ismftkuzJ2J5ghCJ8HOZEvEN14y4fpRls4xziZCcwQlOI r64tek7QSr/KqYuw3bH3dqvTruUKvx0cD+0drMkW7D25DB0p6ww7uZRVxOU93Pc= X-Google-Smtp-Source: AGHT+IEOnvv5tSnWQVYJHrrRJKN+SrqLGIYoAeRwMKHNL4dudLBnq+OGeUnQSsqAgdXUdMcqzGEqlA== X-Received: by 2002:ac2:5106:0:b0:515:952b:7886 with SMTP id q6-20020ac25106000000b00515952b7886mr8202042lfb.61.1711992123718; Mon, 01 Apr 2024 10:22:03 -0700 (PDT) Received: from localhost.localdomain (ccu40.neoplus.adsl.tpnet.pl. [83.30.144.40]) by smtp.gmail.com with ESMTPSA id xi7-20020a170906dac700b00a4e23486a5dsm5347949ejb.20.2024.04.01.10.22.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Apr 2024 10:22:03 -0700 (PDT) From: Adam Skladowski To: Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/4] arm64: dts: qcom: msm8976: Add Adreno GPU Date: Mon, 1 Apr 2024 19:21:52 +0200 Message-Id: <20240401172153.9231-4-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240401172153.9231-1-a39.skl@gmail.com> References: <20240401172153.9231-1-a39.skl@gmail.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add Adreno GPU node. Signed-off-by: Adam Skladowski --- arch/arm64/boot/dts/qcom/msm8976.dtsi | 65 +++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi index 6be310079f5b..77670fce9b8f 100644 --- a/arch/arm64/boot/dts/qcom/msm8976.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi @@ -1074,6 +1074,71 @@ mdss_dsi1_phy: phy@1a96a00 { }; }; + adreno_gpu: gpu@1c00000 { + compatible = "qcom,adreno-510.0", "qcom,adreno"; + + reg = <0x01c00000 0x40000>; + reg-names = "kgsl_3d0_reg_memory"; + + interrupts = ; + interrupt-names = "kgsl_3d0_irq"; + + clocks = <&gcc GCC_GFX3D_OXILI_CLK>, + <&gcc GCC_GFX3D_OXILI_AHB_CLK>, + <&gcc GCC_GFX3D_OXILI_GMEM_CLK>, + <&gcc GCC_GFX3D_BIMC_CLK>, + <&gcc GCC_GFX3D_OXILI_TIMER_CLK>, + <&gcc GCC_GFX3D_OXILI_AON_CLK>; + clock-names = "core", + "iface", + "mem", + "mem_iface", + "rbbmtimer", + "alwayson"; + + power-domains = <&gcc OXILI_GX_GDSC>; + + iommus = <&gpu_iommu 0>; + + status = "disabled"; + + operating-points-v2 = <&gpu_opp_table>; + + gpu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + required-opps = <&rpmpd_opp_low_svs>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + required-opps = <&rpmpd_opp_svs>; + }; + + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + required-opps = <&rpmpd_opp_nom>; + }; + + opp-480000000 { + opp-hz = /bits/ 64 <480000000>; + required-opps = <&rpmpd_opp_nom_plus>; + }; + + opp-540000000 { + opp-hz = /bits/ 64 <540000000>; + required-opps = <&rpmpd_opp_turbo>; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + required-opps = <&rpmpd_opp_turbo>; + }; + }; + }; + apps_iommu: iommu@1ee0000 { compatible = "qcom,msm8976-iommu", "qcom,msm-iommu-v2"; reg = <0x01ee0000 0x3000>; From patchwork Mon Apr 1 17:21:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13612900 Received: from mail-lf1-f41.google.com (mail-lf1-f41.google.com [209.85.167.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0B7B051C52; Mon, 1 Apr 2024 17:22:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711992130; cv=none; b=nJ7lb4KrY1MyQy+YfA7JfqecIapkUZb6AgyMUHWN8r9GIylWKi1lEFM/J/eVp1bkdhxvW0Pr+ekxJm40nL/hA2SLHxgVJv8IKvz/SPgYfiBpQ6of6cecrCUSyJTNXBOgE5R3ekaMq6Rqtj47lA98MitTITXkXWHMJv9fBTx+1Lk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711992130; c=relaxed/simple; bh=QZgCgD+pDmfzTboyomfPDIaQwmmi1D2si8FkQh7TzwE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=nLGxcyUdS4zW4A+YetmNr/Tc3L/iJSvyXvXcbd3NBAHPZRt6Yw3kVI3IfQgYgRWpRYaON4lcPAqUBLULItoWVmVOkfjgrJTqWf39CJxIHQRnljG6+fBclXX/I+lZ+LM42ZZ4HE2Nd2eCu5RxVaOzKJRxIxxREx4dMaeVcO7vSdg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=fXnYthvW; arc=none smtp.client-ip=209.85.167.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="fXnYthvW" Received: by mail-lf1-f41.google.com with SMTP id 2adb3069b0e04-515d515e28dso1789538e87.0; Mon, 01 Apr 2024 10:22:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1711992127; x=1712596927; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ew+Rv+h3xO004AjwxMfY/c/AUT9eZb4PNwe0Tj37/ak=; b=fXnYthvWMtq21oe0xWtC9/HG0geKV9jLtDaWC6fi+j5kX5eHwGJhGzHHWoczsTcgWy qPkOkglatDaXq/u1N8q6q+CS7g9hfdHRLkh8dZCaAJTgrNmkfOIrzlBg9s6fuTq6EfbZ NZTbD8fz4RBAX4UBzHZuvNSeRDI991JGSz9kUQcJH9bCtFAeMcFqsRrYUYjca51Qx+zO eUFow1vBzpESdIUcM1nFpl9/G6c94uqVIK40VAgTYiSFtdRDG8ZyPqr/LFtZxGWGUQEJ 1ZSWrtd6vzQnLZ9hsnEj0sQrFTv+XNIJPNj8PrTfVmPAiwimCQAqx6n3HvPO43cbCxD0 sENQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711992127; x=1712596927; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ew+Rv+h3xO004AjwxMfY/c/AUT9eZb4PNwe0Tj37/ak=; b=bMHG5U0vWUBLYBguLJXvB94ns1uI+aYEPDAEw1og3G5RaLJvlhzcQ3C69IT6QtYBwR JS+FkBEseHHVbcQ/a790zBBpcyJgpf5l+2k380pmApxT7AH7g33cNDMTU7OrV9XJgSx4 OQg2BXdte4G3a2YffFnMXkrdyECTvWFvv1EpJmH4t+dXB60dg+98bK55Zuf9TRM9Bh5k mMkDuCyCuJC6VqZxbErv2G/58n/G/fHQLrC844uKe1gYR1U3wlP1KSqiTVZ3w3pcIEQS 8FJ+56oJgQhog6X8ENwz7AM3c+AFOdd5HSGH0L69XaRJ6bIGAXesOEcN1QFNwsSEyeDo wt6w== X-Forwarded-Encrypted: i=1; AJvYcCVZiDeMBJZg1H4l99o1y97P8lbTgFczCuzTvaznlqBK9iQEkqsfHQItEE4+RLMy6CM/Tg2Ao31BcFCYDys6vi4baztaHDVp/ycBy9HiqesKD8FXl/ACAGjKOqUmRc06DNR38/aATx3qCtvTZOYBUqhllWxaT3xbQgARMXEZ2cfMktFO5bEJbnM= X-Gm-Message-State: AOJu0YySEhobYU5gdSnvO52BUsqcQ/Qr8eALD9pNK9KPm4CINscr0sUl k+jLElpVm8AR7in/eLGPuKbH1VjO57fXRJ4R8KWzwNwI7gqsJ7+TJFyzn+rGkZk= X-Google-Smtp-Source: AGHT+IHD0PSqP84JkC+CvhhJ2s2SBxucZkTKCBPDRSoaA74HpBEd2Z1Ez/nUJqDtrwe5KK2+gEw0bQ== X-Received: by 2002:ac2:5b4b:0:b0:516:a2fc:9099 with SMTP id i11-20020ac25b4b000000b00516a2fc9099mr3475138lfp.60.1711992126528; Mon, 01 Apr 2024 10:22:06 -0700 (PDT) Received: from localhost.localdomain (ccu40.neoplus.adsl.tpnet.pl. [83.30.144.40]) by smtp.gmail.com with ESMTPSA id xi7-20020a170906dac700b00a4e23486a5dsm5347949ejb.20.2024.04.01.10.22.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Apr 2024 10:22:06 -0700 (PDT) From: Adam Skladowski To: Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/4] arm64: dts: qcom: msm8976: Add WCNSS node Date: Mon, 1 Apr 2024 19:21:53 +0200 Message-Id: <20240401172153.9231-5-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240401172153.9231-1-a39.skl@gmail.com> References: <20240401172153.9231-1-a39.skl@gmail.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add node describing wireless connectivity subsystem. Signed-off-by: Adam Skladowski --- arch/arm64/boot/dts/qcom/msm8976.dtsi | 104 ++++++++++++++++++++++++++ 1 file changed, 104 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi index 77670fce9b8f..41c748c78347 100644 --- a/arch/arm64/boot/dts/qcom/msm8976.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi @@ -771,6 +771,36 @@ blsp2_i2c4_sleep: blsp2-i2c4-sleep-state { drive-strength = <2>; bias-disable; }; + + wcss_wlan_default: wcss-wlan-default-state { + wcss-wlan2-pins { + pins = "gpio40"; + function = "wcss_wlan2"; + drive-strength = <6>; + bias-pull-up; + }; + + wcss-wlan1-pins { + pins = "gpio41"; + function = "wcss_wlan1"; + drive-strength = <6>; + bias-pull-up; + }; + + wcss-wlan0-pins { + pins = "gpio42"; + function = "wcss_wlan0"; + drive-strength = <6>; + bias-pull-up; + }; + + wcss-wlan-pins { + pins = "gpio43", "gpio44"; + function = "wcss_wlan"; + drive-strength = <6>; + bias-pull-up; + }; + }; }; gcc: clock-controller@1800000 { @@ -1446,6 +1476,80 @@ blsp2_i2c4: i2c@7af8000 { status = "disabled"; }; + wcnss: remoteproc@a204000 { + compatible = "qcom,pronto-v3-pil", "qcom,pronto"; + reg = <0x0a204000 0x2000>, + <0x0a202000 0x1000>, + <0x0a21b000 0x3000>; + reg-names = "ccu", + "dxe", + "pmu"; + + memory-region = <&wcnss_fw_mem>; + + interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>, + <&wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&wcnss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&wcnss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", + "fatal", + "ready", + "handover", + "stop-ack"; + + power-domains = <&rpmpd MSM8976_VDDCX>, + <&rpmpd MSM8976_VDDMX>; + power-domain-names = "cx", "mx"; + + qcom,smem-states = <&wcnss_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + pinctrl-0 = <&wcss_wlan_default>; + pinctrl-names = "default"; + + status = "disabled"; + + wcnss_iris: iris { + /* Separate chip, compatible is board-specific */ + clocks = <&rpmcc RPM_SMD_RF_CLK2>; + clock-names = "xo"; + }; + + smd-edge { + interrupts = ; + + qcom,ipc = <&apcs 8 17>; + qcom,smd-edge = <6>; + qcom,remote-pid = <4>; + + label = "pronto"; + + wcnss_ctrl: wcnss { + compatible = "qcom,wcnss"; + qcom,smd-channels = "WCNSS_CTRL"; + + qcom,mmio = <&wcnss>; + + wcnss_bt: bluetooth { + compatible = "qcom,wcnss-bt"; + }; + + wcnss_wifi: wifi { + compatible = "qcom,wcnss-wlan"; + + interrupts = , + ; + interrupt-names = "tx", "rx"; + + qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>; + qcom,smem-state-names = "tx-enable", + "tx-rings-empty"; + }; + }; + }; + }; + intc: interrupt-controller@b000000 { compatible = "qcom,msm-qgic2"; reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;