From patchwork Tue Apr 2 01:46:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhijian Li (Fujitsu)" X-Patchwork-Id: 13613232 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 81C9FCD1288 for ; Tue, 2 Apr 2024 01:47:45 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rrTEs-0005IF-VP; Mon, 01 Apr 2024 21:47:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rrTEq-0005Hg-Kj for qemu-devel@nongnu.org; Mon, 01 Apr 2024 21:47:00 -0400 Received: from esa6.hc1455-7.c3s2.iphmx.com ([68.232.139.139]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rrTEo-00065p-Pz for qemu-devel@nongnu.org; Mon, 01 Apr 2024 21:47:00 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=fujitsu.com; i=@fujitsu.com; q=dns/txt; s=fj2; t=1712022419; x=1743558419; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=DNNYcQcdHMiCbKTsvXixSeA8d386h61SexbhnWnXcVg=; b=T/pdAalpUf0lhQIFK/CHesUPkNLt6TGH0+BD0Tktlg022WxSJn9l3KPI VaQ90tb0rscJj3z7i1HQMV6Z8dXf++e9hNd+EBTH/YMLN22UTm0M7G7Jf nj4Azjbeaoemaxn0weuPzS/qzamhwj/WBRsc0HUxjCLJyRHj7fb0/+2YJ 7W0AWu2OFhFhsbRoFoc1J8sjgKFZp1q5vLJKs8KQGjU3HUYKl9BjNFvDf l/HnGgH0DBhKsI8tvoRVp7T13vx7EL6qbxPq0wC2g2rQtLqvpiA/xK3rU UbgfaDP59Q57Ta22wud8GIC607RC/p1cFQRWoR5vSfEmC/xneZb3oVpqw w==; X-IronPort-AV: E=McAfee;i="6600,9927,11031"; a="156200238" X-IronPort-AV: E=Sophos;i="6.07,173,1708354800"; d="scan'208";a="156200238" Received: from unknown (HELO oym-r1.gw.nic.fujitsu.com) ([210.162.30.89]) by esa6.hc1455-7.c3s2.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Apr 2024 10:46:54 +0900 Received: from oym-m3.gw.nic.fujitsu.com (oym-nat-oym-m3.gw.nic.fujitsu.com [192.168.87.60]) by oym-r1.gw.nic.fujitsu.com (Postfix) with ESMTP id B47C2D4801 for ; Tue, 2 Apr 2024 10:46:51 +0900 (JST) Received: from kws-ab4.gw.nic.fujitsu.com (kws-ab4.gw.nic.fujitsu.com [192.51.206.22]) by oym-m3.gw.nic.fujitsu.com (Postfix) with ESMTP id 91EE3D9498 for ; Tue, 2 Apr 2024 10:46:50 +0900 (JST) Received: from edo.cn.fujitsu.com (edo.cn.fujitsu.com [10.167.33.5]) by kws-ab4.gw.nic.fujitsu.com (Postfix) with ESMTP id 33305E4751 for ; Tue, 2 Apr 2024 10:46:50 +0900 (JST) Received: from FNSTPC.g08.fujitsu.local (unknown [10.167.226.45]) by edo.cn.fujitsu.com (Postfix) with ESMTP id 92B041A0002; Tue, 2 Apr 2024 09:46:49 +0800 (CST) To: Jonathan Cameron , Fan Ni Cc: qemu-devel@nongnu.org, Li Zhijian Subject: [PATCH 1/2] CXL/cxl_type3: add first_dvsec_offset() helper Date: Tue, 2 Apr 2024 09:46:46 +0800 Message-ID: <20240402014647.3733839-1-lizhijian@fujitsu.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-TM-AS-Product-Ver: IMSS-9.1.0.1417-9.0.0.1002-28292.004 X-TM-AS-User-Approved-Sender: Yes X-TMASE-Version: IMSS-9.1.0.1417-9.0.1002-28292.004 X-TMASE-Result: 10--5.367900-10.000000 X-TMASE-MatchedRID: toN6SH028bWPo+6vQMop+oeAntdoMxBa8SkdpG2/n9fcRlVxRCnt1itT H97dsk/Kf0UGUjPHyTvmn3xyPJAJoh2P280ZiGmRgjO1b6N9SrgFeeAjqMW+l7s3Yh2IOCYz18a 7/fBfKbtwSFMaEckqJH41niV9KymzHxPMjOKY7A+u65UDD0aDgsRB0bsfrpPIfiAqrjYtFiSEQD MuycsRUn+CifraaK2HwslpIthDaVPXrpL+7vYdnH7cGd19dSFd X-TMASE-SNAP-Result: 1.821001.0001-0-1-22:0,33:0,34:0-0 Received-SPF: pass client-ip=68.232.139.139; envelope-from=lizhijian@fujitsu.com; helo=esa6.hc1455-7.c3s2.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Li Zhijian X-Patchwork-Original-From: Li Zhijian via From: "Zhijian Li (Fujitsu)" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org It helps to figure out where the first dvsec register is located. In addition, replace offset and size hardcore with existing macros. Signed-off-by: Li Zhijian --- hw/mem/cxl_type3.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index b0a7e9f11b64..ad2fe7d463fb 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -643,6 +643,16 @@ static DOEProtocol doe_cdat_prot[] = { { } }; +static uint16_t first_dvsec_offset(CXLType3Dev *ct3d) +{ + uint16_t offset = PCI_CONFIG_SPACE_SIZE; + + if (ct3d->sn != UI64_NULL) + offset += PCI_EXT_CAP_DSN_SIZEOF; + + return offset; +} + static void ct3_realize(PCIDevice *pci_dev, Error **errp) { ERRP_GUARD(); @@ -663,13 +673,10 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp) pci_config_set_prog_interface(pci_conf, 0x10); pcie_endpoint_cap_init(pci_dev, 0x80); - if (ct3d->sn != UI64_NULL) { - pcie_dev_ser_num_init(pci_dev, 0x100, ct3d->sn); - cxl_cstate->dvsec_offset = 0x100 + 0x0c; - } else { - cxl_cstate->dvsec_offset = 0x100; - } + if (ct3d->sn != UI64_NULL) + pcie_dev_ser_num_init(pci_dev, PCI_CONFIG_SPACE_SIZE, ct3d->sn); + cxl_cstate->dvsec_offset = first_dvsec_offset(ct3d); ct3d->cxl_cstate.pdev = pci_dev; build_dvsecs(ct3d); From patchwork Tue Apr 2 01:46:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhijian Li (Fujitsu)" X-Patchwork-Id: 13613233 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 01E59CD128A for ; Tue, 2 Apr 2024 01:47:45 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rrTEs-0005IC-DJ; Mon, 01 Apr 2024 21:47:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rrTEq-0005Hf-IB for qemu-devel@nongnu.org; Mon, 01 Apr 2024 21:47:00 -0400 Received: from esa12.hc1455-7.c3s2.iphmx.com ([139.138.37.100]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rrTEo-00065o-LA for qemu-devel@nongnu.org; Mon, 01 Apr 2024 21:47:00 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=fujitsu.com; i=@fujitsu.com; q=dns/txt; s=fj2; t=1712022418; x=1743558418; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5hVwL9nD3S8/Q24Xp6vbDPaGmmo86otoEA8J2qRq8Ik=; b=OhOgz44+pA5fotTa0He3KDLRVCQnkrLPQk4FezIgcjUFREEI0wAnoHzZ vjKV00gmzCThuW9Lm9GmJy/RGV+VpPa/Y/PFi1JSFXtIDJLVGNrlCY1Px 0h3VVDqe+OfdfVGa+652pR2QoAfnL+jecAnu+4KrfMEMJSLwHAgxzQ3xF 2a0P/iouV2EFuu+uvsIaG6+YM1gdT23rsdfnoMJhWZHkB5uQDPrhQxeq2 a0dfZzBuyBS59I5FZEU4+m8Y0wE4Frb6NKK2RRltT+7bXwqM0DVXOt5jq 2PBokCrt3+xs7/OgFXFOVTMi2VCJBXU+DGIBiIou750bTbtFwjaumufdh Q==; X-IronPort-AV: E=McAfee;i="6600,9927,11031"; a="133613078" X-IronPort-AV: E=Sophos;i="6.07,173,1708354800"; d="scan'208";a="133613078" Received: from unknown (HELO yto-r4.gw.nic.fujitsu.com) ([218.44.52.220]) by esa12.hc1455-7.c3s2.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Apr 2024 10:46:53 +0900 Received: from yto-m2.gw.nic.fujitsu.com (yto-nat-yto-m2.gw.nic.fujitsu.com [192.168.83.65]) by yto-r4.gw.nic.fujitsu.com (Postfix) with ESMTP id 8E4C8D3EAC for ; Tue, 2 Apr 2024 10:46:51 +0900 (JST) Received: from kws-ab3.gw.nic.fujitsu.com (kws-ab3.gw.nic.fujitsu.com [192.51.206.21]) by yto-m2.gw.nic.fujitsu.com (Postfix) with ESMTP id BF29AD560D for ; Tue, 2 Apr 2024 10:46:50 +0900 (JST) Received: from edo.cn.fujitsu.com (edo.cn.fujitsu.com [10.167.33.5]) by kws-ab3.gw.nic.fujitsu.com (Postfix) with ESMTP id 5E06F200932CB for ; Tue, 2 Apr 2024 10:46:50 +0900 (JST) Received: from FNSTPC.g08.fujitsu.local (unknown [10.167.226.45]) by edo.cn.fujitsu.com (Postfix) with ESMTP id F116B1A000C; Tue, 2 Apr 2024 09:46:49 +0800 (CST) To: Jonathan Cameron , Fan Ni Cc: qemu-devel@nongnu.org, Li Zhijian Subject: [PATCH 2/2] CXL/cxl_type3: reset DVSEC CXL Control in ct3d_reset Date: Tue, 2 Apr 2024 09:46:47 +0800 Message-ID: <20240402014647.3733839-2-lizhijian@fujitsu.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240402014647.3733839-1-lizhijian@fujitsu.com> References: <20240402014647.3733839-1-lizhijian@fujitsu.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-TM-AS-Product-Ver: IMSS-9.1.0.1417-9.0.0.1002-28292.004 X-TM-AS-User-Approved-Sender: Yes X-TMASE-Version: IMSS-9.1.0.1417-9.0.1002-28292.004 X-TMASE-Result: 10--10.847900-10.000000 X-TMASE-MatchedRID: Ugxu9kqXWxLOugYCEJUMNSrLqyE6Ur/j1Ee54j3itDZD9iPiuXvzgSsJ qmSIRx2QEpqGYdoOBVcxj6B+pIpORmJHJG/db0P+BcaL/tyWL2PBOVz0Jwcxl6vCrG0TnfVUg9x e4gtUJtqMu82DfPQ/zLRXbLwX8eqWeODBMji6el+dd2mFBNIr8lK6+0HOVoSonhD4vcFcha5eUx yj72GEheLzNWBegCW29sZ0UX0EaOILbigRnpKlKSPzRlrdFGDwoPutwA7Nt58xfHFubS9ewi8LJ ccdjSYtNmD0Hjho3a5fbqvtnybFzw== X-TMASE-SNAP-Result: 1.821001.0001-0-1-22:0,33:0,34:0-0 Received-SPF: pass client-ip=139.138.37.100; envelope-from=lizhijian@fujitsu.com; helo=esa12.hc1455-7.c3s2.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Li Zhijian X-Patchwork-Original-From: Li Zhijian via From: "Zhijian Li (Fujitsu)" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org After the kernel commit 0cab68720598 ("cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS window") CXL type3 devices cannot be enabled again after the reboot because this flag was not reset. This flag could be changed by the firmware or OS, let it have a reset(default) value in reboot so that the OS can read its clean status. Signed-off-by: Li Zhijian --- hw/mem/cxl_type3.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index ad2fe7d463fb..3fe136053390 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -305,7 +305,8 @@ static void build_dvsecs(CXLType3Dev *ct3d) dvsec = (uint8_t *)&(CXLDVSECDevice){ .cap = 0x1e, - .ctrl = 0x2, +#define CT3D_DEVSEC_CXL_CTRL 0x2 + .ctrl = CT3D_DEVSEC_CXL_CTRL, .status2 = 0x2, .range1_size_hi = range1_size_hi, .range1_size_lo = range1_size_lo, @@ -906,6 +907,16 @@ MemTxResult cxl_type3_write(PCIDevice *d, hwaddr host_addr, uint64_t data, return address_space_write(as, dpa_offset, attrs, &data, size); } +/* Reset DVSEC CXL Control */ +static void ct3d_dvsec_cxl_ctrl_reset(CXLType3Dev *ct3d) +{ + uint16_t offset = first_dvsec_offset(ct3d); + CXLDVSECDevice *dvsec; + + dvsec = (CXLDVSECDevice *)(ct3d->cxl_cstate.pdev->config + offset); + dvsec->ctrl = CT3D_DEVSEC_CXL_CTRL; +} + static void ct3d_reset(DeviceState *dev) { CXLType3Dev *ct3d = CXL_TYPE3(dev); @@ -914,6 +925,7 @@ static void ct3d_reset(DeviceState *dev) cxl_component_register_init_common(reg_state, write_msk, CXL2_TYPE3_DEVICE); cxl_device_register_init_t3(ct3d); + ct3d_dvsec_cxl_ctrl_reset(ct3d); /* * Bring up an endpoint to target with MCTP over VDM.