From patchwork Thu Apr 4 03:29:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suraj Kandpal X-Patchwork-Id: 13616883 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 16316CD1284 for ; Thu, 4 Apr 2024 03:32:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 371D21131A4; Thu, 4 Apr 2024 03:32:05 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="UBv4HsMe"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id E565E1131A4 for ; Thu, 4 Apr 2024 03:32:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1712201521; x=1743737521; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=QaHoVdAdWbAXvi6GkHPyF1Fwc3CEWAneYlRHSQC0/H8=; b=UBv4HsMeMRk5cuounfwmBSMzx+O2E2XXXjpUXshTfHXHOL7b0MSdEIcx mwvyT1IQHGYI23xO8W12uGVit2s8OC/fGasE/DWbtvzW8H4cN8vqU2R1O X3wteaSjQYEpJXVBUxhxnBT4APnUuH38jWJjeDpXQcJa8O6c+ip+J2dZ5 75YRQ7oCKynzrhwmzrd2Rl0vseT05vmRu1OGxjEEqEfdSZDPghKr2cA4W uDxQQ7M1+kuwzjB/AiihxPfH/9qZWNoMPpU0PbiJwsES+rX0J4xSeVs5B sSPnbejhPDYsfqh9LtHWAsZ3S4TMQQd3HOYrvpuLEkPXyDEpuXzT46Grg A==; X-CSE-ConnectionGUID: EgY29nVcTB+3qeK2v2LBXw== X-CSE-MsgGUID: nIRdymc5SeKLQ3DVolR1IA== X-IronPort-AV: E=McAfee;i="6600,9927,11033"; a="11282620" X-IronPort-AV: E=Sophos;i="6.07,178,1708416000"; d="scan'208";a="11282620" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2024 20:32:01 -0700 X-CSE-ConnectionGUID: WmyCHc5JTE+/+jEybsowxw== X-CSE-MsgGUID: M8C/QMs3S5e7LwVBue3wGg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,178,1708416000"; d="scan'208";a="18747716" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.32]) by fmviesa007.fm.intel.com with ESMTP; 03 Apr 2024 20:31:58 -0700 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org Cc: chaitanya.kumar.borah@intel.com, uma.shankar@intel.com, ankit.k.nautiyal@intel.com, arun.r.murthy@intel.com, ville.syrjala@intel.com, naveen1.kumar@intel.com, sebastian.wick@redhat.com, Suraj Kandpal Subject: [PATCH 1/7] drm/i915/dp: Make has_gamut_metadata_dip() non static Date: Thu, 4 Apr 2024 08:59:25 +0530 Message-ID: <20240404032931.380887-3-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240404032931.380887-2-suraj.kandpal@intel.com> References: <20240404032931.380887-2-suraj.kandpal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Make has_gamut_metadata_dip() non static so it can also be used to at other places eg in intel_dp_aux_backlight. Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp.c | 6 +++--- drivers/gpu/drm/i915/display/intel_dp.h | 1 + 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index a11bc4fd3d65..26ccd4cc0d48 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -6226,8 +6226,8 @@ bool intel_dp_is_port_edp(struct drm_i915_private *i915, enum port port) return _intel_dp_is_port_edp(i915, devdata, port); } -static bool -has_gamut_metadata_dip(struct intel_encoder *encoder) +bool +intel_dp_has_gamut_metadata_dip(struct intel_encoder *encoder) { struct drm_i915_private *i915 = to_i915(encoder->base.dev); enum port port = encoder->port; @@ -6274,7 +6274,7 @@ intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connect intel_attach_dp_colorspace_property(connector); } - if (has_gamut_metadata_dip(&dp_to_dig_port(intel_dp)->base)) + if (intel_dp_has_gamut_metadata_dip(&dp_to_dig_port(intel_dp)->base)) drm_connector_attach_hdr_output_metadata_property(connector); if (HAS_VRR(dev_priv)) diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index c540d3a73fe7..bbd61cbedc4f 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -193,5 +193,6 @@ intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp, struct link_config_limits *limits); void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector *connector); +bool intel_dp_has_gamut_metadata_dip(struct intel_encoder *encoder); #endif /* __INTEL_DP_H__ */ From patchwork Thu Apr 4 03:29:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suraj Kandpal X-Patchwork-Id: 13616884 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9C787CD1288 for ; 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X-CSE-ConnectionGUID: ZBxp5c+GTXSPzvnOmpHKVA== X-CSE-MsgGUID: nrHdlANSSHqTxWUDsieg7g== X-IronPort-AV: E=McAfee;i="6600,9927,11033"; a="11282625" X-IronPort-AV: E=Sophos;i="6.07,178,1708416000"; d="scan'208";a="11282625" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2024 20:32:04 -0700 X-CSE-ConnectionGUID: woe1KYb5RjKZbsQ7NVewPg== X-CSE-MsgGUID: tsPQ8+YzQx6zEqKBHDliEA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,178,1708416000"; d="scan'208";a="18747722" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.32]) by fmviesa007.fm.intel.com with ESMTP; 03 Apr 2024 20:32:01 -0700 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org Cc: chaitanya.kumar.borah@intel.com, uma.shankar@intel.com, ankit.k.nautiyal@intel.com, arun.r.murthy@intel.com, ville.syrjala@intel.com, naveen1.kumar@intel.com, sebastian.wick@redhat.com, Suraj Kandpal Subject: [PATCH 2/7] drm/i915/dp: Add TCON HDR capability checks Date: Thu, 4 Apr 2024 08:59:26 +0530 Message-ID: <20240404032931.380887-4-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240404032931.380887-2-suraj.kandpal@intel.com> References: <20240404032931.380887-2-suraj.kandpal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add checks to see the HDR capability of TCON panel. Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_display_types.h | 5 +++++ drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 10 ++++++++++ 2 files changed, 15 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 4ef1f5f709d8..ebee6ebf1fdb 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -401,6 +401,11 @@ struct intel_panel { } vesa; struct { bool sdr_uses_aux; + bool supports_2084_decode; + bool supports_2020_gamut; + bool supports_segmented_backlight; + bool supports_sdp_colorimetry; + bool supports_tone_mapping; } intel; } edp; diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c index 4f58efdc688a..94edf982eff8 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c @@ -158,6 +158,16 @@ intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector) panel->backlight.edp.intel.sdr_uses_aux = tcon_cap[2] & INTEL_EDP_SDR_TCON_BRIGHTNESS_AUX_CAP; + panel->backlight.edp.intel.supports_2084_decode = + tcon_cap[1] & INTEL_EDP_HDR_TCON_2084_DECODE_CAP; + panel->backlight.edp.intel.supports_2020_gamut = + tcon_cap[1] & INTEL_EDP_HDR_TCON_2020_GAMUT_CAP; + panel->backlight.edp.intel.supports_segmented_backlight = + tcon_cap[1] & INTEL_EDP_HDR_TCON_SEGMENTED_BACKLIGHT_CAP; + panel->backlight.edp.intel.supports_sdp_colorimetry = + tcon_cap[1] & INTEL_EDP_HDR_TCON_SDP_COLORIMETRY_CAP; + panel->backlight.edp.intel.supports_tone_mapping = + tcon_cap[1] & INTEL_EDP_HDR_TCON_TONE_MAPPING_CAP; return true; } From patchwork Thu Apr 4 03:29:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suraj Kandpal X-Patchwork-Id: 13616885 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2FD86CD1288 for ; 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X-CSE-ConnectionGUID: XWpH66lITfar2IW3/tx2rw== X-CSE-MsgGUID: Qzf4ZWf6QRK85rUb8j2uQA== X-IronPort-AV: E=McAfee;i="6600,9927,11033"; a="11282628" X-IronPort-AV: E=Sophos;i="6.07,178,1708416000"; d="scan'208";a="11282628" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2024 20:32:06 -0700 X-CSE-ConnectionGUID: JNLfMdPsTdqz+7LLJIUBlA== X-CSE-MsgGUID: qSu0lDrES1aUu5rOKfdoYQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,178,1708416000"; d="scan'208";a="18747728" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.32]) by fmviesa007.fm.intel.com with ESMTP; 03 Apr 2024 20:32:04 -0700 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org Cc: chaitanya.kumar.borah@intel.com, uma.shankar@intel.com, ankit.k.nautiyal@intel.com, arun.r.murthy@intel.com, ville.syrjala@intel.com, naveen1.kumar@intel.com, sebastian.wick@redhat.com, Suraj Kandpal Subject: [PATCH 3/7] drm/i915/dp: Fix Register bit naming Date: Thu, 4 Apr 2024 08:59:27 +0530 Message-ID: <20240404032931.380887-5-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240404032931.380887-2-suraj.kandpal@intel.com> References: <20240404032931.380887-2-suraj.kandpal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Change INTEL_EDP_HDR_TCON_SDP_COLORIMETRY enable to INTEL_EDP_HDR_TCON_SDP_OVERRIDE_AUX as this bit is tells TCON to ignore DPCD colorimetry values and take the one's sent through SDP. Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c index 94edf982eff8..3d9723714c96 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c @@ -74,7 +74,7 @@ # define INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE BIT(4) # define INTEL_EDP_HDR_TCON_SRGB_TO_PANEL_GAMUT_ENABLE BIT(5) /* Bit 6 is reserved */ -# define INTEL_EDP_HDR_TCON_SDP_COLORIMETRY_ENABLE BIT(7) +# define INTEL_EDP_HDR_TCON_SDP_OVERRIDE_AUX BIT(7) #define INTEL_EDP_HDR_CONTENT_LUMINANCE 0x346 /* Pre-TGL+ */ #define INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE 0x34A From patchwork Thu Apr 4 03:29:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suraj Kandpal X-Patchwork-Id: 13616886 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EE774CD1288 for ; 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X-CSE-ConnectionGUID: SGzapuwsSFSYsAg31Be6tg== X-CSE-MsgGUID: E2QzAf+8SwCwklSCVKFkmw== X-IronPort-AV: E=McAfee;i="6600,9927,11033"; a="11282630" X-IronPort-AV: E=Sophos;i="6.07,178,1708416000"; d="scan'208";a="11282630" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2024 20:32:09 -0700 X-CSE-ConnectionGUID: 3IL5M6RhRTWpgeWpLpgg3w== X-CSE-MsgGUID: lCZ+PEMATUS0k9JuWnZBzg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,178,1708416000"; d="scan'208";a="18747737" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.32]) by fmviesa007.fm.intel.com with ESMTP; 03 Apr 2024 20:32:06 -0700 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org Cc: chaitanya.kumar.borah@intel.com, uma.shankar@intel.com, ankit.k.nautiyal@intel.com, arun.r.murthy@intel.com, ville.syrjala@intel.com, naveen1.kumar@intel.com, sebastian.wick@redhat.com, Suraj Kandpal Subject: [PATCH 4/7] drm/i915/dp: Fix comments on EDP HDR DPCD registers Date: Thu, 4 Apr 2024 08:59:28 +0530 Message-ID: <20240404032931.380887-6-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240404032931.380887-2-suraj.kandpal@intel.com> References: <20240404032931.380887-2-suraj.kandpal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Change comments from Pre-TGL+ to Pre-ICL as mentioned in specs Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c index 3d9723714c96..2d50a4734823 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c @@ -69,14 +69,14 @@ #define INTEL_EDP_HDR_GETSET_CTRL_PARAMS 0x344 # define INTEL_EDP_HDR_TCON_2084_DECODE_ENABLE BIT(0) # define INTEL_EDP_HDR_TCON_2020_GAMUT_ENABLE BIT(1) -# define INTEL_EDP_HDR_TCON_TONE_MAPPING_ENABLE BIT(2) /* Pre-TGL+ */ +# define INTEL_EDP_HDR_TCON_TONE_MAPPING_ENABLE BIT(2) /* Pre-ICL */ # define INTEL_EDP_HDR_TCON_SEGMENTED_BACKLIGHT_ENABLE BIT(3) # define INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE BIT(4) # define INTEL_EDP_HDR_TCON_SRGB_TO_PANEL_GAMUT_ENABLE BIT(5) /* Bit 6 is reserved */ # define INTEL_EDP_HDR_TCON_SDP_OVERRIDE_AUX BIT(7) -#define INTEL_EDP_HDR_CONTENT_LUMINANCE 0x346 /* Pre-TGL+ */ +#define INTEL_EDP_HDR_CONTENT_LUMINANCE 0x346 /* Pre-ICL */ #define INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE 0x34A #define INTEL_EDP_SDR_LUMINANCE_LEVEL 0x352 #define INTEL_EDP_BRIGHTNESS_NITS_LSB 0x354 From patchwork Thu Apr 4 03:29:29 2024 Content-Type: text/plain; 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d="scan'208";a="18747743" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.32]) by fmviesa007.fm.intel.com with ESMTP; 03 Apr 2024 20:32:09 -0700 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org Cc: chaitanya.kumar.borah@intel.com, uma.shankar@intel.com, ankit.k.nautiyal@intel.com, arun.r.murthy@intel.com, ville.syrjala@intel.com, naveen1.kumar@intel.com, sebastian.wick@redhat.com, Suraj Kandpal Subject: [PATCH 5/7] drm/i915/dp: Enable AUX based backlight for HDR Date: Thu, 4 Apr 2024 08:59:29 +0530 Message-ID: <20240404032931.380887-7-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240404032931.380887-2-suraj.kandpal@intel.com> References: <20240404032931.380887-2-suraj.kandpal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" As of now whenerver HDR is switched on we use the PWM to change the backlight as opposed to AUX based backlight changes in terms of nits. This patch writes to the appropriate DPCD registers to enable aux based backlight using values in nits. --v2 -Fix max_cll and max_fall assignment [Jani] -Fix the size sent in drm_dpcd_write [Jani] --v3 -Content Luminance needs to be sent only for pre-ICL after that it is directly picked up from hdr metadata [Ville] --v4 -Add checks for HDR TCON cap bits [Ville] -Check eotf of hdr_output_data and sets bits base of that value. --v5 -Fix capability check bits. -Check colorspace before setting BT2020 --v6 -Use intel_dp_has_gamut_dip to check if we have capability to send sdp [Ville] -Seprate filling of all hdr tcon related bits into it's own function. -Check eotf data to make sure we are in HDR mode [Sebastian] Signed-off-by: Suraj Kandpal --- .../drm/i915/display/intel_dp_aux_backlight.c | 105 ++++++++++++++++-- 1 file changed, 94 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c index 2d50a4734823..7af876e2d210 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c @@ -40,11 +40,6 @@ #include "intel_dp.h" #include "intel_dp_aux_backlight.h" -/* TODO: - * Implement HDR, right now we just implement the bare minimum to bring us back into SDR mode so we - * can make people's backlights work in the mean time - */ - /* * DP AUX registers for Intel's proprietary HDR backlight interface. We define * them here since we'll likely be the only driver to ever use these. @@ -127,9 +122,6 @@ intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector) if (ret != sizeof(tcon_cap)) return false; - if (!(tcon_cap[1] & INTEL_EDP_HDR_TCON_BRIGHTNESS_NITS_CAP)) - return false; - drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Detected %s HDR backlight interface version %d\n", connector->base.base.id, connector->base.name, is_intel_tcon_cap(tcon_cap) ? "Intel" : "unsupported", tcon_cap[0]); @@ -137,6 +129,9 @@ intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector) if (!is_intel_tcon_cap(tcon_cap)) return false; + if (!(tcon_cap[1] & INTEL_EDP_HDR_TCON_BRIGHTNESS_NITS_CAP)) + return false; + /* * If we don't have HDR static metadata there is no way to * runtime detect used range for nits based control. For now @@ -225,13 +220,27 @@ intel_dp_aux_hdr_set_aux_backlight(const struct drm_connector_state *conn_state, connector->base.base.id, connector->base.name); } +static bool +intel_dp_aux_in_hdr_mode(const struct drm_connector_state *conn_state) +{ + struct hdr_output_metadata *hdr_metadata; + + if (!conn_state->hdr_output_metadata) + return false; + + hdr_metadata = conn_state->hdr_output_metadata->data; + + return hdr_metadata->hdmi_metadata_type1.eotf != HDMI_EOTF_TRADITIONAL_GAMMA_SDR; +} + static void intel_dp_aux_hdr_set_backlight(const struct drm_connector_state *conn_state, u32 level) { struct intel_connector *connector = to_intel_connector(conn_state->connector); struct intel_panel *panel = &connector->panel; - if (panel->backlight.edp.intel.sdr_uses_aux) { + if (intel_dp_aux_in_hdr_mode(conn_state) || + panel->backlight.edp.intel.sdr_uses_aux) { intel_dp_aux_hdr_set_aux_backlight(conn_state, level); } else { const u32 pwm_level = intel_backlight_level_to_pwm(connector, level); @@ -240,6 +249,70 @@ intel_dp_aux_hdr_set_backlight(const struct drm_connector_state *conn_state, u32 } } +static void +intel_dp_aux_write_content_luminance(struct intel_connector *connector, + struct hdr_output_metadata *hdr_metadata) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); + struct drm_i915_private *i915 = to_i915(connector->base.dev); + int ret; + u8 buf[4]; + + if (!intel_dp_has_gamut_metadata_dip(connector->encoder)) + return; + + buf[0] = hdr_metadata->hdmi_metadata_type1.max_cll & 0xFF; + buf[1] = (hdr_metadata->hdmi_metadata_type1.max_cll & 0xFF00) >> 8; + buf[2] = hdr_metadata->hdmi_metadata_type1.max_fall & 0xFF; + buf[3] = (hdr_metadata->hdmi_metadata_type1.max_fall & 0xFF00) >> 8; + + ret = drm_dp_dpcd_write(&intel_dp->aux, + INTEL_EDP_HDR_CONTENT_LUMINANCE, + buf, sizeof(buf)); + if (ret < 0) + drm_dbg_kms(&i915->drm, + "Content Luminance DPCD reg write failed, err:-%d\n", + ret); +} + +static void +intel_dp_aux_fill_hdr_tcon_params(const struct drm_connector_state *conn_state, u8 *ctrl) +{ + struct intel_connector *connector = to_intel_connector(conn_state->connector); + struct intel_panel *panel = &connector->panel; + struct drm_i915_private *i915 = to_i915(connector->base.dev); + struct hdr_output_metadata *hdr_metadata = conn_state->hdr_output_metadata->data; + + /* According to spec segmented backlight needs to be set whenever panel is in + * HDR mode. + */ + *ctrl |= INTEL_EDP_HDR_TCON_SEGMENTED_BACKLIGHT_ENABLE; + + /* 2084 decode needs to set if eotf suggests so or in case of pre-ICL we disable + * tone mapping and set 2084 decode. + */ + if (hdr_metadata->hdmi_metadata_type1.eotf == + HDMI_EOTF_SMPTE_ST2084 || DISPLAY_VER(i915) < 11) { + *ctrl |= INTEL_EDP_HDR_TCON_2084_DECODE_ENABLE; + *ctrl &= ~INTEL_EDP_HDR_TCON_TONE_MAPPING_ENABLE; + } else { + drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] TCON: Cannot decode requested EOTF\n", + connector->base.base.id, connector->base.name); + } + + if (panel->backlight.edp.intel.supports_2020_gamut && + (conn_state->colorspace == DRM_MODE_COLORIMETRY_BT2020_RGB || + conn_state->colorspace == DRM_MODE_COLORIMETRY_BT2020_YCC || + conn_state->colorspace == DRM_MODE_COLORIMETRY_BT2020_CYCC)) + *ctrl |= INTEL_EDP_HDR_TCON_2020_GAMUT_ENABLE; + + if (panel->backlight.edp.intel.supports_sdp_colorimetry && + intel_dp_has_gamut_metadata_dip(connector->encoder)) + *ctrl |= INTEL_EDP_HDR_TCON_SDP_OVERRIDE_AUX; + else + *ctrl &= ~INTEL_EDP_HDR_TCON_SDP_OVERRIDE_AUX; +} + static void intel_dp_aux_hdr_enable_backlight(const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state, u32 level) @@ -248,6 +321,7 @@ intel_dp_aux_hdr_enable_backlight(const struct intel_crtc_state *crtc_state, struct intel_panel *panel = &connector->panel; struct drm_i915_private *i915 = to_i915(connector->base.dev); struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); + struct hdr_output_metadata *hdr_metadata; int ret; u8 old_ctrl, ctrl; @@ -261,8 +335,10 @@ intel_dp_aux_hdr_enable_backlight(const struct intel_crtc_state *crtc_state, } ctrl = old_ctrl; - if (panel->backlight.edp.intel.sdr_uses_aux) { + if (intel_dp_aux_in_hdr_mode(conn_state) || + panel->backlight.edp.intel.sdr_uses_aux) { ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE; + intel_dp_aux_hdr_set_aux_backlight(conn_state, level); } else { u32 pwm_level = intel_backlight_level_to_pwm(connector, level); @@ -272,10 +348,18 @@ intel_dp_aux_hdr_enable_backlight(const struct intel_crtc_state *crtc_state, ctrl &= ~INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE; } + if (intel_dp_aux_in_hdr_mode(conn_state)) + intel_dp_aux_fill_hdr_tcon_params(conn_state, &ctrl); + if (ctrl != old_ctrl && drm_dp_dpcd_writeb(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, ctrl) != 1) drm_err(&i915->drm, "[CONNECTOR:%d:%s] Failed to configure DPCD brightness controls\n", connector->base.base.id, connector->base.name); + + if (intel_dp_aux_in_hdr_mode(conn_state)) { + hdr_metadata = conn_state->hdr_output_metadata->data; + intel_dp_aux_write_content_luminance(connector, hdr_metadata); + } } static void @@ -332,7 +416,6 @@ intel_dp_aux_hdr_setup_backlight(struct intel_connector *connector, enum pipe pi connector->base.base.id, connector->base.name, panel->backlight.min, panel->backlight.max); - panel->backlight.level = intel_dp_aux_hdr_get_backlight(connector, pipe); panel->backlight.enabled = panel->backlight.level != 0; From patchwork Thu Apr 4 03:29:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suraj Kandpal X-Patchwork-Id: 13616888 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4840ECD1288 for ; Thu, 4 Apr 2024 03:32:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F14E11131AB; Thu, 4 Apr 2024 03:32:23 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="TDOskB+T"; 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d="scan'208";a="11282642" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2024 20:32:15 -0700 X-CSE-ConnectionGUID: 3zbQpCLFS1yskGq1goP9Xg== X-CSE-MsgGUID: 0zkgSObxSeiW7Kj7r/pyjg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,178,1708416000"; d="scan'208";a="18747752" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.32]) by fmviesa007.fm.intel.com with ESMTP; 03 Apr 2024 20:32:12 -0700 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org Cc: chaitanya.kumar.borah@intel.com, uma.shankar@intel.com, ankit.k.nautiyal@intel.com, arun.r.murthy@intel.com, ville.syrjala@intel.com, naveen1.kumar@intel.com, sebastian.wick@redhat.com, Suraj Kandpal Subject: [PATCH 6/7] drm/i915/dp: Write panel override luminance values Date: Thu, 4 Apr 2024 08:59:30 +0530 Message-ID: <20240404032931.380887-8-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240404032931.380887-2-suraj.kandpal@intel.com> References: <20240404032931.380887-2-suraj.kandpal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Write panel override luminance values which helps the TCON decide if tone mapping needs to be enabled or not. Signed-off-by: Suraj Kandpal --- .../drm/i915/display/intel_dp_aux_backlight.c | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c index 7af876e2d210..20dd5a6a0f3f 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c @@ -381,6 +381,29 @@ static const char *dpcd_vs_pwm_str(bool aux) return aux ? "DPCD" : "PWM"; } +static void +intel_dp_aux_write_panel_luminance_override(struct intel_connector *connector) +{ + struct drm_i915_private *i915 = to_i915(connector->base.dev); + struct intel_panel *panel = &connector->panel; + struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); + int ret; + u8 buf[4] = {}; + + buf[0] = panel->backlight.min & 0xFF; + buf[1] = (panel->backlight.min & 0xFF00) >> 8; + buf[2] = panel->backlight.max & 0xFF; + buf[3] = (panel->backlight.max & 0xFF00) >> 8; + + ret = drm_dp_dpcd_write(&intel_dp->aux, + INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE, + buf, sizeof(buf)); + if (ret < 0) + drm_dbg_kms(&i915->drm, + "Panel Luminance DPCD reg write failed, err:-%d\n", + ret); +} + static int intel_dp_aux_hdr_setup_backlight(struct intel_connector *connector, enum pipe pipe) { @@ -412,6 +435,8 @@ intel_dp_aux_hdr_setup_backlight(struct intel_connector *connector, enum pipe pi panel->backlight.min = 0; } + intel_dp_aux_write_panel_luminance_override(connector); + drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Using AUX HDR interface for backlight control (range %d..%d)\n", connector->base.base.id, connector->base.name, panel->backlight.min, panel->backlight.max); From patchwork Thu Apr 4 03:29:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suraj Kandpal X-Patchwork-Id: 13616889 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8797DCD1288 for ; Thu, 4 Apr 2024 03:32:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 388B21131A8; Thu, 4 Apr 2024 03:32:26 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="N28+0XB9"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id C48131131AB for ; Thu, 4 Apr 2024 03:32:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1712201538; x=1743737538; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=N06PNUC7LknWmxxJ/52xcy7miV/A74W73T95uk00bqU=; b=N28+0XB97lLbeAMpTFRWcoKI2LiZZKLpRfOogGFbh7csxvCpTnQwCYxh Ui6rSvXMRhkuY6ztWnPzgqfcRFBzHo0FxfTaxGh0V+FiIdedP6UZHneCE isLF7tCpBsZFraby8Htt90zuN3Gk451DoL+2AydZufOnVXFFs6uG2LvIr wPPwkMeE8/B4Dt1ittZ9/WWEJ+TKkUIlVFiyv4dk99GB9Gh1Vfm97JaIP o2mCZ5buwBtlXJwkMhSl+45mY5NaMGAwD1vZMgoHfUD5nfWqx7t28qY8E feSrTH8U5pa6BUSiGwiAmku0QC/8mJ/KdybJ4azJZc5Z6tehz3bOJhvlR w==; X-CSE-ConnectionGUID: 89ZnZxMHQvyAW+25M0IVDg== X-CSE-MsgGUID: yGhDGQvxTIGyaA62j6Ya5w== X-IronPort-AV: E=McAfee;i="6600,9927,11033"; a="11282646" X-IronPort-AV: E=Sophos;i="6.07,178,1708416000"; d="scan'208";a="11282646" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2024 20:32:18 -0700 X-CSE-ConnectionGUID: WKpljlVQQxKC8grDVV6rMg== X-CSE-MsgGUID: 8C6q+1juQ/26LFBtF7Q7Cw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,178,1708416000"; d="scan'208";a="18747759" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.32]) by fmviesa007.fm.intel.com with ESMTP; 03 Apr 2024 20:32:15 -0700 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org Cc: chaitanya.kumar.borah@intel.com, uma.shankar@intel.com, ankit.k.nautiyal@intel.com, arun.r.murthy@intel.com, ville.syrjala@intel.com, naveen1.kumar@intel.com, sebastian.wick@redhat.com, Suraj Kandpal Subject: [PATCH 7/7] drm/i915/dp: Limit brightness level to 20 Date: Thu, 4 Apr 2024 08:59:31 +0530 Message-ID: <20240404032931.380887-9-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240404032931.380887-2-suraj.kandpal@intel.com> References: <20240404032931.380887-2-suraj.kandpal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Limit minimum brightness to 20 when using aux based brightness control to avoid letting the screen going completely blank. Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c index 20dd5a6a0f3f..b54ea7e46954 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c @@ -211,6 +211,9 @@ intel_dp_aux_hdr_set_aux_backlight(const struct drm_connector_state *conn_state, struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); u8 buf[4] = {}; + if (level < 20) + level = 20; + buf[0] = level & 0xFF; buf[1] = (level & 0xFF00) >> 8;