From patchwork Fri Apr 5 10:30:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergiy Kibrik X-Patchwork-Id: 13618837 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5D232CD11C2 for ; Fri, 5 Apr 2024 10:30:58 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.701196.1095441 (Exim 4.92) (envelope-from ) id 1rsgqE-0006lM-2r; Fri, 05 Apr 2024 10:30:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 701196.1095441; Fri, 05 Apr 2024 10:30:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rsgqD-0006lF-W5; Fri, 05 Apr 2024 10:30:37 +0000 Received: by outflank-mailman (input) for mailman id 701196; Fri, 05 Apr 2024 10:30:36 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rsgqC-0006l8-1w for xen-devel@lists.xenproject.org; Fri, 05 Apr 2024 10:30:36 +0000 Received: from pb-smtp2.pobox.com (pb-smtp2.pobox.com [64.147.108.71]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 87cc3e3f-f337-11ee-afe6-a90da7624cb6; Fri, 05 Apr 2024 12:30:33 +0200 (CEST) Received: from pb-smtp2.pobox.com (unknown [127.0.0.1]) by pb-smtp2.pobox.com (Postfix) with ESMTP id 9CCA41CCE07; Fri, 5 Apr 2024 06:30:31 -0400 (EDT) (envelope-from sakib@darkstar.site) Received: from pb-smtp2.nyi.icgroup.com (unknown [127.0.0.1]) by pb-smtp2.pobox.com (Postfix) with ESMTP id 937001CCE05; Fri, 5 Apr 2024 06:30:31 -0400 (EDT) (envelope-from sakib@darkstar.site) Received: from localhost (unknown [185.130.54.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by pb-smtp2.pobox.com (Postfix) with ESMTPSA id DA4DF1CCE04; Fri, 5 Apr 2024 06:30:30 -0400 (EDT) (envelope-from sakib@darkstar.site) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 87cc3e3f-f337-11ee-afe6-a90da7624cb6 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed; d=pobox.com; h=from:to:cc :subject:date:message-id:mime-version:content-transfer-encoding; s=sasl; bh=x4+s/HQp9NtJcuBNkyS5ldGfx3iN+MBSSDHfpBpZDd4=; b=qqs2 R5VMOE/HVjcNM9mjlPln0ncoOAFRPWZwfiaGto7nB3FcfkNcDstMcGGfB2BT1ZRx 1w6Xmtq+X+CfcmkOaOScuWS9cDXmfDV5yaFH+JRxF8jQ+zgdOZsgL6yGRjTkzAgS qNNUH/GS2wh+GOhGmttn3Xkd0hvPSEiazMshfko= From: Sergiy Kibrik To: xen-devel@lists.xenproject.org Cc: Jan Beulich , Andrew Cooper , Sergiy Kibrik Subject: [XEN PATCH V1] x86/ucode: optional amd/intel ucode build & load Date: Fri, 5 Apr 2024 13:30:27 +0300 Message-Id: <20240405103027.2704728-1-Sergiy_Kibrik@epam.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Pobox-Relay-ID: 8705E20C-F337-11EE-A79C-25B3960A682E-90055647!pb-smtp2.pobox.com Introduce configuration variables to make it possible to selectively turn on/off CPU microcode management code in the build for AMD and Intel CPUs. This is to allow build configuration for a specific CPU, not compile and load what will not be used anyway. Signed-off-by: Sergiy Kibrik --- xen/arch/x86/Kconfig | 12 ++++++++++++ xen/arch/x86/cpu/microcode/Makefile | 4 ++-- xen/arch/x86/cpu/microcode/core.c | 5 ++++- 3 files changed, 18 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig index d6f3128588..1ee5ae793d 100644 --- a/xen/arch/x86/Kconfig +++ b/xen/arch/x86/Kconfig @@ -350,6 +350,18 @@ config REQUIRE_NX was unavailable. However, if enabled, Xen will no longer boot on any CPU which is lacking NX support. +config MICROCODE_INTEL + bool "Build with Intel CPU ucode support" if EXPERT + default y + help + Support microcode management for Intel processors. If unsure, say Y. + +config MICROCODE_AMD + bool "Build with AMD CPU ucode support" if EXPERT + default y + help + Support microcode management for AMD K10 family of processors + and later. If unsure, say Y. endmenu source "common/Kconfig" diff --git a/xen/arch/x86/cpu/microcode/Makefile b/xen/arch/x86/cpu/microcode/Makefile index aae235245b..abd0afe8c5 100644 --- a/xen/arch/x86/cpu/microcode/Makefile +++ b/xen/arch/x86/cpu/microcode/Makefile @@ -1,3 +1,3 @@ -obj-y += amd.o obj-y += core.o -obj-y += intel.o +obj-$(CONFIG_MICROCODE_AMD) += amd.o +obj-$(CONFIG_MICROCODE_INTEL) += intel.o diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode/core.c index 1c9f66ea8a..b7c108f68b 100644 --- a/xen/arch/x86/cpu/microcode/core.c +++ b/xen/arch/x86/cpu/microcode/core.c @@ -865,6 +865,7 @@ int __init early_microcode_init(unsigned long *module_map, switch ( c->x86_vendor ) { +#ifdef CONFIG_MICROCODE_AMD case X86_VENDOR_AMD: if ( c->x86 >= 0x10 ) { @@ -872,11 +873,13 @@ int __init early_microcode_init(unsigned long *module_map, can_load = true; } break; - +#endif +#ifdef CONFIG_MICROCODE_INTEL case X86_VENDOR_INTEL: ucode_ops = intel_ucode_ops; can_load = intel_can_load_microcode(); break; +#endif } if ( !ucode_ops.apply_microcode )