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Sat, 13 Apr 2024 10:19:44 -0400 (EDT) From: =?utf-8?q?Niklas_S=C3=B6derlund?= To: Geert Uytterhoeven , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org Cc: =?utf-8?q?Niklas_S=C3=B6derlund?= Subject: [PATCH v3 1/2] arm64: dts: renesas: r8a779g0: Use MDIO node for all AVB devices Date: Sat, 13 Apr 2024 16:18:05 +0200 Message-ID: <20240413141806.300989-2-niklas.soderlund+renesas@ragnatech.se> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240413141806.300989-1-niklas.soderlund+renesas@ragnatech.se> References: <20240413141806.300989-1-niklas.soderlund+renesas@ragnatech.se> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Switch from defining the PHY inside the AVB node itself and create a dedicated MDIO node for AVB0, the only AVB describing a PHY. This is needed as adding PHYs to AVB1 and AVB2 will require setting MDIO bus parapets and thus requires a dedicated node. Signed-off-by: Niklas Söderlund Reviewed-by: Geert Uytterhoeven --- * Changes since v2 - New in v2. --- arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 6 ----- .../dts/renesas/white-hawk-cpu-common.dtsi | 23 +++++++++++-------- 2 files changed, 14 insertions(+), 15 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi index 9bc542bc6169..2ee306305d83 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi @@ -815,8 +815,6 @@ avb0: ethernet@e6800000 { phy-mode = "rgmii"; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; @@ -862,8 +860,6 @@ avb1: ethernet@e6810000 { phy-mode = "rgmii"; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; @@ -909,8 +905,6 @@ avb2: ethernet@e6820000 { phy-mode = "rgmii"; rx-internal-delay-ps = <0>; tx-internal-delay-ps = <0>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi b/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi index 8ac17370ff36..b671bfab049b 100644 --- a/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi +++ b/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi @@ -142,18 +142,23 @@ reg_3p3v: regulator-3p3v { &avb0 { pinctrl-0 = <&avb0_pins>; pinctrl-names = "default"; - phy-handle = <&phy0>; + phy-handle = <&avb0_phy>; tx-internal-delay-ps = <2000>; status = "okay"; - phy0: ethernet-phy@0 { - compatible = "ethernet-phy-id0022.1622", - "ethernet-phy-ieee802.3-c22"; - rxc-skew-ps = <1500>; - reg = <0>; - interrupt-parent = <&gpio7>; - interrupts = <5 IRQ_TYPE_LEVEL_LOW>; - reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>; + mdio { + #address-cells = <1>; + #size-cells = <0>; + + avb0_phy: ethernet-phy@0 { + compatible = "ethernet-phy-id0022.1622", + "ethernet-phy-ieee802.3-c22"; + rxc-skew-ps = <1500>; + reg = <0>; + interrupt-parent = <&gpio7>; + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>; + }; }; }; From patchwork Sat Apr 13 14:18:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Niklas_S=C3=B6derlund?= X-Patchwork-Id: 13628698 X-Patchwork-Delegate: geert@linux-m68k.org Received: from wflow3-smtp.messagingengine.com (wflow3-smtp.messagingengine.com [64.147.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5B9E845034; Sat, 13 Apr 2024 14:19:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=64.147.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713017991; cv=none; b=ucEQ56G/ysOCtYiSL8jITORP7sjP99QiMP7tZp3qGcY5PQmS07XON9g0uGyc+OIIm4eX/7PhDQoUSITzGSSWZo1biSfR4OgCo+49KlBnvNhmsAiYxNsON8ZNm1ctmfOyemDDbyZV5nfLiYRQE2L+208n2Q2Umabh0oFDESu8JAY= ARC-Message-Signature: i=1; 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Sat, 13 Apr 2024 10:19:46 -0400 (EDT) From: =?utf-8?q?Niklas_S=C3=B6derlund?= To: Geert Uytterhoeven , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org Cc: =?utf-8?q?Niklas_S=C3=B6derlund?= Subject: [PATCH v3 2/2] arm64: dts: renesas: white-hawk: ethernet: Describe AVB1 and AVB2 Date: Sat, 13 Apr 2024 16:18:06 +0200 Message-ID: <20240413141806.300989-3-niklas.soderlund+renesas@ragnatech.se> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240413141806.300989-1-niklas.soderlund+renesas@ragnatech.se> References: <20240413141806.300989-1-niklas.soderlund+renesas@ragnatech.se> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Describe the two Marvell 88Q2110/QFN40 PHYs available on the R-Car V4H White Hawk RAVB/Ethernet(1000Base-T1) sub-board. The two PHYs are wired up on the board by default, there is no need to move any resistors which are needed to access other PHYs available on this sub-board. Signed-off-by: Niklas Söderlund Reviewed-by: Geert Uytterhoeven --- * Changes since v2 - Fix spelling in commit message. - Add pinconf for link pin for both AVBs. - Rename the phy node to make it clear which AVB it relates too. - Add aliases for ethernet1 and ethernet2 so U-Boot can set MAC addresses. - Rebase to reflect updated of filename for white-hawk-ethernet.dtsi. * Changes since v1 - Correct typo in commit s/adv1/avb1/. - Do not use underscores in node names. - Move the MDIO bus properties into a septate child mdio node. This change depends on updates to the driver and bindings posted separately. --- .../boot/dts/renesas/white-hawk-ethernet.dtsi | 103 ++++++++++++++++++ 1 file changed, 103 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi b/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi index a218fda337cf..595ec4ff4cdd 100644 --- a/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi +++ b/arch/arm64/boot/dts/renesas/white-hawk-ethernet.dtsi @@ -6,6 +6,57 @@ * Copyright (C) 2022 Glider bv */ +/ { + aliases { + ethernet1 = &avb1; + ethernet2 = &avb2; + }; +}; + +&avb1 { + pinctrl-0 = <&avb1_pins>; + pinctrl-names = "default"; + phy-handle = <&avb1_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio6 1 GPIO_ACTIVE_LOW>; + reset-post-delay-us = <4000>; + + avb1_phy: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + interrupt-parent = <&gpio6>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + +&avb2 { + pinctrl-0 = <&avb2_pins>; + pinctrl-names = "default"; + phy-handle = <&avb2_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>; + reset-post-delay-us = <4000>; + + avb2_phy: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + interrupt-parent = <&gpio5>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + &i2c0 { eeprom@53 { compatible = "rohm,br24g01", "atmel,24c01"; @@ -14,3 +65,55 @@ eeprom@53 { pagesize = <8>; }; }; + +&pfc { + avb1_pins: avb1 { + mux { + groups = "avb1_link", "avb1_mdio", "avb1_rgmii", + "avb1_txcrefclk"; + function = "avb1"; + }; + + mdio { + groups = "avb1_mdio"; + drive-strength = <24>; + bias-disable; + }; + + rgmii { + groups = "avb1_rgmii"; + drive-strength = <24>; + bias-disable; + }; + + link { + groups = "avb1_link"; + bias-disable; + }; + }; + + avb2_pins: avb2 { + mux { + groups = "avb2_link", "avb2_mdio", "avb2_rgmii", + "avb2_txcrefclk"; + function = "avb2"; + }; + + mdio { + groups = "avb2_mdio"; + drive-strength = <24>; + bias-disable; + }; + + rgmii { + groups = "avb2_rgmii"; + drive-strength = <24>; + bias-disable; + }; + + link { + groups = "avb2_link"; + bias-disable; + }; + }; +};