From patchwork Mon Apr 15 13:49:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Antonio Borneo X-Patchwork-Id: 13630094 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 11514C00A94 for ; Mon, 15 Apr 2024 13:50:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=CWe+QmR5MW3oXwc/PGiGILIXc9TNhoPE6LJlDaPPQJQ=; b=e5waicYMwAe8JL i5sDekbMtt1OZlxdan0u11K/QpEsAxQruiNuWd9P8GfQ/NiYCrLiGbwdwj4pbQA3XABeb4rPAeDtS WGdy9pTTet7Zno/2o7mKsYLidKgWyhQo8a0POg+MIgZ8GH97m2yHPCfueVGzAOvo5i1Bqt0drgVkI OHVXHRy18LvKlsl8Mw9vilMZ4u+e/RkMJ8tqU+V9csTh/QTX16wrwjOeSEAdtzXVwoDjndBIp0qgB 6Xz3naw+QZQ1PkB1XM/7P+113bbivmGbJ3cmUGUo7SRSbn6Ka5o7ycJJDDTZIvWqwH36/6jSjOYMr 6fmmnZp3V2VQTgzaqsSg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwMjR-00000008ZXH-0GkS; Mon, 15 Apr 2024 13:50:49 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwMjI-00000008ZVP-2OB1 for linux-arm-kernel@lists.infradead.org; Mon, 15 Apr 2024 13:50:42 +0000 Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 43FCfawS003792; Mon, 15 Apr 2024 15:50:33 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= selector1; bh=rUD78DxlX0EIa1cgMZF54Ia2DNfKJDkVjpOME48LvOs=; b=qY XDNHJD1VnyV84lBaDRi+vPtrskkWmXNfcqfnh/SfWu3ArmJLL0Qb2/zRcYD/TX8m EJNcVg2xE89Cf0kd1rsNVYxq2KFdJk2tiDHW5tn77oaeq/mzVxEUk2XoElQg9w6V Zj7Q/HT1hHjCv6KM6GMR8DewjPOAowDDtjsVdjoB4LfNejN75ltkfZEOAOLElyHs uQ+D4O2PORgjKPV4PU21aUNa6V27W9nTtCW1lihwNWitqGZFz4DprGu8RNW2Br8E 6EwGU0Sebk4TZWvwAeYOXfyn7jUHRhJeCtBhCSEk0gwTOFU1kkwv97FQtEfWvuLp T84iw9qYS5EHuURabDhg== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3xffff85un-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 15 Apr 2024 15:50:33 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id A777940044; Mon, 15 Apr 2024 15:50:30 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 02A4D218626; Mon, 15 Apr 2024 15:49:45 +0200 (CEST) Received: from localhost (10.48.86.102) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 15 Apr 2024 15:49:44 +0200 From: Antonio Borneo To: Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Catalin Marinas , Will Deacon CC: Antonio Borneo , Fabrice Gasnier , , , , Subject: [PATCH v2 02/11] dt-bindings: interrupt-controller: stm32-exti: Add irq mapping to parent Date: Mon, 15 Apr 2024 15:49:17 +0200 Message-ID: <20240415134926.1254428-3-antonio.borneo@foss.st.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240216094758.916722-1-antonio.borneo@foss.st.com> References: <20240216094758.916722-1-antonio.borneo@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.86.102] X-ClientProxiedBy: SAFCAS1NODE2.st.com (10.75.90.13) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-04-15_11,2024-04-15_01,2023-05-22_02 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240415_065040_939590_07BFC3AE X-CRM114-Status: GOOD ( 12.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The mapping of EXTI events to its parent interrupt controller is both SoC and instance dependent. The current implementation requires adding a new mapping table to the driver's code and a new compatible for each new EXTI instance. Use the interrupts-extended property to list, for each EXTI event, the associated parent interrupt. Co-developed-by: Fabrice Gasnier Signed-off-by: Fabrice Gasnier Signed-off-by: Antonio Borneo Reviewed-by: Rob Herring (Arm) --- .../interrupt-controller/st,stm32-exti.yaml | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml b/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml index 00c10a8258f13..9967e57b449b0 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml @@ -89,8 +89,23 @@ examples: reg = <0x5000d000 0x400>; }; + - | //Example 2 - exti2: interrupt-controller@40013c00 { + #include + exti2: interrupt-controller@5000d000 { + compatible = "st,stm32mp1-exti", "syscon"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x5000d000 0x400>; + interrupts-extended = + <&intc GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <0>, + <&intc GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + }; + + - | + //Example 3 + exti3: interrupt-controller@40013c00 { compatible = "st,stm32-exti"; interrupt-controller; #interrupt-cells = <2>;