From patchwork Wed Apr 17 13:02:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13633302 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5AA3CC04FFE for ; Wed, 17 Apr 2024 13:03:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C9DCE1134BE; Wed, 17 Apr 2024 13:02:59 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="PgxjmoFL"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3467A10F5FF; Wed, 17 Apr 2024 13:02:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713358978; x=1744894978; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=LxWkEW4+yjZXxBaZBi/ts4k5y+56HLn2nDmcgqK2Q+g=; b=PgxjmoFL9LvMoiT6+Niey0pnWN85dN4AQ39Bz/YKsjmOyMxJqSlhHs0D 7NUY1sM9trL2gc6xRoNNReOHl5qsrTG9HNoBWJ2YQIuMHnEPZWouHN1Sh t7Qkzxm9hrWHjAxMfU/aJB/Cr5UrwHGwSKaoWyTkDe4NjfgEk/9GHZH7E CVJIr6H+YGppQLJBSzCg6V/Qu7/i12NLJKSVUX+if2cFo3BqHkz/6I7On jtKPRu2eHBe1oq8g8CGnHQAzbmV16OvSpZFq/CHd5CFVL3eok9Y15Fh3l tik5iZAJyYOwwE6WHSU6Z94BqWX20pE53I/YN+2Uyywpob4gie5Bh/Wol g==; X-CSE-ConnectionGUID: CO5yslW6RHy1sczNxmmsUQ== X-CSE-MsgGUID: XuAEdSdbQ96fU0yQTC672g== X-IronPort-AV: E=McAfee;i="6600,9927,11046"; a="8976790" X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="8976790" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:02:58 -0700 X-CSE-ConnectionGUID: YMkfcgMGRxe+DuDJ8kr4UA== X-CSE-MsgGUID: xJcznGa3Rn6PrrtPN7VdOg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="27199367" Received: from vpus-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.45.164]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:02:56 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: rodrigo.vivi@intel.com, Luca Coelho , jani.nikula@intel.com Subject: [PATCH v4 1/9] drm/i915/display: add intel_display -> drm_device backpointer Date: Wed, 17 Apr 2024 16:02:39 +0300 Message-Id: <47dd7bc4aae3c10b18097824e37617c072c66c0b.1713358679.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" As a baby step towards making struct intel_display the main data structure for display, add a backpointer to struct drm_device that can be used instead of &i915->drm. Reviewed-by: Rodrigo Vivi Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_display_core.h | 3 +++ drivers/gpu/drm/i915/display/intel_display_device.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h index 9d89828e87df..7715fc329057 100644 --- a/drivers/gpu/drm/i915/display/intel_display_core.h +++ b/drivers/gpu/drm/i915/display/intel_display_core.h @@ -283,6 +283,9 @@ struct intel_wm { }; struct intel_display { + /* drm device backpointer */ + struct drm_device *drm; + /* Display functions */ struct { /* Top level crtc-ish functions */ diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c index b8903bd0e82a..120e209ee74a 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.c +++ b/drivers/gpu/drm/i915/display/intel_display_device.c @@ -927,6 +927,9 @@ void intel_display_device_probe(struct drm_i915_private *i915) const struct intel_display_device_info *info; u16 ver, rel, step; + /* Add drm device backpointer as early as possible. */ + i915->display.drm = &i915->drm; + if (HAS_GMD_ID(i915)) info = probe_gmdid_display(i915, &ver, &rel, &step); else From patchwork Wed Apr 17 13:02:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13633303 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5D62EC04FFF for ; Wed, 17 Apr 2024 13:03:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D2F6D1134C1; Wed, 17 Apr 2024 13:03:04 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="H2bXUZ5U"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id E0FC11134B8; Wed, 17 Apr 2024 13:03:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713358983; x=1744894983; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qTk6iPrq6cTcy+zuBi5nLeiyhlbJQKPZU/Xel92KU7s=; b=H2bXUZ5U3Gj/8RKRqHZK3SrSU8n7U5uQz+534xzD4jTZezgQ5H3Jnort EQn4bkEO0UfbPPfLbubLzh/uEtokRAfiUINTTIpJWS1cav16Zhy7LZB8d wSlOCsNd6Xf6blcNrnrTg3btKf2ad1HKyTIUDli/nzgg/iFZBR0/z2GJw BBy35zAavw9bKbA5ngjKQFcLBlJG5E+xKNTSkHrDgEZEz5hJgNAfl98n4 oQYj5WFExrjr9//2kkjUz49c8WGtO9t/0Fo/zSq0rdTAE5AbsjR1wlt4y jpgr/dUB6CNxn/Tw301m4Aukxr7HK2txMloCjGQwvyGzrgcZtvJVHAAoJ w==; X-CSE-ConnectionGUID: zcH08MBOSCO1ZkxPIY+B1w== X-CSE-MsgGUID: flCNqNc/Ra2yDjktD7xPQQ== X-IronPort-AV: E=McAfee;i="6600,9927,11046"; a="8976809" X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="8976809" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:03:02 -0700 X-CSE-ConnectionGUID: 53ZC7Nz/TVS6Aj3YQnt96A== X-CSE-MsgGUID: cn/beyDDQbSAwVJfwLGg8g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="27199386" Received: from vpus-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.45.164]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:03:01 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: rodrigo.vivi@intel.com, Luca Coelho , jani.nikula@intel.com Subject: [PATCH v4 2/9] drm/i915/display: add generic to_intel_display() macro Date: Wed, 17 Apr 2024 16:02:40 +0300 Message-Id: <02cf407961200db4379370856c779ea62b3eaa90.1713358679.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Convert various pointers to struct intel_display * using _Generic(). Add some macro magic to make adding new conversions easier, and somewhat abstract the need to cast each generic association. The cast is required because all associations needs to compile, regardless of the type and the generic selection. The use of *p in the generic selection assignment expression removes the need to add separate associations for const pointers. Note: This intentionally does *not* cover struct drm_i915_private or struct xe_device. They are not to be used in the long run, so avoid using this macro for them. Reviewed-by: Rodrigo Vivi Signed-off-by: Jani Nikula --- .../drm/i915/display/intel_display_types.h | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 0f4bd5710796..1be98c4219b0 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -2197,4 +2197,41 @@ static inline int to_bpp_x16(int bpp) return bpp << 4; } +/* + * Conversion functions/macros from various pointer types to struct + * intel_display pointer. + */ +#define __drm_device_to_intel_display(p) \ + (&to_i915(p)->display) +#define __intel_connector_to_intel_display(p) \ + __drm_device_to_intel_display((p)->base.dev) +#define __intel_crtc_to_intel_display(p) \ + __drm_device_to_intel_display((p)->base.dev) +#define __intel_crtc_state_to_intel_display(p) \ + __drm_device_to_intel_display((p)->uapi.crtc->dev) +#define __intel_digital_port_to_intel_display(p) \ + __drm_device_to_intel_display((p)->base.base.dev) +#define __intel_dp_to_intel_display(p) \ + __drm_device_to_intel_display(dp_to_dig_port(p)->base.base.dev) +#define __intel_encoder_to_intel_display(p) \ + __drm_device_to_intel_display((p)->base.dev) +#define __intel_hdmi_to_intel_display(p) \ + __drm_device_to_intel_display(hdmi_to_dig_port(p)->base.base.dev) + +/* Helper for generic association. Map types to conversion functions/macros. */ +#define __assoc(type, p) \ + struct type: __##type##_to_intel_display((struct type *)(p)) + +/* Convert various pointer types to struct intel_display pointer. */ +#define to_intel_display(p) \ + _Generic(*p, \ + __assoc(drm_device, p), \ + __assoc(intel_connector, p), \ + __assoc(intel_crtc, p), \ + __assoc(intel_crtc_state, p), \ + __assoc(intel_digital_port, p), \ + __assoc(intel_dp, p), \ + __assoc(intel_encoder, p), \ + __assoc(intel_hdmi, p)) + #endif /* __INTEL_DISPLAY_TYPES_H__ */ From patchwork Wed Apr 17 13:02:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13633304 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C79F7C4345F for ; Wed, 17 Apr 2024 13:03:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 44F3B10F5FF; Wed, 17 Apr 2024 13:03:11 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="AG6e2zOT"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id ACCC710F608; Wed, 17 Apr 2024 13:03:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713358990; x=1744894990; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5LlPo249W0xgAevm/GLfqQICL1vBy6AAE6vNFmrQbJM=; b=AG6e2zOT8/TBaeDWHDnlHH8C5EiTo7CJIyD5+WnsJSE2v70/iipzRfDf tCQWGYi0GaHhc+Y9G2wbDVjDL677BcA0SwZPRF6f6o0DVc/qkKfAvmsdM GSKFiPZVkIFrPvrhT9bDuUBa4fjYgX/kENpkNW4tWI8AK23v3DHrZiZLw ebMXXZY5O+gMDmZyKgnKIu7rsfe63Vm9r4jRHL+/7mM9U+PCUZDVeiUun Ys9MnPLynIS0D8RXlitos3vBj+lKtnHU89D2uAn6IyROasMjISDjh0M2T 0MKYPD6uasViMwgPFJMYL9iUa/oxhKdTEVW5dw+zWcGFPvmcZdD4T09bk g==; X-CSE-ConnectionGUID: gZAD7BhUTTWFlLKCIIL6tw== X-CSE-MsgGUID: FuLdpy6eQZuvDxzM7mr+0A== X-IronPort-AV: E=McAfee;i="6600,9927,11046"; a="26310482" X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="26310482" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:03:08 -0700 X-CSE-ConnectionGUID: cZBYVd4mRzqZAkIF7A4KnA== X-CSE-MsgGUID: 5LFKoNFtRoK22CIOAHnazw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="22628524" Received: from vpus-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.45.164]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:03:06 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: rodrigo.vivi@intel.com, Luca Coelho , jani.nikula@intel.com Subject: [PATCH v4 3/9] drm/i915: add generic __to_intel_display() Date: Wed, 17 Apr 2024 16:02:41 +0300 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add generic __to_intel_display() macro that accepts either struct drm_i915_private * or struct intel_display *. This is to be used for transitional stuff that eventually needs to be converted to use struct intel_display *, and therefore is not part of to_intel_display(). Add new intel_display_conversion.h to host the helper to avoid duplication between xe and i915 drivers. v2: put it in the new header (Rodrigo) Reviewed-by: Rodrigo Vivi # v1 Signed-off-by: Jani Nikula --- .../i915/display/intel_display_conversion.h | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 drivers/gpu/drm/i915/display/intel_display_conversion.h diff --git a/drivers/gpu/drm/i915/display/intel_display_conversion.h b/drivers/gpu/drm/i915/display/intel_display_conversion.h new file mode 100644 index 000000000000..ad8545c8055d --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_display_conversion.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: MIT */ +/* Copyright © 2024 Intel Corporation */ + +/* + * This header is for transitional struct intel_display conversion helpers only. + */ + +#ifndef __INTEL_DISPLAY_CONVERSION__ +#define __INTEL_DISPLAY_CONVERSION__ + +/* + * Transitional macro to optionally convert struct drm_i915_private * to struct + * intel_display *, also accepting the latter. + */ +#define __to_intel_display(p) \ + _Generic(p, \ + const struct drm_i915_private *: (&((const struct drm_i915_private *)(p))->display), \ + struct drm_i915_private *: (&((struct drm_i915_private *)(p))->display), \ + const struct intel_display *: (p), \ + struct intel_display *: (p)) + +#endif /* __INTEL_DISPLAY_CONVERSION__ */ From patchwork Wed Apr 17 13:02:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13633305 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 02D10C04FFF for ; Wed, 17 Apr 2024 13:03:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5275A1134C0; Wed, 17 Apr 2024 13:03:14 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="NYZwcCD4"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id E36A01134C0; Wed, 17 Apr 2024 13:03:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713358993; x=1744894993; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5c/1HJ39E09YtXj0aU5HUyHE5fuBVUha3BLTUCCDurw=; b=NYZwcCD4Pv1tKhLCTmL7ad//Sj67U5vK8zZyJb7gtFEWWTMrTU2O1bzG vCOFN6GdgH+IzBcxC9etc9wwsvNfxD0aCizv3z2ROgoqQpnWjqfRAZ8B7 cS2Mad1DK5a4gb9NtKoFV3pX0wT9fsknLd6vEObyV8oKCWPdQr+GmlfEE EwMjFB8S+3/DzQ7m3z7k8LJMfD9ifcO9VV8+kCXQC1J3XFe0GVBuWAm/Y 6NxeGhkN9CCpAYfXLJ3EJ+Canf1McuNNe/bnwdIa2ApoXR3buUnNp5Ri6 64DDKTdZQlfppdYbBH8MutGg02q7XCh/6+R8ci5xjLz4EFPY7zR8Q0UdM Q==; X-CSE-ConnectionGUID: EmE8lpC8T+ymeQjQEmKA5Q== X-CSE-MsgGUID: OEV56m12TjKIACkMW21XhQ== X-IronPort-AV: E=McAfee;i="6600,9927,11046"; a="26310506" X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="26310506" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:03:13 -0700 X-CSE-ConnectionGUID: CgPtiNQyQTuj7NaMC1Scvw== X-CSE-MsgGUID: llSYTbn9Rne9kc5rOdGXJQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="22628534" Received: from vpus-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.45.164]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:03:11 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: rodrigo.vivi@intel.com, Luca Coelho , jani.nikula@intel.com Subject: [PATCH v4 4/9] drm/i915/display: accept either i915 or display for feature tests Date: Wed, 17 Apr 2024 16:02:42 +0300 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Use the generic __to_intel_display() to allow passing either struct drm_i915_private * or struct intel_display * to the feature test macros. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/intel_display_device.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h index 66b51de86e38..17ddf82f0b6e 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.h +++ b/drivers/gpu/drm/i915/display/intel_display_device.h @@ -8,6 +8,7 @@ #include +#include "intel_display_conversion.h" #include "intel_display_limits.h" struct drm_i915_private; @@ -100,8 +101,8 @@ struct drm_printer; (IS_DISPLAY_IP_RANGE((__i915), (ipver), (ipver)) && \ IS_DISPLAY_STEP((__i915), (from), (until))) -#define DISPLAY_INFO(i915) ((i915)->display.info.__device_info) -#define DISPLAY_RUNTIME_INFO(i915) (&(i915)->display.info.__runtime_info) +#define DISPLAY_INFO(i915) (__to_intel_display(i915)->info.__device_info) +#define DISPLAY_RUNTIME_INFO(i915) (&__to_intel_display(i915)->info.__runtime_info) #define DISPLAY_VER(i915) (DISPLAY_RUNTIME_INFO(i915)->ip.ver) #define DISPLAY_VER_FULL(i915) IP_VER(DISPLAY_RUNTIME_INFO(i915)->ip.ver, \ From patchwork Wed Apr 17 13:02:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13633306 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 524B1C4345F for ; Wed, 17 Apr 2024 13:03:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 98ACF1134C3; Wed, 17 Apr 2024 13:03:20 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="kM2iJcRi"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id E17141134B8; Wed, 17 Apr 2024 13:03:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713358999; x=1744894999; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=AvkQ/xdXGPi55GmtoywzhghyzhUumODCETsa7wtQxKs=; b=kM2iJcRiRtzCWUzY/OgzvG+gvvCErCaZ9S1S3Nt0I0VZgW52zxc0PZMt NsAMKftQFxv6GfkmnMjpZsgvv8kqOPsqbZz2xN/tBfPKphxm/7fGh1kM/ FCiBkFwi9Cqc2kbFQ480UHQ6SRkspY9y+QUuMRyfFCZ1TXsth3zcTX/Rg LsfGwMzu9xYCkIBo/K8WinGJ8ks8N4B3r2gTxEw+CPo15skZdd5vX4E5A nadVHriM4EYG+iKbCI4J1dThauYrxD6NQqEMNcl+a4yVxDzOoSC4Lz/HI Y4y15r1dRSgnSfACN5BDiBrd8gESqaKivlHpQiKhXfZjxEcb8cJqYFKnw g==; X-CSE-ConnectionGUID: itByQdkPQMyFQuyEWotZ/w== X-CSE-MsgGUID: OgyioTPaSnSs46A6A9D6GA== X-IronPort-AV: E=McAfee;i="6600,9927,11046"; a="8976861" X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="8976861" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:03:18 -0700 X-CSE-ConnectionGUID: D3lXx+cUT+K0ByHSEw7hQg== X-CSE-MsgGUID: OnU0uHDjRMqazPENHR7SfA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="27199475" Received: from vpus-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.45.164]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:03:16 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: rodrigo.vivi@intel.com, Luca Coelho , jani.nikula@intel.com Subject: [PATCH v4 5/9] drm/i915/quirks: convert struct drm_i915_private to struct intel_display Date: Wed, 17 Apr 2024 16:02:43 +0300 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Use struct intel_display instead of struct drm_i915_private for quirks. Also do drive-by conversions in call sites of intel_has_quirk(). Reviewed-by: Rodrigo Vivi Signed-off-by: Jani Nikula --- .../gpu/drm/i915/display/intel_backlight.c | 40 ++++++------- drivers/gpu/drm/i915/display/intel_ddi.c | 6 +- .../drm/i915/display/intel_display_driver.c | 3 +- drivers/gpu/drm/i915/display/intel_panel.c | 10 ++-- drivers/gpu/drm/i915/display/intel_pps.c | 6 +- drivers/gpu/drm/i915/display/intel_quirks.c | 56 +++++++++---------- drivers/gpu/drm/i915/display/intel_quirks.h | 6 +- 7 files changed, 65 insertions(+), 62 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c b/drivers/gpu/drm/i915/display/intel_backlight.c index 4d4330410b4d..071668bfe5d1 100644 --- a/drivers/gpu/drm/i915/display/intel_backlight.c +++ b/drivers/gpu/drm/i915/display/intel_backlight.c @@ -83,16 +83,16 @@ static u32 scale_hw_to_user(struct intel_connector *connector, u32 intel_backlight_invert_pwm_level(struct intel_connector *connector, u32 val) { - struct drm_i915_private *i915 = to_i915(connector->base.dev); + struct intel_display *display = to_intel_display(connector); struct intel_panel *panel = &connector->panel; - drm_WARN_ON(&i915->drm, panel->backlight.pwm_level_max == 0); + drm_WARN_ON(display->drm, panel->backlight.pwm_level_max == 0); - if (i915->display.params.invert_brightness < 0) + if (display->params.invert_brightness < 0) return val; - if (i915->display.params.invert_brightness > 0 || - intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS)) { + if (display->params.invert_brightness > 0 || + intel_has_quirk(display, QUIRK_INVERT_BRIGHTNESS)) { return panel->backlight.pwm_level_max - val + panel->backlight.pwm_level_min; } @@ -126,15 +126,15 @@ u32 intel_backlight_level_to_pwm(struct intel_connector *connector, u32 val) u32 intel_backlight_level_from_pwm(struct intel_connector *connector, u32 val) { - struct drm_i915_private *i915 = to_i915(connector->base.dev); + struct intel_display *display = to_intel_display(connector); struct intel_panel *panel = &connector->panel; - drm_WARN_ON_ONCE(&i915->drm, + drm_WARN_ON_ONCE(display->drm, panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0); - if (i915->display.params.invert_brightness > 0 || - (i915->display.params.invert_brightness == 0 && - intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS))) + if (display->params.invert_brightness > 0 || + (display->params.invert_brightness == 0 && + intel_has_quirk(display, QUIRK_INVERT_BRIGHTNESS))) val = panel->backlight.pwm_level_max - (val - panel->backlight.pwm_level_min); return scale(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max, @@ -1642,17 +1642,17 @@ void intel_backlight_update(struct intel_atomic_state *state, int intel_backlight_setup(struct intel_connector *connector, enum pipe pipe) { - struct drm_i915_private *i915 = to_i915(connector->base.dev); + struct intel_display *display = to_intel_display(connector); struct intel_panel *panel = &connector->panel; int ret; if (!connector->panel.vbt.backlight.present) { - if (intel_has_quirk(i915, QUIRK_BACKLIGHT_PRESENT)) { - drm_dbg_kms(&i915->drm, + if (intel_has_quirk(display, QUIRK_BACKLIGHT_PRESENT)) { + drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] no backlight present per VBT, but present per quirk\n", connector->base.base.id, connector->base.name); } else { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] no backlight present per VBT\n", connector->base.base.id, connector->base.name); return 0; @@ -1660,16 +1660,16 @@ int intel_backlight_setup(struct intel_connector *connector, enum pipe pipe) } /* ensure intel_panel has been initialized first */ - if (drm_WARN_ON(&i915->drm, !panel->backlight.funcs)) + if (drm_WARN_ON(display->drm, !panel->backlight.funcs)) return -ENODEV; /* set level and max in panel struct */ - mutex_lock(&i915->display.backlight.lock); + mutex_lock(&display->backlight.lock); ret = panel->backlight.funcs->setup(connector, pipe); - mutex_unlock(&i915->display.backlight.lock); + mutex_unlock(&display->backlight.lock); if (ret) { - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] failed to setup backlight\n", connector->base.base.id, connector->base.name); return ret; @@ -1677,7 +1677,7 @@ int intel_backlight_setup(struct intel_connector *connector, enum pipe pipe) panel->backlight.present = true; - drm_dbg_kms(&i915->drm, + drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] backlight initialized, %s, brightness %u/%u\n", connector->base.base.id, connector->base.name, str_enabled_disabled(panel->backlight.enabled), @@ -1821,7 +1821,7 @@ void intel_backlight_init_funcs(struct intel_panel *panel) if (intel_dp_aux_init_backlight_funcs(connector) == 0) return; - if (!intel_has_quirk(i915, QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK)) + if (!intel_has_quirk(&i915->display, QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK)) connector->panel.backlight.power = intel_pps_backlight_power; } diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 3255d4e375af..f99ca7a5c356 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -631,6 +631,7 @@ intel_ddi_config_transcoder_func(struct intel_encoder *encoder, void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; @@ -661,10 +662,9 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl); - if (intel_has_quirk(dev_priv, QUIRK_INCREASE_DDI_DISABLED_TIME) && + if (intel_has_quirk(display, QUIRK_INCREASE_DDI_DISABLED_TIME) && intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) { - drm_dbg_kms(&dev_priv->drm, - "Quirk Increase DDI disabled time\n"); + drm_dbg_kms(display->drm, "Quirk Increase DDI disabled time\n"); /* Quirk time at 100ms for reliable operation */ msleep(100); } diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c index e4015557af6a..4f112a69dea8 100644 --- a/drivers/gpu/drm/i915/display/intel_display_driver.c +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c @@ -204,6 +204,7 @@ void intel_display_driver_early_probe(struct drm_i915_private *i915) /* part #1: call before irq install */ int intel_display_driver_probe_noirq(struct drm_i915_private *i915) { + struct intel_display *display = &i915->display; int ret; if (i915_inject_probe_failure(i915)) @@ -262,7 +263,7 @@ int intel_display_driver_probe_noirq(struct drm_i915_private *i915) if (ret) goto cleanup_vga_client_pw_domain_dmc; - intel_init_quirks(i915); + intel_init_quirks(display); intel_fbc_init(i915); diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c index 073ea3166c36..6f4ff6a89c32 100644 --- a/drivers/gpu/drm/i915/display/intel_panel.c +++ b/drivers/gpu/drm/i915/display/intel_panel.c @@ -47,10 +47,12 @@ bool intel_panel_use_ssc(struct drm_i915_private *i915) { - if (i915->display.params.panel_use_ssc >= 0) - return i915->display.params.panel_use_ssc != 0; - return i915->display.vbt.lvds_use_ssc && - !intel_has_quirk(i915, QUIRK_LVDS_SSC_DISABLE); + struct intel_display *display = &i915->display; + + if (display->params.panel_use_ssc >= 0) + return display->params.panel_use_ssc != 0; + return display->vbt.lvds_use_ssc && + !intel_has_quirk(display, QUIRK_LVDS_SSC_DISABLE); } const struct drm_display_mode * diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c index 3078dfac7817..0ccbf9a85914 100644 --- a/drivers/gpu/drm/i915/display/intel_pps.c +++ b/drivers/gpu/drm/i915/display/intel_pps.c @@ -1350,7 +1350,7 @@ static void pps_init_delays_bios(struct intel_dp *intel_dp, static void pps_init_delays_vbt(struct intel_dp *intel_dp, struct edp_power_seq *vbt) { - struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); + struct intel_display *display = to_intel_display(intel_dp); struct intel_connector *connector = intel_dp->attached_connector; *vbt = connector->panel.vbt.edp.pps; @@ -1363,9 +1363,9 @@ static void pps_init_delays_vbt(struct intel_dp *intel_dp, * just fails to power back on. Increasing the delay to 800ms * seems sufficient to avoid this problem. */ - if (intel_has_quirk(dev_priv, QUIRK_INCREASE_T12_DELAY)) { + if (intel_has_quirk(display, QUIRK_INCREASE_T12_DELAY)) { vbt->t11_t12 = max_t(u16, vbt->t11_t12, 1300 * 10); - drm_dbg_kms(&dev_priv->drm, + drm_dbg_kms(display->drm, "Increasing T12 panel delay as per the quirk to %d\n", vbt->t11_t12); } diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c b/drivers/gpu/drm/i915/display/intel_quirks.c index a280448df771..14d5fefc9c5b 100644 --- a/drivers/gpu/drm/i915/display/intel_quirks.c +++ b/drivers/gpu/drm/i915/display/intel_quirks.c @@ -9,72 +9,72 @@ #include "intel_display_types.h" #include "intel_quirks.h" -static void intel_set_quirk(struct drm_i915_private *i915, enum intel_quirk_id quirk) +static void intel_set_quirk(struct intel_display *display, enum intel_quirk_id quirk) { - i915->display.quirks.mask |= BIT(quirk); + display->quirks.mask |= BIT(quirk); } /* * Some machines (Lenovo U160) do not work with SSC on LVDS for some reason */ -static void quirk_ssc_force_disable(struct drm_i915_private *i915) +static void quirk_ssc_force_disable(struct intel_display *display) { - intel_set_quirk(i915, QUIRK_LVDS_SSC_DISABLE); - drm_info(&i915->drm, "applying lvds SSC disable quirk\n"); + intel_set_quirk(display, QUIRK_LVDS_SSC_DISABLE); + drm_info(display->drm, "applying lvds SSC disable quirk\n"); } /* * A machine (e.g. Acer Aspire 5734Z) may need to invert the panel backlight * brightness value */ -static void quirk_invert_brightness(struct drm_i915_private *i915) +static void quirk_invert_brightness(struct intel_display *display) { - intel_set_quirk(i915, QUIRK_INVERT_BRIGHTNESS); - drm_info(&i915->drm, "applying inverted panel brightness quirk\n"); + intel_set_quirk(display, QUIRK_INVERT_BRIGHTNESS); + drm_info(display->drm, "applying inverted panel brightness quirk\n"); } /* Some VBT's incorrectly indicate no backlight is present */ -static void quirk_backlight_present(struct drm_i915_private *i915) +static void quirk_backlight_present(struct intel_display *display) { - intel_set_quirk(i915, QUIRK_BACKLIGHT_PRESENT); - drm_info(&i915->drm, "applying backlight present quirk\n"); + intel_set_quirk(display, QUIRK_BACKLIGHT_PRESENT); + drm_info(display->drm, "applying backlight present quirk\n"); } /* Toshiba Satellite P50-C-18C requires T12 delay to be min 800ms * which is 300 ms greater than eDP spec T12 min. */ -static void quirk_increase_t12_delay(struct drm_i915_private *i915) +static void quirk_increase_t12_delay(struct intel_display *display) { - intel_set_quirk(i915, QUIRK_INCREASE_T12_DELAY); - drm_info(&i915->drm, "Applying T12 delay quirk\n"); + intel_set_quirk(display, QUIRK_INCREASE_T12_DELAY); + drm_info(display->drm, "Applying T12 delay quirk\n"); } /* * GeminiLake NUC HDMI outputs require additional off time * this allows the onboard retimer to correctly sync to signal */ -static void quirk_increase_ddi_disabled_time(struct drm_i915_private *i915) +static void quirk_increase_ddi_disabled_time(struct intel_display *display) { - intel_set_quirk(i915, QUIRK_INCREASE_DDI_DISABLED_TIME); - drm_info(&i915->drm, "Applying Increase DDI Disabled quirk\n"); + intel_set_quirk(display, QUIRK_INCREASE_DDI_DISABLED_TIME); + drm_info(display->drm, "Applying Increase DDI Disabled quirk\n"); } -static void quirk_no_pps_backlight_power_hook(struct drm_i915_private *i915) +static void quirk_no_pps_backlight_power_hook(struct intel_display *display) { - intel_set_quirk(i915, QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK); - drm_info(&i915->drm, "Applying no pps backlight power quirk\n"); + intel_set_quirk(display, QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK); + drm_info(display->drm, "Applying no pps backlight power quirk\n"); } struct intel_quirk { int device; int subsystem_vendor; int subsystem_device; - void (*hook)(struct drm_i915_private *i915); + void (*hook)(struct intel_display *display); }; /* For systems that don't have a meaningful PCI subdevice/subvendor ID */ struct intel_dmi_quirk { - void (*hook)(struct drm_i915_private *i915); + void (*hook)(struct intel_display *display); const struct dmi_system_id (*dmi_id_list)[]; }; @@ -203,9 +203,9 @@ static struct intel_quirk intel_quirks[] = { { 0x0f31, 0x103c, 0x220f, quirk_invert_brightness }, }; -void intel_init_quirks(struct drm_i915_private *i915) +void intel_init_quirks(struct intel_display *display) { - struct pci_dev *d = to_pci_dev(i915->drm.dev); + struct pci_dev *d = to_pci_dev(display->drm->dev); int i; for (i = 0; i < ARRAY_SIZE(intel_quirks); i++) { @@ -216,15 +216,15 @@ void intel_init_quirks(struct drm_i915_private *i915) q->subsystem_vendor == PCI_ANY_ID) && (d->subsystem_device == q->subsystem_device || q->subsystem_device == PCI_ANY_ID)) - q->hook(i915); + q->hook(display); } for (i = 0; i < ARRAY_SIZE(intel_dmi_quirks); i++) { if (dmi_check_system(*intel_dmi_quirks[i].dmi_id_list) != 0) - intel_dmi_quirks[i].hook(i915); + intel_dmi_quirks[i].hook(display); } } -bool intel_has_quirk(struct drm_i915_private *i915, enum intel_quirk_id quirk) +bool intel_has_quirk(struct intel_display *display, enum intel_quirk_id quirk) { - return i915->display.quirks.mask & BIT(quirk); + return display->quirks.mask & BIT(quirk); } diff --git a/drivers/gpu/drm/i915/display/intel_quirks.h b/drivers/gpu/drm/i915/display/intel_quirks.h index 10a4d163149f..151c8f4ae576 100644 --- a/drivers/gpu/drm/i915/display/intel_quirks.h +++ b/drivers/gpu/drm/i915/display/intel_quirks.h @@ -8,7 +8,7 @@ #include -struct drm_i915_private; +struct intel_display; enum intel_quirk_id { QUIRK_BACKLIGHT_PRESENT, @@ -19,7 +19,7 @@ enum intel_quirk_id { QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK, }; -void intel_init_quirks(struct drm_i915_private *i915); -bool intel_has_quirk(struct drm_i915_private *i915, enum intel_quirk_id quirk); +void intel_init_quirks(struct intel_display *display); +bool intel_has_quirk(struct intel_display *display, enum intel_quirk_id quirk); #endif /* __INTEL_QUIRKS_H__ */ From patchwork Wed Apr 17 13:02:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13633307 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 02EF4C04FFF for ; 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X-CSE-ConnectionGUID: jXwA9Y5KSn61JrBbPgBs8w== X-CSE-MsgGUID: 9/uevZsaS9ykeTmsR9FBEA== X-IronPort-AV: E=McAfee;i="6600,9927,11046"; a="8976869" X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="8976869" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:03:23 -0700 X-CSE-ConnectionGUID: 8IR+POXVTvuUgvpX8+KaEQ== X-CSE-MsgGUID: hXLPFzBBTlyYE2u7GRU6/A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="27199495" Received: from vpus-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.45.164]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:03:21 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: rodrigo.vivi@intel.com, Luca Coelho , jani.nikula@intel.com Subject: [PATCH v4 6/9] drm/i915/display: rename __intel_wait_for_register_nowl() to indicate intel_de_ Date: Wed, 17 Apr 2024 16:02:44 +0300 Message-Id: <967d3fc67a9053f7d5f9c03010fd5f94dc8d547d.1713358679.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Rename __intel_wait_for_register_nowl() to __intel_de_wait_for_register_nowl() to be in line with the rest of intel_de.h. Cc: Luca Coelho Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/intel_de.h | 6 +++--- drivers/gpu/drm/i915/display/intel_dmc_wl.c | 14 +++++++------- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h index 0a0fba81e7af..4b51388c6041 100644 --- a/drivers/gpu/drm/i915/display/intel_de.h +++ b/drivers/gpu/drm/i915/display/intel_de.h @@ -97,8 +97,8 @@ intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set) } static inline int -__intel_wait_for_register_nowl(struct drm_i915_private *i915, i915_reg_t reg, - u32 mask, u32 value, unsigned int timeout) +__intel_de_wait_for_register_nowl(struct drm_i915_private *i915, i915_reg_t reg, + u32 mask, u32 value, unsigned int timeout) { return intel_wait_for_register(&i915->uncore, reg, mask, value, timeout); @@ -112,7 +112,7 @@ intel_de_wait(struct drm_i915_private *i915, i915_reg_t reg, intel_dmc_wl_get(i915, reg); - ret = __intel_wait_for_register_nowl(i915, reg, mask, value, timeout); + ret = __intel_de_wait_for_register_nowl(i915, reg, mask, value, timeout); intel_dmc_wl_put(i915, reg); diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c b/drivers/gpu/drm/i915/display/intel_dmc_wl.c index 30f8905fae41..162de0d20554 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c @@ -77,9 +77,9 @@ static void intel_dmc_wl_work(struct work_struct *work) __intel_de_rmw_nowl(i915, DMC_WAKELOCK1_CTL, DMC_WAKELOCK_CTL_REQ, 0); - if (__intel_wait_for_register_nowl(i915, DMC_WAKELOCK1_CTL, - DMC_WAKELOCK_CTL_ACK, 0, - DMC_WAKELOCK_CTL_TIMEOUT)) { + if (__intel_de_wait_for_register_nowl(i915, DMC_WAKELOCK1_CTL, + DMC_WAKELOCK_CTL_ACK, 0, + DMC_WAKELOCK_CTL_TIMEOUT)) { WARN_RATELIMIT(1, "DMC wakelock release timed out"); goto out_unlock; } @@ -216,10 +216,10 @@ void intel_dmc_wl_get(struct drm_i915_private *i915, i915_reg_t reg) __intel_de_rmw_nowl(i915, DMC_WAKELOCK1_CTL, 0, DMC_WAKELOCK_CTL_REQ); - if (__intel_wait_for_register_nowl(i915, DMC_WAKELOCK1_CTL, - DMC_WAKELOCK_CTL_ACK, - DMC_WAKELOCK_CTL_ACK, - DMC_WAKELOCK_CTL_TIMEOUT)) { + if (__intel_de_wait_for_register_nowl(i915, DMC_WAKELOCK1_CTL, + DMC_WAKELOCK_CTL_ACK, + DMC_WAKELOCK_CTL_ACK, + DMC_WAKELOCK_CTL_TIMEOUT)) { WARN_RATELIMIT(1, "DMC wakelock ack timed out"); goto out_unlock; } From patchwork Wed Apr 17 13:02:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13633308 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C5385C04FFE for ; Wed, 17 Apr 2024 13:03:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 462C81134C2; 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X-CSE-ConnectionGUID: ecPF3v2pT/CMgBp+35mtSg== X-CSE-MsgGUID: xMowWBx6S0+wAcvfEw5ihg== X-IronPort-AV: E=McAfee;i="6600,9927,11046"; a="26310537" X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="26310537" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:03:28 -0700 X-CSE-ConnectionGUID: SJA/X+YTTjOZUyN53urWLw== X-CSE-MsgGUID: 1c+wMHkKTWWWzTk9okcUMQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="22628558" Received: from vpus-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.45.164]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:03:26 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: rodrigo.vivi@intel.com, Luca Coelho , jani.nikula@intel.com Subject: [PATCH v4 7/9] drm/i915/dmc: convert dmc wakelock interface to struct intel_display Date: Wed, 17 Apr 2024 16:02:45 +0300 Message-Id: <3c260bbbce0af8714b07157dc032b038efa3bf1c.1713358679.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Convert the dmc wakelock interface to struct intel_display instead of struct drm_i915_private. We'll want to convert the intel_de interfaces, and there's a bit of coupling between the two, so start here. Cc: Luca Coelho Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/intel_de.h | 40 ++++++++-------- .../drm/i915/display/intel_display_driver.c | 2 +- .../i915/display/intel_display_power_well.c | 6 +-- drivers/gpu/drm/i915/display/intel_dmc.c | 4 +- drivers/gpu/drm/i915/display/intel_dmc_wl.c | 48 +++++++++++-------- drivers/gpu/drm/i915/display/intel_dmc_wl.h | 12 ++--- 6 files changed, 59 insertions(+), 53 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h index 4b51388c6041..15440058ad2a 100644 --- a/drivers/gpu/drm/i915/display/intel_de.h +++ b/drivers/gpu/drm/i915/display/intel_de.h @@ -15,11 +15,11 @@ intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) { u32 val; - intel_dmc_wl_get(i915, reg); + intel_dmc_wl_get(&i915->display, reg); val = intel_uncore_read(&i915->uncore, reg); - intel_dmc_wl_put(i915, reg); + intel_dmc_wl_put(&i915->display, reg); return val; } @@ -29,11 +29,11 @@ intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg) { u8 val; - intel_dmc_wl_get(i915, reg); + intel_dmc_wl_get(&i915->display, reg); val = intel_uncore_read8(&i915->uncore, reg); - intel_dmc_wl_put(i915, reg); + intel_dmc_wl_put(&i915->display, reg); return val; } @@ -44,13 +44,13 @@ intel_de_read64_2x32(struct drm_i915_private *i915, { u64 val; - intel_dmc_wl_get(i915, lower_reg); - intel_dmc_wl_get(i915, upper_reg); + intel_dmc_wl_get(&i915->display, lower_reg); + intel_dmc_wl_get(&i915->display, upper_reg); val = intel_uncore_read64_2x32(&i915->uncore, lower_reg, upper_reg); - intel_dmc_wl_put(i915, upper_reg); - intel_dmc_wl_put(i915, lower_reg); + intel_dmc_wl_put(&i915->display, upper_reg); + intel_dmc_wl_put(&i915->display, lower_reg); return val; } @@ -58,21 +58,21 @@ intel_de_read64_2x32(struct drm_i915_private *i915, static inline void intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg) { - intel_dmc_wl_get(i915, reg); + intel_dmc_wl_get(&i915->display, reg); intel_uncore_posting_read(&i915->uncore, reg); - intel_dmc_wl_put(i915, reg); + intel_dmc_wl_put(&i915->display, reg); } static inline void intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val) { - intel_dmc_wl_get(i915, reg); + intel_dmc_wl_get(&i915->display, reg); intel_uncore_write(&i915->uncore, reg, val); - intel_dmc_wl_put(i915, reg); + intel_dmc_wl_put(&i915->display, reg); } static inline u32 @@ -87,11 +87,11 @@ intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set) { u32 val; - intel_dmc_wl_get(i915, reg); + intel_dmc_wl_get(&i915->display, reg); val = __intel_de_rmw_nowl(i915, reg, clear, set); - intel_dmc_wl_put(i915, reg); + intel_dmc_wl_put(&i915->display, reg); return val; } @@ -110,11 +110,11 @@ intel_de_wait(struct drm_i915_private *i915, i915_reg_t reg, { int ret; - intel_dmc_wl_get(i915, reg); + intel_dmc_wl_get(&i915->display, reg); ret = __intel_de_wait_for_register_nowl(i915, reg, mask, value, timeout); - intel_dmc_wl_put(i915, reg); + intel_dmc_wl_put(&i915->display, reg); return ret; } @@ -125,11 +125,11 @@ intel_de_wait_fw(struct drm_i915_private *i915, i915_reg_t reg, { int ret; - intel_dmc_wl_get(i915, reg); + intel_dmc_wl_get(&i915->display, reg); ret = intel_wait_for_register_fw(&i915->uncore, reg, mask, value, timeout); - intel_dmc_wl_put(i915, reg); + intel_dmc_wl_put(&i915->display, reg); return ret; } @@ -142,12 +142,12 @@ intel_de_wait_custom(struct drm_i915_private *i915, i915_reg_t reg, { int ret; - intel_dmc_wl_get(i915, reg); + intel_dmc_wl_get(&i915->display, reg); ret = __intel_wait_for_register(&i915->uncore, reg, mask, value, fast_timeout_us, slow_timeout_ms, out_value); - intel_dmc_wl_put(i915, reg); + intel_dmc_wl_put(&i915->display, reg); return ret; } diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c index 4f112a69dea8..1b24339e4ab6 100644 --- a/drivers/gpu/drm/i915/display/intel_display_driver.c +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c @@ -198,7 +198,7 @@ void intel_display_driver_early_probe(struct drm_i915_private *i915) intel_dpll_init_clock_hook(i915); intel_init_display_hooks(i915); intel_fdi_init_hook(i915); - intel_dmc_wl_init(i915); + intel_dmc_wl_init(&i915->display); } /* part #1: call before irq install */ diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c index 7f4b7602cf02..a28e61130b81 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c @@ -822,7 +822,7 @@ void gen9_enable_dc5(struct drm_i915_private *dev_priv) intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0, SKL_SELECT_ALTERNATE_DC_EXIT); - intel_dmc_wl_enable(dev_priv); + intel_dmc_wl_enable(&dev_priv->display); gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC5); } @@ -853,7 +853,7 @@ void skl_enable_dc6(struct drm_i915_private *dev_priv) intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0, SKL_SELECT_ALTERNATE_DC_EXIT); - intel_dmc_wl_enable(dev_priv); + intel_dmc_wl_enable(&dev_priv->display); gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6); } @@ -975,7 +975,7 @@ void gen9_disable_dc_states(struct drm_i915_private *dev_priv) if (!HAS_DISPLAY(dev_priv)) return; - intel_dmc_wl_disable(dev_priv); + intel_dmc_wl_disable(&dev_priv->display); intel_cdclk_get_cdclk(dev_priv, &cdclk_config); /* Can't read out voltage_level so can't use intel_cdclk_changed() */ diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index a34ff3383fd3..3697a02b51b6 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -553,7 +553,7 @@ void intel_dmc_disable_program(struct drm_i915_private *i915) disable_all_event_handlers(i915); pipedmc_clock_gating_wa(i915, false); - intel_dmc_wl_disable(i915); + intel_dmc_wl_disable(&i915->display); } void assert_dmc_loaded(struct drm_i915_private *i915) @@ -1083,7 +1083,7 @@ void intel_dmc_suspend(struct drm_i915_private *i915) if (dmc) flush_work(&dmc->work); - intel_dmc_wl_disable(i915); + intel_dmc_wl_disable(&i915->display); /* Drop the reference held in case DMC isn't loaded. */ if (!intel_dmc_has_payload(i915)) diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c b/drivers/gpu/drm/i915/display/intel_dmc_wl.c index 162de0d20554..e79c45e36722 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c @@ -51,9 +51,10 @@ static struct intel_dmc_wl_range lnl_wl_range[] = { { .start = 0x60000, .end = 0x7ffff }, }; -static void __intel_dmc_wl_release(struct drm_i915_private *i915) +static void __intel_dmc_wl_release(struct intel_display *display) { - struct intel_dmc_wl *wl = &i915->display.wl; + struct drm_i915_private *i915 = to_i915(display->drm); + struct intel_dmc_wl *wl = &display->wl; WARN_ON(refcount_read(&wl->refcount)); @@ -106,23 +107,25 @@ static bool intel_dmc_wl_check_range(u32 address) return wl_needed; } -static bool __intel_dmc_wl_supported(struct drm_i915_private *i915) +static bool __intel_dmc_wl_supported(struct intel_display *display) { + struct drm_i915_private *i915 = to_i915(display->drm); + if (DISPLAY_VER(i915) < 20 || !intel_dmc_has_payload(i915) || - !i915->display.params.enable_dmc_wl) + !display->params.enable_dmc_wl) return false; return true; } -void intel_dmc_wl_init(struct drm_i915_private *i915) +void intel_dmc_wl_init(struct intel_display *display) { - struct intel_dmc_wl *wl = &i915->display.wl; + struct drm_i915_private *i915 = to_i915(display->drm); + struct intel_dmc_wl *wl = &display->wl; /* don't call __intel_dmc_wl_supported(), DMC is not loaded yet */ - if (DISPLAY_VER(i915) < 20 || - !i915->display.params.enable_dmc_wl) + if (DISPLAY_VER(i915) < 20 || !display->params.enable_dmc_wl) return; INIT_DELAYED_WORK(&wl->work, intel_dmc_wl_work); @@ -130,12 +133,13 @@ void intel_dmc_wl_init(struct drm_i915_private *i915) refcount_set(&wl->refcount, 0); } -void intel_dmc_wl_enable(struct drm_i915_private *i915) +void intel_dmc_wl_enable(struct intel_display *display) { - struct intel_dmc_wl *wl = &i915->display.wl; + struct drm_i915_private *i915 = to_i915(display->drm); + struct intel_dmc_wl *wl = &display->wl; unsigned long flags; - if (!__intel_dmc_wl_supported(i915)) + if (!__intel_dmc_wl_supported(display)) return; spin_lock_irqsave(&wl->lock, flags); @@ -157,12 +161,13 @@ void intel_dmc_wl_enable(struct drm_i915_private *i915) spin_unlock_irqrestore(&wl->lock, flags); } -void intel_dmc_wl_disable(struct drm_i915_private *i915) +void intel_dmc_wl_disable(struct intel_display *display) { - struct intel_dmc_wl *wl = &i915->display.wl; + struct drm_i915_private *i915 = to_i915(display->drm); + struct intel_dmc_wl *wl = &display->wl; unsigned long flags; - if (!__intel_dmc_wl_supported(i915)) + if (!__intel_dmc_wl_supported(display)) return; flush_delayed_work(&wl->work); @@ -183,12 +188,13 @@ void intel_dmc_wl_disable(struct drm_i915_private *i915) spin_unlock_irqrestore(&wl->lock, flags); } -void intel_dmc_wl_get(struct drm_i915_private *i915, i915_reg_t reg) +void intel_dmc_wl_get(struct intel_display *display, i915_reg_t reg) { - struct intel_dmc_wl *wl = &i915->display.wl; + struct drm_i915_private *i915 = to_i915(display->drm); + struct intel_dmc_wl *wl = &display->wl; unsigned long flags; - if (!__intel_dmc_wl_supported(i915)) + if (!__intel_dmc_wl_supported(display)) return; if (!intel_dmc_wl_check_range(reg.reg)) @@ -231,12 +237,12 @@ void intel_dmc_wl_get(struct drm_i915_private *i915, i915_reg_t reg) spin_unlock_irqrestore(&wl->lock, flags); } -void intel_dmc_wl_put(struct drm_i915_private *i915, i915_reg_t reg) +void intel_dmc_wl_put(struct intel_display *display, i915_reg_t reg) { - struct intel_dmc_wl *wl = &i915->display.wl; + struct intel_dmc_wl *wl = &display->wl; unsigned long flags; - if (!__intel_dmc_wl_supported(i915)) + if (!__intel_dmc_wl_supported(display)) return; if (!intel_dmc_wl_check_range(reg.reg)) @@ -252,7 +258,7 @@ void intel_dmc_wl_put(struct drm_i915_private *i915, i915_reg_t reg) goto out_unlock; if (refcount_dec_and_test(&wl->refcount)) { - __intel_dmc_wl_release(i915); + __intel_dmc_wl_release(display); goto out_unlock; } diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.h b/drivers/gpu/drm/i915/display/intel_dmc_wl.h index 6fb86b05b437..adab51208d0a 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.h +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.h @@ -12,7 +12,7 @@ #include "i915_reg_defs.h" -struct drm_i915_private; +struct intel_display; struct intel_dmc_wl { spinlock_t lock; /* protects enabled, taken and refcount */ @@ -22,10 +22,10 @@ struct intel_dmc_wl { struct delayed_work work; }; -void intel_dmc_wl_init(struct drm_i915_private *i915); -void intel_dmc_wl_enable(struct drm_i915_private *i915); -void intel_dmc_wl_disable(struct drm_i915_private *i915); -void intel_dmc_wl_get(struct drm_i915_private *i915, i915_reg_t reg); -void intel_dmc_wl_put(struct drm_i915_private *i915, i915_reg_t reg); +void intel_dmc_wl_init(struct intel_display *display); +void intel_dmc_wl_enable(struct intel_display *display); +void intel_dmc_wl_disable(struct intel_display *display); +void intel_dmc_wl_get(struct intel_display *display, i915_reg_t reg); +void intel_dmc_wl_put(struct intel_display *display, i915_reg_t reg); #endif /* __INTEL_WAKELOCK_H__ */ From patchwork Wed Apr 17 13:02:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13633309 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 44B40C4345F for ; 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X-CSE-ConnectionGUID: AR/BK3yCR16EI0Ouwg0IzQ== X-CSE-MsgGUID: TnaNbCFxQtqv8DVEtRqUsw== X-IronPort-AV: E=McAfee;i="6600,9927,11046"; a="8976890" X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="8976890" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:03:32 -0700 X-CSE-ConnectionGUID: JcOguKJwTnavX59k0vS2GQ== X-CSE-MsgGUID: WUuw+86xQBOwLgXV9+jthw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,209,1708416000"; d="scan'208";a="27199526" Received: from vpus-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.45.164]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:03:31 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: rodrigo.vivi@intel.com, Luca Coelho , jani.nikula@intel.com Subject: [PATCH v4 8/9] drm/i915/de: allow intel_display and drm_i915_private for de functions Date: Wed, 17 Apr 2024 16:02:46 +0300 Message-Id: <1b0e8e7c732535e18c8498a2e18fe1e4c123e2f5.1713358679.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" It would be too much noise to convert the intel_de_* functions from using struct drm_i915_private to struct intel_display all at once. Add generic wrappers using __to_intel_display() to accept both. v2: Take the intel_dmc_wl_* changes into account Cc: Luca Coelho Reviewed-by: Rodrigo Vivi # v1 Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- This was done using a cocci + shell script combo: #!/bin/bash set -e FILE=drivers/gpu/drm/i915/display/intel_de.h cocci=$(mktemp) cat >$cocci <uncore + __to_uncore(display) | - &ptr->display + display | - ptr + display ) ...> } + #define fn(p, VARARGS_PLACEHOLDER) __fn(__to_intel_display(p), __VA_ARGS__) EOF spatch --sp-file $cocci --in-place --linux-spacing $FILE >/dev/null # Fixup varargs sed -i "s/VARARGS_PLACEHOLDER/.../g" $FILE # Add the __to_uncore() helper snip=$(mktemp) cat >$snip <drm)->uncore; } EOF sed -ie "/\#include \"intel_uncore\.h\"/r $snip" $FILE rm -f $cocci $snip --- drivers/gpu/drm/i915/display/intel_de.h | 157 ++++++++++++++---------- 1 file changed, 93 insertions(+), 64 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h index 15440058ad2a..e881bfeafb47 100644 --- a/drivers/gpu/drm/i915/display/intel_de.h +++ b/drivers/gpu/drm/i915/display/intel_de.h @@ -10,161 +10,185 @@ #include "i915_trace.h" #include "intel_uncore.h" +static inline struct intel_uncore *__to_uncore(struct intel_display *display) +{ + return &to_i915(display->drm)->uncore; +} + static inline u32 -intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) +__intel_de_read(struct intel_display *display, i915_reg_t reg) { u32 val; - intel_dmc_wl_get(&i915->display, reg); + intel_dmc_wl_get(display, reg); - val = intel_uncore_read(&i915->uncore, reg); + val = intel_uncore_read(__to_uncore(display), reg); - intel_dmc_wl_put(&i915->display, reg); + intel_dmc_wl_put(display, reg); return val; } +#define intel_de_read(p,...) __intel_de_read(__to_intel_display(p), __VA_ARGS__) static inline u8 -intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg) +__intel_de_read8(struct intel_display *display, i915_reg_t reg) { u8 val; - intel_dmc_wl_get(&i915->display, reg); + intel_dmc_wl_get(display, reg); - val = intel_uncore_read8(&i915->uncore, reg); + val = intel_uncore_read8(__to_uncore(display), reg); - intel_dmc_wl_put(&i915->display, reg); + intel_dmc_wl_put(display, reg); return val; } +#define intel_de_read8(p,...) __intel_de_read8(__to_intel_display(p), __VA_ARGS__) static inline u64 -intel_de_read64_2x32(struct drm_i915_private *i915, - i915_reg_t lower_reg, i915_reg_t upper_reg) +__intel_de_read64_2x32(struct intel_display *display, + i915_reg_t lower_reg, i915_reg_t upper_reg) { u64 val; - intel_dmc_wl_get(&i915->display, lower_reg); - intel_dmc_wl_get(&i915->display, upper_reg); + intel_dmc_wl_get(display, lower_reg); + intel_dmc_wl_get(display, upper_reg); - val = intel_uncore_read64_2x32(&i915->uncore, lower_reg, upper_reg); + val = intel_uncore_read64_2x32(__to_uncore(display), lower_reg, + upper_reg); - intel_dmc_wl_put(&i915->display, upper_reg); - intel_dmc_wl_put(&i915->display, lower_reg); + intel_dmc_wl_put(display, upper_reg); + intel_dmc_wl_put(display, lower_reg); return val; } +#define intel_de_read64_2x32(p,...) __intel_de_read64_2x32(__to_intel_display(p), __VA_ARGS__) static inline void -intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg) +__intel_de_posting_read(struct intel_display *display, i915_reg_t reg) { - intel_dmc_wl_get(&i915->display, reg); + intel_dmc_wl_get(display, reg); - intel_uncore_posting_read(&i915->uncore, reg); + intel_uncore_posting_read(__to_uncore(display), reg); - intel_dmc_wl_put(&i915->display, reg); + intel_dmc_wl_put(display, reg); } +#define intel_de_posting_read(p,...) __intel_de_posting_read(__to_intel_display(p), __VA_ARGS__) static inline void -intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val) +__intel_de_write(struct intel_display *display, i915_reg_t reg, u32 val) { - intel_dmc_wl_get(&i915->display, reg); + intel_dmc_wl_get(display, reg); - intel_uncore_write(&i915->uncore, reg, val); + intel_uncore_write(__to_uncore(display), reg, val); - intel_dmc_wl_put(&i915->display, reg); + intel_dmc_wl_put(display, reg); } +#define intel_de_write(p,...) __intel_de_write(__to_intel_display(p), __VA_ARGS__) static inline u32 -__intel_de_rmw_nowl(struct drm_i915_private *i915, i915_reg_t reg, - u32 clear, u32 set) +____intel_de_rmw_nowl(struct intel_display *display, i915_reg_t reg, + u32 clear, u32 set) { - return intel_uncore_rmw(&i915->uncore, reg, clear, set); + return intel_uncore_rmw(__to_uncore(display), reg, clear, set); } +#define __intel_de_rmw_nowl(p,...) ____intel_de_rmw_nowl(__to_intel_display(p), __VA_ARGS__) static inline u32 -intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set) +__intel_de_rmw(struct intel_display *display, i915_reg_t reg, u32 clear, + u32 set) { u32 val; - intel_dmc_wl_get(&i915->display, reg); + intel_dmc_wl_get(display, reg); - val = __intel_de_rmw_nowl(i915, reg, clear, set); + val = __intel_de_rmw_nowl(display, reg, clear, set); - intel_dmc_wl_put(&i915->display, reg); + intel_dmc_wl_put(display, reg); return val; } +#define intel_de_rmw(p,...) __intel_de_rmw(__to_intel_display(p), __VA_ARGS__) static inline int -__intel_de_wait_for_register_nowl(struct drm_i915_private *i915, i915_reg_t reg, - u32 mask, u32 value, unsigned int timeout) +____intel_de_wait_for_register_nowl(struct intel_display *display, + i915_reg_t reg, + u32 mask, u32 value, unsigned int timeout) { - return intel_wait_for_register(&i915->uncore, reg, mask, + return intel_wait_for_register(__to_uncore(display), reg, mask, value, timeout); } +#define __intel_de_wait_for_register_nowl(p,...) ____intel_de_wait_for_register_nowl(__to_intel_display(p), __VA_ARGS__) static inline int -intel_de_wait(struct drm_i915_private *i915, i915_reg_t reg, - u32 mask, u32 value, unsigned int timeout) +__intel_de_wait(struct intel_display *display, i915_reg_t reg, + u32 mask, u32 value, unsigned int timeout) { int ret; - intel_dmc_wl_get(&i915->display, reg); + intel_dmc_wl_get(display, reg); - ret = __intel_de_wait_for_register_nowl(i915, reg, mask, value, timeout); + ret = __intel_de_wait_for_register_nowl(display, reg, mask, value, + timeout); - intel_dmc_wl_put(&i915->display, reg); + intel_dmc_wl_put(display, reg); return ret; } +#define intel_de_wait(p,...) __intel_de_wait(__to_intel_display(p), __VA_ARGS__) static inline int -intel_de_wait_fw(struct drm_i915_private *i915, i915_reg_t reg, - u32 mask, u32 value, unsigned int timeout) +__intel_de_wait_fw(struct intel_display *display, i915_reg_t reg, + u32 mask, u32 value, unsigned int timeout) { int ret; - intel_dmc_wl_get(&i915->display, reg); + intel_dmc_wl_get(display, reg); - ret = intel_wait_for_register_fw(&i915->uncore, reg, mask, value, timeout); + ret = intel_wait_for_register_fw(__to_uncore(display), reg, mask, + value, timeout); - intel_dmc_wl_put(&i915->display, reg); + intel_dmc_wl_put(display, reg); return ret; } +#define intel_de_wait_fw(p,...) __intel_de_wait_fw(__to_intel_display(p), __VA_ARGS__) static inline int -intel_de_wait_custom(struct drm_i915_private *i915, i915_reg_t reg, - u32 mask, u32 value, - unsigned int fast_timeout_us, - unsigned int slow_timeout_ms, u32 *out_value) +__intel_de_wait_custom(struct intel_display *display, i915_reg_t reg, + u32 mask, u32 value, + unsigned int fast_timeout_us, + unsigned int slow_timeout_ms, u32 *out_value) { int ret; - intel_dmc_wl_get(&i915->display, reg); + intel_dmc_wl_get(display, reg); - ret = __intel_wait_for_register(&i915->uncore, reg, mask, value, + ret = __intel_wait_for_register(__to_uncore(display), reg, mask, + value, fast_timeout_us, slow_timeout_ms, out_value); - intel_dmc_wl_put(&i915->display, reg); + intel_dmc_wl_put(display, reg); return ret; } +#define intel_de_wait_custom(p,...) __intel_de_wait_custom(__to_intel_display(p), __VA_ARGS__) static inline int -intel_de_wait_for_set(struct drm_i915_private *i915, i915_reg_t reg, - u32 mask, unsigned int timeout) +__intel_de_wait_for_set(struct intel_display *display, i915_reg_t reg, + u32 mask, unsigned int timeout) { - return intel_de_wait(i915, reg, mask, mask, timeout); + return intel_de_wait(display, reg, mask, mask, timeout); } +#define intel_de_wait_for_set(p,...) __intel_de_wait_for_set(__to_intel_display(p), __VA_ARGS__) static inline int -intel_de_wait_for_clear(struct drm_i915_private *i915, i915_reg_t reg, - u32 mask, unsigned int timeout) +__intel_de_wait_for_clear(struct intel_display *display, i915_reg_t reg, + u32 mask, unsigned int timeout) { - return intel_de_wait(i915, reg, mask, 0, timeout); + return intel_de_wait(display, reg, mask, 0, timeout); } +#define intel_de_wait_for_clear(p,...) __intel_de_wait_for_clear(__to_intel_display(p), __VA_ARGS__) /* * Unlocked mmio-accessors, think carefully before using these. @@ -175,33 +199,38 @@ intel_de_wait_for_clear(struct drm_i915_private *i915, i915_reg_t reg, * a more localised lock guarding all access to that bank of registers. */ static inline u32 -intel_de_read_fw(struct drm_i915_private *i915, i915_reg_t reg) +__intel_de_read_fw(struct intel_display *display, i915_reg_t reg) { u32 val; - val = intel_uncore_read_fw(&i915->uncore, reg); + val = intel_uncore_read_fw(__to_uncore(display), reg); trace_i915_reg_rw(false, reg, val, sizeof(val), true); return val; } +#define intel_de_read_fw(p,...) __intel_de_read_fw(__to_intel_display(p), __VA_ARGS__) static inline void -intel_de_write_fw(struct drm_i915_private *i915, i915_reg_t reg, u32 val) +__intel_de_write_fw(struct intel_display *display, i915_reg_t reg, u32 val) { trace_i915_reg_rw(true, reg, val, sizeof(val), true); - intel_uncore_write_fw(&i915->uncore, reg, val); + intel_uncore_write_fw(__to_uncore(display), reg, val); } +#define intel_de_write_fw(p,...) __intel_de_write_fw(__to_intel_display(p), __VA_ARGS__) static inline u32 -intel_de_read_notrace(struct drm_i915_private *i915, i915_reg_t reg) +__intel_de_read_notrace(struct intel_display *display, i915_reg_t reg) { - return intel_uncore_read_notrace(&i915->uncore, reg); + return intel_uncore_read_notrace(__to_uncore(display), reg); } +#define intel_de_read_notrace(p,...) __intel_de_read_notrace(__to_intel_display(p), __VA_ARGS__) static inline void -intel_de_write_notrace(struct drm_i915_private *i915, i915_reg_t reg, u32 val) +__intel_de_write_notrace(struct intel_display *display, i915_reg_t reg, + u32 val) { - intel_uncore_write_notrace(&i915->uncore, reg, val); + intel_uncore_write_notrace(__to_uncore(display), reg, val); } +#define intel_de_write_notrace(p,...) __intel_de_write_notrace(__to_intel_display(p), __VA_ARGS__) #endif /* __INTEL_DE_H__ */ From patchwork Wed Apr 17 13:02:47 2024 Content-Type: text/plain; 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d="scan'208";a="27199544" Received: from vpus-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.45.164]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2024 06:03:35 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: rodrigo.vivi@intel.com, Luca Coelho , jani.nikula@intel.com Subject: [PATCH v4 9/9] drm/i915/dmc: use struct intel_display more Date: Wed, 17 Apr 2024 16:02:47 +0300 Message-Id: <06bc9fd9d0472e899bd9d50f3b10a6066c1a0238.1713358679.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Now that the intel_de_ functions and DISPLAY_VER() accept struct intel_display *, use it more. Cc: Luca Coelho Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/intel_dmc_wl.c | 24 +++++++++------------ 1 file changed, 10 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c b/drivers/gpu/drm/i915/display/intel_dmc_wl.c index e79c45e36722..d9864b9cc429 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c @@ -66,8 +66,8 @@ static void intel_dmc_wl_work(struct work_struct *work) { struct intel_dmc_wl *wl = container_of(work, struct intel_dmc_wl, work.work); - struct drm_i915_private *i915 = - container_of(wl, struct drm_i915_private, display.wl); + struct intel_display *display = + container_of(wl, struct intel_display, wl); unsigned long flags; spin_lock_irqsave(&wl->lock, flags); @@ -76,9 +76,9 @@ static void intel_dmc_wl_work(struct work_struct *work) if (!refcount_read(&wl->refcount)) goto out_unlock; - __intel_de_rmw_nowl(i915, DMC_WAKELOCK1_CTL, DMC_WAKELOCK_CTL_REQ, 0); + __intel_de_rmw_nowl(display, DMC_WAKELOCK1_CTL, DMC_WAKELOCK_CTL_REQ, 0); - if (__intel_de_wait_for_register_nowl(i915, DMC_WAKELOCK1_CTL, + if (__intel_de_wait_for_register_nowl(display, DMC_WAKELOCK1_CTL, DMC_WAKELOCK_CTL_ACK, 0, DMC_WAKELOCK_CTL_TIMEOUT)) { WARN_RATELIMIT(1, "DMC wakelock release timed out"); @@ -111,7 +111,7 @@ static bool __intel_dmc_wl_supported(struct intel_display *display) { struct drm_i915_private *i915 = to_i915(display->drm); - if (DISPLAY_VER(i915) < 20 || + if (DISPLAY_VER(display) < 20 || !intel_dmc_has_payload(i915) || !display->params.enable_dmc_wl) return false; @@ -121,11 +121,10 @@ static bool __intel_dmc_wl_supported(struct intel_display *display) void intel_dmc_wl_init(struct intel_display *display) { - struct drm_i915_private *i915 = to_i915(display->drm); struct intel_dmc_wl *wl = &display->wl; /* don't call __intel_dmc_wl_supported(), DMC is not loaded yet */ - if (DISPLAY_VER(i915) < 20 || !display->params.enable_dmc_wl) + if (DISPLAY_VER(display) < 20 || !display->params.enable_dmc_wl) return; INIT_DELAYED_WORK(&wl->work, intel_dmc_wl_work); @@ -135,7 +134,6 @@ void intel_dmc_wl_init(struct intel_display *display) void intel_dmc_wl_enable(struct intel_display *display) { - struct drm_i915_private *i915 = to_i915(display->drm); struct intel_dmc_wl *wl = &display->wl; unsigned long flags; @@ -152,7 +150,7 @@ void intel_dmc_wl_enable(struct intel_display *display) * wakelock, because we're just enabling it, so call the * non-locking version directly here. */ - __intel_de_rmw_nowl(i915, DMC_WAKELOCK_CFG, 0, DMC_WAKELOCK_CFG_ENABLE); + __intel_de_rmw_nowl(display, DMC_WAKELOCK_CFG, 0, DMC_WAKELOCK_CFG_ENABLE); wl->enabled = true; wl->taken = false; @@ -163,7 +161,6 @@ void intel_dmc_wl_enable(struct intel_display *display) void intel_dmc_wl_disable(struct intel_display *display) { - struct drm_i915_private *i915 = to_i915(display->drm); struct intel_dmc_wl *wl = &display->wl; unsigned long flags; @@ -178,7 +175,7 @@ void intel_dmc_wl_disable(struct intel_display *display) goto out_unlock; /* Disable wakelock in DMC */ - __intel_de_rmw_nowl(i915, DMC_WAKELOCK_CFG, DMC_WAKELOCK_CFG_ENABLE, 0); + __intel_de_rmw_nowl(display, DMC_WAKELOCK_CFG, DMC_WAKELOCK_CFG_ENABLE, 0); refcount_set(&wl->refcount, 0); wl->enabled = false; @@ -190,7 +187,6 @@ void intel_dmc_wl_disable(struct intel_display *display) void intel_dmc_wl_get(struct intel_display *display, i915_reg_t reg) { - struct drm_i915_private *i915 = to_i915(display->drm); struct intel_dmc_wl *wl = &display->wl; unsigned long flags; @@ -219,10 +215,10 @@ void intel_dmc_wl_get(struct intel_display *display, i915_reg_t reg) * run yet. */ if (!wl->taken) { - __intel_de_rmw_nowl(i915, DMC_WAKELOCK1_CTL, 0, + __intel_de_rmw_nowl(display, DMC_WAKELOCK1_CTL, 0, DMC_WAKELOCK_CTL_REQ); - if (__intel_de_wait_for_register_nowl(i915, DMC_WAKELOCK1_CTL, + if (__intel_de_wait_for_register_nowl(display, DMC_WAKELOCK1_CTL, DMC_WAKELOCK_CTL_ACK, DMC_WAKELOCK_CTL_ACK, DMC_WAKELOCK_CTL_TIMEOUT)) {