From patchwork Tue Apr 23 23:56:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas De Marchi X-Patchwork-Id: 13640902 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 23482C10F15 for ; Tue, 23 Apr 2024 23:56:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 682D5113782; Tue, 23 Apr 2024 23:56:32 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="igFRaaVm"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id F0E3C113779; Tue, 23 Apr 2024 23:56:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713916586; x=1745452586; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7RUNRWAw/Jy7CMiXad5RP36prd47GeoL5Kr9KYHcVyc=; b=igFRaaVm6TbQM1aYcqVmP2Dtd9/gjvJF0L6r6EAR/Ck8CED7+dtgYcNv KP3SMMZ63/WKyEi0tukmYSwsl+ZFso0fBAwWbUnlEpZrCDggHd6Z0iPos CX9IaGG+6fhBNE/Kw2hNFQuIkYxeATLUXRWCAuEA+j6qD3Cs8zC4WlS5b SAjxjILtniw7Z6LzTm2b0jV0TOBV9fKegUed5DI3gzWeE2XYkRqM4q8zq Kl7TPD+7ubFzJxKMzX5H5UHSPKxgCCmnsuuPwJvp+XTvZcDBEdQLaWst/ KYF71tg3zQYBXQEs0XHzDMNfQAmEXiw8aw9l3072d5mjCa2ls7EnjSbV1 g==; X-CSE-ConnectionGUID: Q9EU1oUHSSyo+WgixpJyuA== X-CSE-MsgGUID: LpiJBwDDSmm+IexUV2HKtQ== X-IronPort-AV: E=McAfee;i="6600,9927,11053"; a="27040647" X-IronPort-AV: E=Sophos;i="6.07,222,1708416000"; d="scan'208";a="27040647" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2024 16:56:25 -0700 X-CSE-ConnectionGUID: 5Z0GZCwIRheQa5YEUPes7Q== X-CSE-MsgGUID: pOM/PbVwTzq+sTwk/MM75Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,222,1708416000"; d="scan'208";a="29170909" Received: from lucas-s2600cw.jf.intel.com ([10.165.21.196]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2024 16:56:24 -0700 From: Lucas De Marchi To: Cc: dri-devel@lists.freedesktop.org, Umesh Nerlige Ramappa , Tvrtko Ursulin , Lucas De Marchi Subject: [PATCH v2 1/6] drm/xe/lrc: Add helper to capture context timestamp Date: Tue, 23 Apr 2024 16:56:46 -0700 Message-ID: <20240423235652.1959945-2-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240423235652.1959945-1-lucas.demarchi@intel.com> References: <20240423235652.1959945-1-lucas.demarchi@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Umesh Nerlige Ramappa Add a helper to capture CTX_TIMESTAMP from the context image so it can be used to calculate the runtime. v2: Add kernel-doc to clarify expectation from caller Signed-off-by: Umesh Nerlige Ramappa Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/xe/regs/xe_lrc_layout.h | 1 + drivers/gpu/drm/xe/xe_lrc.c | 11 +++++++++++ drivers/gpu/drm/xe/xe_lrc.h | 14 ++++++++++++++ drivers/gpu/drm/xe/xe_lrc_types.h | 3 +++ 4 files changed, 29 insertions(+) diff --git a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h index 1825d8f79db6..8780e6c6b649 100644 --- a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h +++ b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h @@ -11,6 +11,7 @@ #define CTX_RING_TAIL (0x06 + 1) #define CTX_RING_START (0x08 + 1) #define CTX_RING_CTL (0x0a + 1) +#define CTX_TIMESTAMP (0x22 + 1) #define CTX_PDP0_UDW (0x30 + 1) #define CTX_PDP0_LDW (0x32 + 1) diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c index 615bbc372ac6..4bfd8f9c3b46 100644 --- a/drivers/gpu/drm/xe/xe_lrc.c +++ b/drivers/gpu/drm/xe/xe_lrc.c @@ -751,6 +751,7 @@ int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, lrc->tile = gt_to_tile(hwe->gt); lrc->ring.size = ring_size; lrc->ring.tail = 0; + lrc->ctx_timestamp = 0; xe_hw_fence_ctx_init(&lrc->fence_ctx, hwe->gt, hwe->fence_irq, hwe->name); @@ -786,6 +787,7 @@ int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, xe_drm_client_add_bo(vm->xef->client, lrc->bo); } + xe_lrc_write_ctx_reg(lrc, CTX_TIMESTAMP, 0); xe_lrc_write_ctx_reg(lrc, CTX_RING_START, __xe_lrc_ring_ggtt_addr(lrc)); xe_lrc_write_ctx_reg(lrc, CTX_RING_HEAD, 0); xe_lrc_write_ctx_reg(lrc, CTX_RING_TAIL, lrc->ring.tail); @@ -1444,3 +1446,12 @@ void xe_lrc_snapshot_free(struct xe_lrc_snapshot *snapshot) xe_bo_put(snapshot->lrc_bo); kfree(snapshot); } + +u32 xe_lrc_update_timestamp(struct xe_lrc *lrc, u32 *old_ts) +{ + *old_ts = lrc->ctx_timestamp; + + lrc->ctx_timestamp = xe_lrc_read_ctx_reg(lrc, CTX_TIMESTAMP); + + return lrc->ctx_timestamp; +} diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h index d32fa31faa2c..dcbc6edd80da 100644 --- a/drivers/gpu/drm/xe/xe_lrc.h +++ b/drivers/gpu/drm/xe/xe_lrc.h @@ -60,4 +60,18 @@ void xe_lrc_snapshot_capture_delayed(struct xe_lrc_snapshot *snapshot); void xe_lrc_snapshot_print(struct xe_lrc_snapshot *snapshot, struct drm_printer *p); void xe_lrc_snapshot_free(struct xe_lrc_snapshot *snapshot); +/** + * xe_lrc_update_timestamp - readout LRC timestamp and update cached value + * @lrc: logical ring context for this exec queue + * @old_ts: pointer where to save the previous timestamp + * + * Read the current timestamp for this LRC and update the cached value. The + * previous cached value is also returned in @old_ts so the caller can calculate + * the delta between 2 updates. Note that this is not intended to be called from + * any place, but just by the paths updating the drm client utilization. + * + * Returns the current LRC timestamp + */ +u32 xe_lrc_update_timestamp(struct xe_lrc *lrc, u32 *old_ts); + #endif diff --git a/drivers/gpu/drm/xe/xe_lrc_types.h b/drivers/gpu/drm/xe/xe_lrc_types.h index b716df0dfb4e..5765d771b901 100644 --- a/drivers/gpu/drm/xe/xe_lrc_types.h +++ b/drivers/gpu/drm/xe/xe_lrc_types.h @@ -41,6 +41,9 @@ struct xe_lrc { /** @fence_ctx: context for hw fence */ struct xe_hw_fence_ctx fence_ctx; + + /** @ctx_timestamp: readout value of CTX_TIMESTAMP on last update */ + u32 ctx_timestamp; }; struct xe_lrc_snapshot; From patchwork Tue Apr 23 23:56:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas De Marchi X-Patchwork-Id: 13640899 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 80A69C10F15 for ; Tue, 23 Apr 2024 23:56:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E5969113780; Tue, 23 Apr 2024 23:56:29 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="CLmtqWjF"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2E9EB113779; Tue, 23 Apr 2024 23:56:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713916585; x=1745452585; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=FYvrK/0KYXO4/EtBbu/5hac7Bxz3Jcuim+RQWymddYw=; b=CLmtqWjFgFbEwB/8UdqvlHv11ri+jD6JB1W5R59o1ZgZf7MJgBcjwVLn vO7PZVK2gAZqoGp/6eGPQd1IyW9KyUF7kxRgjVLw/2wr8eMB/mMuwZFYw fSyTqZK67PTAvGnw0o0kSl7QHTo9kulggLM4H7gEmJnMaSyQ3jiIGxoc/ U5gRSvmP3KqPt/KHtBoe7H5Le/eTBx+4fJPivgHmwIU2etSqZVe3rye+y yo27dpqXTZkWWMpUY3XyBrYvaf9eIQI693gFzG2z/7qe3kKNGmcTKd9dg QuMEz17Et11PDEdYkTZC4XefFyrmanKb5CpM2/qSFgjwGAQrn3cOS+3ed w==; X-CSE-ConnectionGUID: mmL0iq+VTm62gTzSnfbBNg== X-CSE-MsgGUID: fvCuJMMpT0+5OwohgSa39g== X-IronPort-AV: E=McAfee;i="6600,9927,11053"; a="27040637" X-IronPort-AV: E=Sophos;i="6.07,222,1708416000"; d="scan'208";a="27040637" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2024 16:56:24 -0700 X-CSE-ConnectionGUID: 2e4GKCXDSMu9sOSZSiPPkw== X-CSE-MsgGUID: 97ugmLQUTjCxkozCiC5W6Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,222,1708416000"; d="scan'208";a="29170913" Received: from lucas-s2600cw.jf.intel.com ([10.165.21.196]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2024 16:56:24 -0700 From: Lucas De Marchi To: Cc: dri-devel@lists.freedesktop.org, Umesh Nerlige Ramappa , Tvrtko Ursulin , Lucas De Marchi Subject: [PATCH v2 2/6] drm/xe: Add helper to capture engine timestamp Date: Tue, 23 Apr 2024 16:56:47 -0700 Message-ID: <20240423235652.1959945-3-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240423235652.1959945-1-lucas.demarchi@intel.com> References: <20240423235652.1959945-1-lucas.demarchi@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Just like CTX_TIMESTAMP is used to calculate runtime, add a helper to get the timestamp for the engine so it can be used to calculate the "engine time" with the same unit as the runtime is recorded. Reviewed-by: Umesh Nerlige Ramappa Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/xe/xe_hw_engine.c | 5 +++++ drivers/gpu/drm/xe/xe_hw_engine.h | 2 ++ 2 files changed, 7 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index 455f375c1cbd..f357de532685 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -955,3 +955,8 @@ bool xe_hw_engine_is_reserved(struct xe_hw_engine *hwe) return xe->info.has_usm && hwe->class == XE_ENGINE_CLASS_COPY && hwe->instance == gt->usm.reserved_bcs_instance; } + +u64 xe_hw_engine_read_timestamp(struct xe_hw_engine *hwe) +{ + return xe_mmio_read64_2x32(hwe->gt, RING_TIMESTAMP(hwe->mmio_base)); +} diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h index 71968ee2f600..a10d5e528958 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.h +++ b/drivers/gpu/drm/xe/xe_hw_engine.h @@ -67,4 +67,6 @@ static inline bool xe_hw_engine_is_valid(struct xe_hw_engine *hwe) return hwe->name; } +u64 xe_hw_engine_read_timestamp(struct xe_hw_engine *hwe); + #endif From patchwork Tue Apr 23 23:56:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas De Marchi X-Patchwork-Id: 13640900 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3C2D6C04FFE for ; Tue, 23 Apr 2024 23:56:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EF9D8113781; Tue, 23 Apr 2024 23:56:29 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="O6qZVhBb"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 111FC11377A; Tue, 23 Apr 2024 23:56:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713916586; x=1745452586; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=FkOi2zVfaSw9XbSlrMCfXPWMasGyyPIA+qtei/cco54=; b=O6qZVhBbPQAoRZkHHAi14hH8+cYUFTKA8OT0Eb4NtpBt4WnuI5Irj9Iz qw96x7HRcQ1m4nYLfmA1tG4RJ0vyRKGyRM7ppv0quQbnWSZmcJhDOaqBW N0yioIb4aLFvIuoGHQt+oB/m2hKlOK6bJvz5oQcigh8/w+qPiuiINlWZd Hqlg0UBZERdJJk3EXrm0RJcoCE3qqDDybdcbXXiY7uZhuTG6jl8II2e4A uXWg7IMKpQVdRAY8Rg+HtOirAEFPhkEsHWKtu65RezdnC0ko3Zig605Qf jHwD7KGIq03A3YOCfHrfJzMR+3HWZKeJOc1ZfpZ8eLxI8IP/T35eigpJK A==; X-CSE-ConnectionGUID: L8J4WJ7oSnSeLhm2PivDKw== X-CSE-MsgGUID: AfRdTSV0RKmcKOQfBLZevA== X-IronPort-AV: E=McAfee;i="6600,9927,11053"; a="27040648" X-IronPort-AV: E=Sophos;i="6.07,222,1708416000"; d="scan'208";a="27040648" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2024 16:56:25 -0700 X-CSE-ConnectionGUID: WnFq/9/RTpS+Brd22YKs4w== X-CSE-MsgGUID: H8Rd3Cv9TFiVvbK2jMU5eg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,222,1708416000"; d="scan'208";a="29170915" Received: from lucas-s2600cw.jf.intel.com ([10.165.21.196]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2024 16:56:24 -0700 From: Lucas De Marchi To: Cc: dri-devel@lists.freedesktop.org, Umesh Nerlige Ramappa , Tvrtko Ursulin , Lucas De Marchi Subject: [PATCH v2 3/6] drm/xe: Add helper to accumulate exec queue runtime Date: Tue, 23 Apr 2024 16:56:48 -0700 Message-ID: <20240423235652.1959945-4-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240423235652.1959945-1-lucas.demarchi@intel.com> References: <20240423235652.1959945-1-lucas.demarchi@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Umesh Nerlige Ramappa Add a helper to accumulate per-client runtime of all its exec queues. Currently that is done in 2 places: 1. when the exec_queue is destroyed 2. when the sched job is completed Signed-off-by: Umesh Nerlige Ramappa Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/xe/xe_device_types.h | 9 +++++++ drivers/gpu/drm/xe/xe_exec_queue.c | 37 ++++++++++++++++++++++++++++ drivers/gpu/drm/xe/xe_exec_queue.h | 1 + drivers/gpu/drm/xe/xe_sched_job.c | 2 ++ 4 files changed, 49 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index 2e62450d86e1..33d3bf93a2f1 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -547,6 +547,15 @@ struct xe_file { struct mutex lock; } exec_queue; + /** + * @runtime: hw engine class runtime in ticks for this drm client + * + * Only stats from xe_exec_queue->lrc[0] are accumulated. For multi-lrc + * case, since all jobs run in parallel on the engines, only the stats + * from lrc[0] are sufficient. + */ + u64 runtime[XE_ENGINE_CLASS_MAX]; + /** @client: drm client */ struct xe_drm_client *client; }; diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c index 395de93579fa..b7b6256cb96a 100644 --- a/drivers/gpu/drm/xe/xe_exec_queue.c +++ b/drivers/gpu/drm/xe/xe_exec_queue.c @@ -214,6 +214,8 @@ void xe_exec_queue_fini(struct xe_exec_queue *q) { int i; + xe_exec_queue_update_runtime(q); + for (i = 0; i < q->width; ++i) xe_lrc_finish(q->lrc + i); if (!(q->flags & EXEC_QUEUE_FLAG_PERMANENT) && (q->flags & EXEC_QUEUE_FLAG_VM || !q->vm)) @@ -769,6 +771,41 @@ bool xe_exec_queue_is_idle(struct xe_exec_queue *q) q->lrc[0].fence_ctx.next_seqno - 1; } +/** + * xe_exec_queue_update_runtime() - Update runtime for this exec queue from hw + * @q: The exec queue + * + * Update the timestamp saved by HW for this exec queue and save runtime + * calculated by using the delta from last update. On multi-lrc case, only the + * first is considered. + */ +void xe_exec_queue_update_runtime(struct xe_exec_queue *q) +{ + struct xe_file *xef; + struct xe_lrc *lrc; + u32 old_ts, new_ts; + + /* + * Jobs that are run during driver load may use an exec_queue, but are + * not associated with a user xe file, so avoid accumulating busyness + * for kernel specific work. + */ + if (!q->vm || !q->vm->xef) + return; + + xef = q->vm->xef; + lrc = &q->lrc[0]; + + new_ts = xe_lrc_update_timestamp(lrc, &old_ts); + + /* + * Special case the very first timestamp: we don't want the + * initial delta to be a huge value + */ + if (old_ts) + xef->runtime[q->class] += new_ts - old_ts; +} + void xe_exec_queue_kill(struct xe_exec_queue *q) { struct xe_exec_queue *eq = q, *next; diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h index 02ce8d204622..45b72daa2db3 100644 --- a/drivers/gpu/drm/xe/xe_exec_queue.h +++ b/drivers/gpu/drm/xe/xe_exec_queue.h @@ -66,5 +66,6 @@ struct dma_fence *xe_exec_queue_last_fence_get(struct xe_exec_queue *e, struct xe_vm *vm); void xe_exec_queue_last_fence_set(struct xe_exec_queue *e, struct xe_vm *vm, struct dma_fence *fence); +void xe_exec_queue_update_runtime(struct xe_exec_queue *q); #endif diff --git a/drivers/gpu/drm/xe/xe_sched_job.c b/drivers/gpu/drm/xe/xe_sched_job.c index cd8a2fba5438..6a081a4fa190 100644 --- a/drivers/gpu/drm/xe/xe_sched_job.c +++ b/drivers/gpu/drm/xe/xe_sched_job.c @@ -242,6 +242,8 @@ bool xe_sched_job_completed(struct xe_sched_job *job) { struct xe_lrc *lrc = job->q->lrc; + xe_exec_queue_update_runtime(job->q); + /* * Can safely check just LRC[0] seqno as that is last seqno written when * parallel handshake is done. From patchwork Tue Apr 23 23:56:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas De Marchi X-Patchwork-Id: 13640901 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B62F4C18E72 for ; Tue, 23 Apr 2024 23:56:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3297B113783; Tue, 23 Apr 2024 23:56:30 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="OY4pyapX"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7097B113778; Tue, 23 Apr 2024 23:56:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713916585; x=1745452585; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5HXHKqxQ4p0nnt+4a0+f2LTkpWqwTFswsf+sD18myqo=; b=OY4pyapXIlH7YcSj2nZ9W7me+uBPr6caoROKryeZahBtaFBi0m8Jfga5 NP/MCk9NZvY/kBEnCfkTNSyKJoKQQvxlgB9YD37O84lpBGj35vOZZLnB/ rnZ0hEdZyUOb+RrnIZ/cdC56gis7N3WcOpGZDHMu+3F4rPPt4IjZNmgpS BskhfAg06HnzaC5BVz73RpdxfhBJAGnv1HcoUEyL+amy3zQV6/8S9Bgid P+3WDVFFZZJb/diTVyPnwquOjZuLzfXxNimIHuc1C99RIJPRrOJfijIEs 2SaiIccQhubhHgwRfdw3EGPLR4l7jI2srQ6o/YFioijrMwmZ4E6ogNkYo g==; X-CSE-ConnectionGUID: WJpSnWsoSj2p73JNUx5Lgg== X-CSE-MsgGUID: OOYoKYx1QpKAH2OdLifEtA== X-IronPort-AV: E=McAfee;i="6600,9927,11053"; a="27040640" X-IronPort-AV: E=Sophos;i="6.07,222,1708416000"; d="scan'208";a="27040640" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2024 16:56:24 -0700 X-CSE-ConnectionGUID: ThkI/cBIQVehNSo7qA4F1w== X-CSE-MsgGUID: p4iKcYK8TGinXm070OwE4Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,222,1708416000"; d="scan'208";a="29170918" Received: from lucas-s2600cw.jf.intel.com ([10.165.21.196]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2024 16:56:24 -0700 From: Lucas De Marchi To: Cc: dri-devel@lists.freedesktop.org, Umesh Nerlige Ramappa , Tvrtko Ursulin , Lucas De Marchi , Nirmoy Das , Oak Zeng Subject: [PATCH v2 4/6] drm/xe: Promote xe_hw_engine_class_to_str() Date: Tue, 23 Apr 2024 16:56:49 -0700 Message-ID: <20240423235652.1959945-5-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240423235652.1959945-1-lucas.demarchi@intel.com> References: <20240423235652.1959945-1-lucas.demarchi@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Move it out of the sysfs compilation unit so it can be re-used in other places. Reviewed-by: Nirmoy Das Reviewed-by: Oak Zeng Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/xe/xe_hw_engine.c | 18 ++++++++++++++++++ drivers/gpu/drm/xe/xe_hw_engine.h | 1 + drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.c | 18 ------------------ 3 files changed, 19 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index f357de532685..e1b167149166 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -960,3 +960,21 @@ u64 xe_hw_engine_read_timestamp(struct xe_hw_engine *hwe) { return xe_mmio_read64_2x32(hwe->gt, RING_TIMESTAMP(hwe->mmio_base)); } + +const char *xe_hw_engine_class_to_str(enum xe_engine_class class) +{ + switch (class) { + case XE_ENGINE_CLASS_RENDER: + return "rcs"; + case XE_ENGINE_CLASS_VIDEO_DECODE: + return "vcs"; + case XE_ENGINE_CLASS_VIDEO_ENHANCE: + return "vecs"; + case XE_ENGINE_CLASS_COPY: + return "bcs"; + case XE_ENGINE_CLASS_COMPUTE: + return "ccs"; + default: + return NULL; + } +} diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h index a10d5e528958..d0ab2652667f 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.h +++ b/drivers/gpu/drm/xe/xe_hw_engine.h @@ -68,5 +68,6 @@ static inline bool xe_hw_engine_is_valid(struct xe_hw_engine *hwe) } u64 xe_hw_engine_read_timestamp(struct xe_hw_engine *hwe); +const char *xe_hw_engine_class_to_str(enum xe_engine_class class); #endif diff --git a/drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.c b/drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.c index 844ec68cbbb8..efce6c7dd2a2 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.c +++ b/drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.c @@ -618,24 +618,6 @@ static void hw_engine_class_sysfs_fini(struct drm_device *drm, void *arg) kobject_put(kobj); } -static const char *xe_hw_engine_class_to_str(enum xe_engine_class class) -{ - switch (class) { - case XE_ENGINE_CLASS_RENDER: - return "rcs"; - case XE_ENGINE_CLASS_VIDEO_DECODE: - return "vcs"; - case XE_ENGINE_CLASS_VIDEO_ENHANCE: - return "vecs"; - case XE_ENGINE_CLASS_COPY: - return "bcs"; - case XE_ENGINE_CLASS_COMPUTE: - return "ccs"; - default: - return NULL; - } -} - /** * xe_hw_engine_class_sysfs_init - Init HW engine classes on GT. * @gt: Xe GT. From patchwork Tue Apr 23 23:56:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas De Marchi X-Patchwork-Id: 13640898 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 832ABC4345F for ; Tue, 23 Apr 2024 23:56:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D49E511377F; Tue, 23 Apr 2024 23:56:29 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="oFQBE9sS"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 941DB113779; Tue, 23 Apr 2024 23:56:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713916586; x=1745452586; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Q86t33ImIQCsNEC/1FHcHJnJnsNLIjpCKpcEjENb8zA=; b=oFQBE9sSnF4rCoXP3eqO5qTZ0l1S4KURy/7OKD5mSlqLrHrYwCB9Mo4t eicekfXvXGw0AfjMSMOpZenK4A0hHXRGM3XQMGwzgYhKeNtJZAJjQPsPq NSE9U778HHzYycKPXHwaV1npjvNxrzWwmxMn92Uqu6YYuqbSy9wUHUKgH d0rYzDjJhKqyqtz9izmOBqEQX0pCLLFOcr/5CjYyZHcwpPzNpXkEgugBn LhhwgKUzPwqoy1HPjcfxePtA7dGA8yCLSFHf2DrJ90j2WzWQUNPpt2iuM FQBFBH5zjAtIyoHswUePCmfzaOAmZV7nNRmMOCLhvjpbs2ha9L5/ZTdSx g==; X-CSE-ConnectionGUID: AvT65iOHTnq7MhOlO4i3Ig== X-CSE-MsgGUID: 4cnNJ1gkSCGxu2F3UhOKqA== X-IronPort-AV: E=McAfee;i="6600,9927,11053"; a="27040643" X-IronPort-AV: E=Sophos;i="6.07,222,1708416000"; d="scan'208";a="27040643" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2024 16:56:25 -0700 X-CSE-ConnectionGUID: itmtVQ5DTg6baMmquHzYiw== X-CSE-MsgGUID: FJ0lGlGLQnq357aK955m4Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,222,1708416000"; d="scan'208";a="29170921" Received: from lucas-s2600cw.jf.intel.com ([10.165.21.196]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2024 16:56:24 -0700 From: Lucas De Marchi To: Cc: dri-devel@lists.freedesktop.org, Umesh Nerlige Ramappa , Tvrtko Ursulin , Lucas De Marchi , Nirmoy Das Subject: [PATCH v2 5/6] drm/xe: Add XE_ENGINE_CLASS_OTHER to str conversion Date: Tue, 23 Apr 2024 16:56:50 -0700 Message-ID: <20240423235652.1959945-6-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240423235652.1959945-1-lucas.demarchi@intel.com> References: <20240423235652.1959945-1-lucas.demarchi@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" XE_ENGINE_CLASS_OTHER was missing from the str conversion. Add it and remove the default handling so it's protected by -Wswitch-enum. Currently the only user is xe_hw_engine_class_sysfs_init(), which already skips XE_ENGINE_CLASS_OTHER, so there's no change in behavior. Reviewed-by: Nirmoy Das Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/xe/xe_hw_engine.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index e1b167149166..7395e25d1c2e 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -972,9 +972,13 @@ const char *xe_hw_engine_class_to_str(enum xe_engine_class class) return "vecs"; case XE_ENGINE_CLASS_COPY: return "bcs"; + case XE_ENGINE_CLASS_OTHER: + return "other"; case XE_ENGINE_CLASS_COMPUTE: return "ccs"; - default: - return NULL; + case XE_ENGINE_CLASS_MAX: + break; } + + return NULL; } From patchwork Tue Apr 23 23:56:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lucas De Marchi X-Patchwork-Id: 13640897 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6772AC10F15 for ; Tue, 23 Apr 2024 23:56:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2288711377E; Tue, 23 Apr 2024 23:56:29 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="NXzBlD5B"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id C70C611377A; Tue, 23 Apr 2024 23:56:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713916586; x=1745452586; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=noA9spXuv8ASw9GOTlPrcAG+92fMdNJlufd0ZvFYO+M=; b=NXzBlD5BIACuw2k5xgXy9S8IHe2frCv/H+Swt9l8rWGgTKO/wBBgP7Fl 0Hb/+R6et3zqxPSfDNYiNpZmfK9NRvZ2bbIYjlr0VKUncDvlpFbLOngX5 xdHKHBT6S8OhV9lmC89ySKUXvr83VcgXnip3Wu/K8STDKAMky0YEhi5Q/ lPMeEg4+UQ56mqFO1w5ZRso/tn+0XhrqhvwRqYUGiDjeK7GwzOhGlAGf/ mUxIi0iZepN6CBS7fTrIey8LLwQ1kWNso0kE19t1xH53KgMVh3MXNavmi Yds2MHkaP6iagDtTEs1mrby+y1Q2w1R/dm2ky7ZMzE6eU9q+f4viU7fWV w==; X-CSE-ConnectionGUID: FmdniyttRXS5DmYxJH0pEw== X-CSE-MsgGUID: 7lmJMmyoTQ6grTMIu+J3Lg== X-IronPort-AV: E=McAfee;i="6600,9927,11053"; a="27040645" X-IronPort-AV: E=Sophos;i="6.07,222,1708416000"; d="scan'208";a="27040645" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2024 16:56:25 -0700 X-CSE-ConnectionGUID: MgCmC4jMR/OJc4gD/tPZxA== X-CSE-MsgGUID: zE6hnH8iRPOHYnMqKjWM1w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,222,1708416000"; d="scan'208";a="29170924" Received: from lucas-s2600cw.jf.intel.com ([10.165.21.196]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2024 16:56:24 -0700 From: Lucas De Marchi To: Cc: dri-devel@lists.freedesktop.org, Umesh Nerlige Ramappa , Tvrtko Ursulin , Lucas De Marchi Subject: [PATCH v2 6/6] drm/xe/client: Print runtime to fdinfo Date: Tue, 23 Apr 2024 16:56:51 -0700 Message-ID: <20240423235652.1959945-7-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240423235652.1959945-1-lucas.demarchi@intel.com> References: <20240423235652.1959945-1-lucas.demarchi@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Print the accumulated runtime for client when printing fdinfo. Each time a query is done it first does 2 things: 1) loop through all the exec queues for the current client and accumulate the runtime, per engine class. CTX_TIMESTAMP is used for that, being read from the context image. 2) Read a "GPU timestamp" that can be used for considering "how much GPU time has passed" and that has the same unit/refclock as the one recording the runtime. RING_TIMESTAMP is used for that via MMIO. Since for all current platforms RING_TIMESTAMP follows the same refclock, just read it once, using any first engine. This is exported to userspace as 2 numbers in fdinfo: drm-cycles-: drm-total-cycles-: Userspace is expected to collect at least 2 samples, which allows to know the client engine busyness as per: RUNTIME1 - RUNTIME0 busyness = --------------------- T1 - T0 Another thing to point out is that it's expected that userspace will read any 2 samples every few seconds. Given the update frequency of the counters involved and that CTX_TIMESTAMP is 32-bits, the counter for each exec_queue can wrap around (assuming 100% utilization) after ~200s. The wraparound is not perceived by userspace since it's just accumulated for all the exec_queues in a 64-bit counter), but the measurement will not be accurate if the samples are too far apart. This could be mitigated by adding a workqueue to accumulate the counters every so often, but it's additional complexity for something that is done already by userspace every few seconds in tools like gputop (from igt), htop, nvtop, etc with none of them really defaulting to 1 sample per minute or more. Signed-off-by: Lucas De Marchi --- Documentation/gpu/drm-usage-stats.rst | 16 ++- Documentation/gpu/xe/index.rst | 1 + Documentation/gpu/xe/xe-drm-usage-stats.rst | 10 ++ drivers/gpu/drm/xe/xe_drm_client.c | 138 +++++++++++++++++++- 4 files changed, 162 insertions(+), 3 deletions(-) create mode 100644 Documentation/gpu/xe/xe-drm-usage-stats.rst diff --git a/Documentation/gpu/drm-usage-stats.rst b/Documentation/gpu/drm-usage-stats.rst index 6dc299343b48..421766289b78 100644 --- a/Documentation/gpu/drm-usage-stats.rst +++ b/Documentation/gpu/drm-usage-stats.rst @@ -112,6 +112,17 @@ larger value within a reasonable period. Upon observing a value lower than what was previously read, userspace is expected to stay with that larger previous value until a monotonic update is seen. +- drm-total-cycles-: + +Engine identifier string must be the same as the one specified in the +drm-cycles- tag and shall contain the total number cycles for the given +engine. + +This is a timestamp in GPU unspecified unit that matches the update rate +of drm-cycles-. For drivers that implement this interface, the engine +utilization can be calculated entirely on the GPU clock domain, without +considering the CPU sleep time between 2 samples. + - drm-maxfreq-: [Hz|MHz|KHz] Engine identifier string must be the same as the one specified in the @@ -168,5 +179,6 @@ be documented above and where possible, aligned with other drivers. Driver specific implementations ------------------------------- -:ref:`i915-usage-stats` -:ref:`panfrost-usage-stats` +* :ref:`i915-usage-stats` +* :ref:`panfrost-usage-stats` +* :ref:`xe-usage-stats` diff --git a/Documentation/gpu/xe/index.rst b/Documentation/gpu/xe/index.rst index c224ecaee81e..3f07aa3b5432 100644 --- a/Documentation/gpu/xe/index.rst +++ b/Documentation/gpu/xe/index.rst @@ -23,3 +23,4 @@ DG2, etc is provided to prototype the driver. xe_firmware xe_tile xe_debugging + xe-drm-usage-stats.rst diff --git a/Documentation/gpu/xe/xe-drm-usage-stats.rst b/Documentation/gpu/xe/xe-drm-usage-stats.rst new file mode 100644 index 000000000000..ccb48733cbe3 --- /dev/null +++ b/Documentation/gpu/xe/xe-drm-usage-stats.rst @@ -0,0 +1,10 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +.. _xe-usage-stats: + +======================================= +Xe DRM client usage stats implemenation +======================================= + +.. kernel-doc:: drivers/gpu/drm/xe/xe_drm_client.c + :doc: DRM Client usage stats diff --git a/drivers/gpu/drm/xe/xe_drm_client.c b/drivers/gpu/drm/xe/xe_drm_client.c index 08f0b7c95901..0227383910fa 100644 --- a/drivers/gpu/drm/xe/xe_drm_client.c +++ b/drivers/gpu/drm/xe/xe_drm_client.c @@ -2,6 +2,7 @@ /* * Copyright © 2023 Intel Corporation */ +#include "xe_drm_client.h" #include #include @@ -12,9 +13,66 @@ #include "xe_bo.h" #include "xe_bo_types.h" #include "xe_device_types.h" -#include "xe_drm_client.h" +#include "xe_exec_queue.h" +#include "xe_gt.h" +#include "xe_hw_engine.h" +#include "xe_pm.h" #include "xe_trace.h" +/** + * DOC: DRM Client usage stats + * + * The drm/xe driver implements the DRM client usage stats specification as + * documented in :ref:`drm-client-usage-stats`. + * + * Example of the output showing the implemented key value pairs and entirety of + * the currently possible format options: + * + * :: + * + * pos: 0 + * flags: 0100002 + * mnt_id: 26 + * ino: 685 + * drm-driver: xe + * drm-client-id: 3 + * drm-pdev: 0000:03:00.0 + * drm-total-system: 0 + * drm-shared-system: 0 + * drm-active-system: 0 + * drm-resident-system: 0 + * drm-purgeable-system: 0 + * drm-total-gtt: 192 KiB + * drm-shared-gtt: 0 + * drm-active-gtt: 0 + * drm-resident-gtt: 192 KiB + * drm-total-vram0: 23992 KiB + * drm-shared-vram0: 16 MiB + * drm-active-vram0: 0 + * drm-resident-vram0: 23992 KiB + * drm-total-stolen: 0 + * drm-shared-stolen: 0 + * drm-active-stolen: 0 + * drm-resident-stolen: 0 + * drm-cycles-rcs: 28257900 + * drm-total-cycles-rcs: 7655183225 + * drm-cycles-bcs: 0 + * drm-total-cycles-bcs: 7655183225 + * drm-cycles-vcs: 0 + * drm-total-cycles-vcs: 7655183225 + * drm-engine-capacity-vcs: 2 + * drm-cycles-vecs: 0 + * drm-total-cycles-vecs: 7655183225 + * drm-engine-capacity-vecs: 2 + * drm-cycles-ccs: 0 + * drm-total-cycles-ccs: 7655183225 + * drm-engine-capacity-ccs: 4 + * + * Possible `drm-cycles-` key names are: `rcs`, `ccs`, `bcs`, `vcs`, `vecs` and + * "other". + */ + + /** * xe_drm_client_alloc() - Allocate drm client * @void: No arg @@ -179,6 +237,83 @@ static void show_meminfo(struct drm_printer *p, struct drm_file *file) } } +static const u64 class_to_mask[] = { + [XE_ENGINE_CLASS_RENDER] = XE_HW_ENGINE_RCS_MASK, + [XE_ENGINE_CLASS_VIDEO_DECODE] = XE_HW_ENGINE_VCS_MASK, + [XE_ENGINE_CLASS_VIDEO_ENHANCE] = XE_HW_ENGINE_VECS_MASK, + [XE_ENGINE_CLASS_COPY] = XE_HW_ENGINE_BCS_MASK, + [XE_ENGINE_CLASS_OTHER] = XE_HW_ENGINE_GSCCS_MASK, + [XE_ENGINE_CLASS_COMPUTE] = XE_HW_ENGINE_CCS_MASK, +}; + +static void show_runtime(struct drm_printer *p, struct drm_file *file) +{ + struct xe_file *xef = file->driver_priv; + struct xe_device *xe = xef->xe; + struct xe_gt *gt; + struct xe_hw_engine *hwe; + struct xe_exec_queue *q; + unsigned long i, id_hwe, id_gt, capacity[XE_ENGINE_CLASS_MAX] = { }; + u64 gpu_timestamp, engine_mask = 0; + bool gpu_stamp = false; + + xe_pm_runtime_get(xe); + + /* Accumulate all the exec queues from this client */ + mutex_lock(&xef->exec_queue.lock); + xa_for_each(&xef->exec_queue.xa, i, q) + xe_exec_queue_update_runtime(q); + mutex_unlock(&xef->exec_queue.lock); + + + /* Calculate capacity of each engine class */ + BUILD_BUG_ON(ARRAY_SIZE(class_to_mask) != XE_ENGINE_CLASS_MAX); + for_each_gt(gt, xe, id_gt) + engine_mask |= gt->info.engine_mask; + for (i = 0; i < XE_ENGINE_CLASS_MAX; i++) + capacity[i] = hweight64(engine_mask & class_to_mask[i]); + + /* + * Iterate over all engines, printing the accumulated + * runtime for this client, per engine class + */ + for_each_gt(gt, xe, id_gt) { + xe_force_wake_get(gt_to_fw(gt), XE_FW_GT); + for_each_hw_engine(hwe, gt, id_hwe) { + const char *class_name; + + if (!capacity[hwe->class]) + continue; + + /* + * Use any (first) engine to have a timestamp to be used every + * time + */ + if (!gpu_stamp) { + gpu_timestamp = xe_hw_engine_read_timestamp(hwe); + gpu_stamp = true; + } + + class_name = xe_hw_engine_class_to_str(hwe->class); + + drm_printf(p, "drm-cycles-%s:\t%llu\n", + class_name, xef->runtime[hwe->class]); + drm_printf(p, "drm-total-cycles-%s:\t%llu\n", + class_name, gpu_timestamp); + + if (capacity[hwe->class] > 1) + drm_printf(p, "drm-engine-capacity-%s:\t%lu\n", + class_name, capacity[hwe->class]); + + /* engine class already handled, skip next iterations */ + capacity[hwe->class] = 0; + } + xe_force_wake_put(gt_to_fw(gt), XE_FW_GT); + } + + xe_pm_runtime_get(xe); +} + /** * xe_drm_client_fdinfo() - Callback for fdinfo interface * @p: The drm_printer ptr @@ -192,5 +327,6 @@ static void show_meminfo(struct drm_printer *p, struct drm_file *file) void xe_drm_client_fdinfo(struct drm_printer *p, struct drm_file *file) { show_meminfo(p, file); + show_runtime(p, file); } #endif