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Mon, 25 Feb 2019 09:17:54 -0800 Received: from ben-Latitude-E6540.analog.com (10.50.1.129) by NWD2HUBCAS7.ad.analog.com (10.64.69.107) with Microsoft SMTP Server id 14.3.408.0; Mon, 25 Feb 2019 12:17:53 -0500 From: Beniamin Bia To: CC: , , , , , , , , , Beniamin Bia Subject: [PATCH v3 1/3] staging: iio: frequency: ad9834: Move frequency to standard iio types Date: Mon, 25 Feb 2019 21:17:30 +0200 Message-ID: <20190225191731.5822-1-beniamin.bia@analog.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:137.71.25.55;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(376002)(39860400002)(136003)(346002)(396003)(2980300002)(3190300001)(189003)(199004)(72206003)(186003)(26005)(77096007)(478600001)(2351001)(7636002)(86362001)(305945005)(6916009)(106002)(106466001)(336012)(14444005)(53416004)(426003)(2616005)(7696005)(51416003)(126002)(8676002)(476003)(116002)(246002)(50226002)(8936002)(2906002)(36756003)(50466002)(48376002)(30864003)(4326008)(356004)(54906003)(44832011)(6666004)(5660300002)(107886003)(47776003)(1076003)(16586007)(316002)(486006);DIR:OUT;SFP:1101;SCL:1;SRVR:DM6PR03MB3754;H:nwd2mta1.analog.com;FPR:;SPF:Pass;LANG:en;PTR:nwd2mail10.analog.com;MX:1;A:1; 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This is a small step towards removing any unnecessary custom attribute. Ad9834 will diverge from ad9833 in the future, that is why we have two identical arrays for ad9834 and 9833. Signed-off-by: Beniamin Bia --- Changed in v3: -based on Jonathan suggestion, i replaced default option with Ad9834 DeviceId -added a local variable in frequency to simplify the code -added ABI documentation .../testing/sysfs-bus-iio-frequency-ad9834 | 129 ++++++++++++++++++ drivers/staging/iio/frequency/ad9834.c | 104 +++++++++++--- 2 files changed, 216 insertions(+), 17 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9834 diff --git a/Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9834 b/Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9834 new file mode 100644 index 000000000000..b912b49473a3 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9834 @@ -0,0 +1,129 @@ +What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_frequency +KernelVersion: 3.5.0 +Date: April 2012 +Contact: linux-iio@vger.kernel.org +Description: + Represents the value from frequency register 0 of device. The + value is between 0 and clock frequency / 2. + Reading returns the value of frequency written in register 0. + +What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage1_frequency +KernelVersion: 3.5.0 +Date: April 2012 +Contact: linux-iio@vger.kernel.org +Description: + Represents the value from frequency register 1 of device. The + value is between 0 and clock frequency / 2. + Reading returns the value of frequency written in register 1. + +What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_phase0 +KernelVersion: 3.5.0 +Date: April 2012 +Contact: linux-iio@vger.kernel.org +Description: + Represents the value from phase register 0 of device. The value + is between 0 and 4096 rad. + Reading returns the value of phase written in register 0. + +What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_phase1 +KernelVersion: 3.5.0 +Date: April 2012 +Date: February 2019 +Contact: linux-iio@vger.kernel.org +Description: + Represents the value from phase register 1 of device. + The value is between 0 and 4096 rad + Reading returns the value of phase written in register 1. + +What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_out0_wavetype_available +KernelVersion: 3.5.0 +Date: April 2012 +Contact: linux-iio@vger.kernel.org +Description: + Reading returns the possible waveform of output: + sine - for a sinewave + triangle - for a triangle signal + square - squarewave, this is only available on ad9833/7 + +What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_out0_wavetype +KernelVersion: 3.5.0 +Date: April 2012 +Contact: linux-iio@vger.kernel.org +Description: + Represents the output waveform of channel: + sine - for a sinewave + triangle - for a triangle signal + square - squarewave, this is only available on ad9833/7 + +What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_out1_wavetype_available +KernelVersion: 3.5.0 +Date: April 2012 +Contact: linux-iio@vger.kernel.org +Description: + Reading returns the possible waveform type for accumulator + output: + square - for a squarewave output + nothing - when orbiten is activated + This is only available on ad9834 + +What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_out1_wavetype +KernelVersion: 3.5.0 +Date: April 2012 +Contact: linux-iio@vger.kernel.org +Description: + Represents the accumulator output waveform: + square or nothing when orbiten is activated + +What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_pincontrol_en +KernelVersion: 3.5.0 +Date: April 2012 +Contact: linux-iio@vger.kernel.org +Description: + Represents the PIN_SW bit and determines if the device is + control by spi or by gpio pins. + Reading returns the selected method. + Is only available for ad9834. + +What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_frequencysymbol +KernelVersion: 3.5.0 +Date: April 2012 +Contact: linux-iio@vger.kernel.org +Description: + Represents which frequency register is selected. These devices + have two registers for frequency and phase but only one + output. The user can select which one controls the output. + 0 represents frequency 0 which is mapped to + out_altvoltage0_frequency + 1 represents frequency 1 which is mapped to + out_altvoltage1_frequency + +What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_phasesymbol +KernelVersion: 3.5.0 +Date: April 2012 +Contact: linux-iio@vger.kernel.org +Description: + Represents which phase register is selected. These devices + have two registers for frequency and phase but only one + output. The user can select which one controls the output. + 0 represents phase 0 which is mapped to + out_altvoltage0_phase0 + 1 represents phase 1 which is mapped to + out_altvoltage0_phase1 + +What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_out0_enable +KernelVersion: 3.5.0 +Date: April 2012 +Contact: linux-iio@vger.kernel.org +Description: + Enable or disable the output from channel. + 0 represents disabled + 1 represents enabled + +What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_out1_enable +KernelVersion: 3.5.0 +Date: April 2012 +Contact: linux-iio@vger.kernel.org +Description: + Enable or disable the output from accumulator channel. + 0 represents disabled + 1 represents enabled diff --git a/drivers/staging/iio/frequency/ad9834.c b/drivers/staging/iio/frequency/ad9834.c index f036f75d1f22..8465dac656dd 100644 --- a/drivers/staging/iio/frequency/ad9834.c +++ b/drivers/staging/iio/frequency/ad9834.c @@ -81,6 +81,8 @@ struct ad9834_state { struct spi_message freq_msg; struct mutex lock; /* protect sensor state */ + unsigned long frequency[2]; + /* * DMA (thus cache coherency maintenance) requires the * transfer buffers to live in their own cache lines. @@ -89,6 +91,11 @@ struct ad9834_state { __be16 freq_data[2]; }; +enum ad9834_ch_addr { + AD9834_CHANNEL_ADDRESS0, + AD9834_CHANNEL_ADDRESS1, +}; + /** * ad9834_supported_device_ids: */ @@ -100,6 +107,24 @@ enum ad9834_supported_device_ids { ID_AD9838, }; +#define AD9833_CHANNEL(chan) { \ + .type = IIO_ALTVOLTAGE, \ + .indexed = 1, \ + .output = 1, \ + .channel = (chan), \ + .info_mask_separate = BIT(IIO_CHAN_INFO_FREQUENCY) \ +} + +static const struct iio_chan_spec ad9833_channels[] = { + AD9833_CHANNEL(0), + AD9833_CHANNEL(1), +}; + +static const struct iio_chan_spec ad9834_channels[] = { + AD9833_CHANNEL(0), + AD9833_CHANNEL(1), +}; + static unsigned int ad9834_calc_freqreg(unsigned long mclk, unsigned long fout) { unsigned long long freqreg = (u64)fout * (u64)BIT(AD9834_FREQ_BITS); @@ -109,10 +134,13 @@ static unsigned int ad9834_calc_freqreg(unsigned long mclk, unsigned long fout) } static int ad9834_write_frequency(struct ad9834_state *st, - unsigned long addr, unsigned long fout) + enum ad9834_ch_addr addr, + unsigned long fout) { + unsigned long frequency_register; unsigned long clk_freq; unsigned long regval; + int ret; clk_freq = clk_get_rate(st->mclk); @@ -121,13 +149,24 @@ static int ad9834_write_frequency(struct ad9834_state *st, regval = ad9834_calc_freqreg(clk_freq, fout); - st->freq_data[0] = cpu_to_be16(addr | (regval & + if (addr == AD9834_CHANNEL_ADDRESS0) + frequency_register = AD9834_REG_FREQ0; + else + frequency_register = AD9834_REG_FREQ1; + + st->freq_data[0] = cpu_to_be16(frequency_register | (regval & RES_MASK(AD9834_FREQ_BITS / 2))); - st->freq_data[1] = cpu_to_be16(addr | ((regval >> + st->freq_data[1] = cpu_to_be16(frequency_register | ((regval >> (AD9834_FREQ_BITS / 2)) & RES_MASK(AD9834_FREQ_BITS / 2))); - return spi_sync(st->spi, &st->freq_msg); + ret = spi_sync(st->spi, &st->freq_msg); + if (ret) + return ret; + + st->frequency[(int)addr] = fout; + + return 0; } static int ad9834_write_phase(struct ad9834_state *st, @@ -140,6 +179,39 @@ static int ad9834_write_phase(struct ad9834_state *st, return spi_sync(st->spi, &st->msg); } +static int ad9834_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct ad9834_state *st = iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_FREQUENCY: + *val = st->frequency[chan->channel]; + return IIO_VAL_INT; + } + + return -EINVAL; +} + +static int ad9834_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct ad9834_state *st = iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_FREQUENCY: + return ad9834_write_frequency(st, + (enum ad9834_ch_addr)chan->channel, + val); + default: + return -EINVAL; + } + + return 0; +} + static ssize_t ad9834_write(struct device *dev, struct device_attribute *attr, const char *buf, @@ -157,10 +229,6 @@ static ssize_t ad9834_write(struct device *dev, mutex_lock(&st->lock); switch ((u32)this_attr->address) { - case AD9834_REG_FREQ0: - case AD9834_REG_FREQ1: - ret = ad9834_write_frequency(st, this_attr->address, val); - break; case AD9834_REG_PHASE0: case AD9834_REG_PHASE1: ret = ad9834_write_phase(st, this_attr->address, val); @@ -323,8 +391,6 @@ static IIO_DEVICE_ATTR(out_altvoltage0_out1_wavetype_available, 0444, * see dds.h for further information */ -static IIO_DEV_ATTR_FREQ(0, 0, 0200, NULL, ad9834_write, AD9834_REG_FREQ0); -static IIO_DEV_ATTR_FREQ(0, 1, 0200, NULL, ad9834_write, AD9834_REG_FREQ1); static IIO_DEV_ATTR_FREQSYMBOL(0, 0200, NULL, ad9834_write, AD9834_FSEL); static IIO_CONST_ATTR_FREQ_SCALE(0, "1"); /* 1Hz */ @@ -342,8 +408,6 @@ static IIO_DEV_ATTR_OUT_WAVETYPE(0, 0, ad9834_store_wavetype, 0); static IIO_DEV_ATTR_OUT_WAVETYPE(0, 1, ad9834_store_wavetype, 1); static struct attribute *ad9834_attributes[] = { - &iio_dev_attr_out_altvoltage0_frequency0.dev_attr.attr, - &iio_dev_attr_out_altvoltage0_frequency1.dev_attr.attr, &iio_const_attr_out_altvoltage0_frequency_scale.dev_attr.attr, &iio_dev_attr_out_altvoltage0_phase0.dev_attr.attr, &iio_dev_attr_out_altvoltage0_phase1.dev_attr.attr, @@ -361,8 +425,6 @@ static struct attribute *ad9834_attributes[] = { }; static struct attribute *ad9833_attributes[] = { - &iio_dev_attr_out_altvoltage0_frequency0.dev_attr.attr, - &iio_dev_attr_out_altvoltage0_frequency1.dev_attr.attr, &iio_const_attr_out_altvoltage0_frequency_scale.dev_attr.attr, &iio_dev_attr_out_altvoltage0_phase0.dev_attr.attr, &iio_dev_attr_out_altvoltage0_phase1.dev_attr.attr, @@ -384,11 +446,15 @@ static const struct attribute_group ad9833_attribute_group = { }; static const struct iio_info ad9834_info = { + .write_raw = &ad9834_write_raw, + .read_raw = &ad9834_read_raw, .attrs = &ad9834_attribute_group, .driver_module = THIS_MODULE, }; static const struct iio_info ad9833_info = { + .write_raw = &ad9834_write_raw, + .read_raw = &ad9834_read_raw, .attrs = &ad9833_attribute_group, .driver_module = THIS_MODULE, }; @@ -435,9 +501,13 @@ static int ad9834_probe(struct spi_device *spi) switch (st->devid) { case ID_AD9833: case ID_AD9837: + indio_dev->channels = ad9833_channels; + indio_dev->num_channels = ARRAY_SIZE(ad9833_channels); indio_dev->info = &ad9833_info; break; - default: + case ID_AD9834: + indio_dev->channels = ad9834_channels; + indio_dev->num_channels = ARRAY_SIZE(ad9834_channels); indio_dev->info = &ad9834_info; break; } @@ -474,11 +544,11 @@ static int ad9834_probe(struct spi_device *spi) goto error_clock_unprepare; } - ret = ad9834_write_frequency(st, AD9834_REG_FREQ0, 1000000); + ret = ad9834_write_frequency(st, AD9834_CHANNEL_ADDRESS0, 1000000); if (ret) goto error_clock_unprepare; - ret = ad9834_write_frequency(st, AD9834_REG_FREQ1, 5000000); + ret = ad9834_write_frequency(st, AD9834_CHANNEL_ADDRESS1, 5000000); if (ret) goto error_clock_unprepare; From patchwork Mon Feb 25 19:17:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Beniamin Bia X-Patchwork-Id: 10828947 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8749117E6 for ; Mon, 25 Feb 2019 17:18:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 64AFA2B744 for ; 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gmx.de; dkim=none (message not signed) header.d=none;gmx.de; dmarc=bestguesspass action=none header.from=analog.com; Received-SPF: Pass (protection.outlook.com: domain of analog.com designates 137.71.25.55 as permitted sender) receiver=protection.outlook.com; client-ip=137.71.25.55; helo=nwd2mta1.analog.com; Received: from nwd2mta1.analog.com (137.71.25.55) by BL2NAM02FT039.mail.protection.outlook.com (10.152.77.152) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.20.1643.11 via Frontend Transport; Mon, 25 Feb 2019 17:18:21 +0000 Received: from NWD2HUBCAS7.ad.analog.com (nwd2hubcas7.ad.analog.com [10.64.69.107]) by nwd2mta1.analog.com (8.13.8/8.13.8) with ESMTP id x1PHILU9022673 (version=TLSv1/SSLv3 cipher=AES256-SHA bits=256 verify=OK); Mon, 25 Feb 2019 09:18:21 -0800 Received: from ben-Latitude-E6540.analog.com (10.50.1.129) by NWD2HUBCAS7.ad.analog.com (10.64.69.107) with Microsoft SMTP Server id 14.3.408.0; Mon, 25 Feb 2019 12:18:20 -0500 From: Beniamin Bia To: CC: , , , , , , , , , Beniamin Bia Subject: [PATCH v3 2/3] staging: iio: frequency: ad9834: Move phase and scale to standard iio attribute Date: Mon, 25 Feb 2019 21:17:31 +0200 Message-ID: <20190225191731.5822-2-beniamin.bia@analog.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190225191731.5822-1-beniamin.bia@analog.com> References: <20190225191731.5822-1-beniamin.bia@analog.com> MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:137.71.25.55;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(979002)(39860400002)(396003)(136003)(346002)(376002)(2980300002)(3190300001)(189003)(199004)(106466001)(72206003)(76176011)(8676002)(478600001)(14444005)(4326008)(47776003)(7636002)(50466002)(305945005)(7696005)(51416003)(50226002)(2351001)(6916009)(8936002)(77096007)(426003)(54906003)(446003)(86362001)(116002)(2906002)(5660300002)(246002)(26005)(107886003)(1076003)(316002)(53416004)(6666004)(356004)(336012)(36756003)(16586007)(486006)(11346002)(476003)(126002)(48376002)(2616005)(106002)(44832011)(186003)(969003)(989001)(999001)(1009001)(1019001);DIR:OUT;SFP:1101;SCL:1;SRVR:SN6PR03MB3757;H:nwd2mta1.analog.com;FPR:;SPF:Pass;LANG:en;PTR:nwd2mail10.analog.com;MX:1;A:1; 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Signed-off-by: Beniamin Bia --- Changes in v3: -abi documentation added .../testing/sysfs-bus-iio-frequency-ad9834 | 10 ++-- drivers/staging/iio/frequency/ad9834.c | 53 +++++++++++-------- 2 files changed, 38 insertions(+), 25 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9834 b/Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9834 index b912b49473a3..656aa5b6d22b 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9834 +++ b/Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9834 @@ -1,3 +1,5 @@ +What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage_scale + What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_frequency KernelVersion: 3.5.0 Date: April 2012 @@ -16,7 +18,7 @@ Description: value is between 0 and clock frequency / 2. Reading returns the value of frequency written in register 1. -What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_phase0 +What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_phase KernelVersion: 3.5.0 Date: April 2012 Contact: linux-iio@vger.kernel.org @@ -25,7 +27,7 @@ Description: is between 0 and 4096 rad. Reading returns the value of phase written in register 0. -What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_phase1 +What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage1_phase KernelVersion: 3.5.0 Date: April 2012 Date: February 2019 @@ -106,9 +108,9 @@ Description: have two registers for frequency and phase but only one output. The user can select which one controls the output. 0 represents phase 0 which is mapped to - out_altvoltage0_phase0 + out_altvoltage0_phase 1 represents phase 1 which is mapped to - out_altvoltage0_phase1 + out_altvoltage1_phase What: /sys/bus/iio/devices/iio:deviceX/out_altvoltage0_out0_enable KernelVersion: 3.5.0 diff --git a/drivers/staging/iio/frequency/ad9834.c b/drivers/staging/iio/frequency/ad9834.c index 8465dac656dd..107d859dadd7 100644 --- a/drivers/staging/iio/frequency/ad9834.c +++ b/drivers/staging/iio/frequency/ad9834.c @@ -82,6 +82,7 @@ struct ad9834_state { struct mutex lock; /* protect sensor state */ unsigned long frequency[2]; + unsigned long phase[2]; /* * DMA (thus cache coherency maintenance) requires the @@ -113,6 +114,8 @@ enum ad9834_supported_device_ids { .output = 1, \ .channel = (chan), \ .info_mask_separate = BIT(IIO_CHAN_INFO_FREQUENCY) \ + | BIT(IIO_CHAN_INFO_PHASE),\ + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ } static const struct iio_chan_spec ad9833_channels[] = { @@ -170,13 +173,26 @@ static int ad9834_write_frequency(struct ad9834_state *st, } static int ad9834_write_phase(struct ad9834_state *st, - unsigned long addr, unsigned long phase) + enum ad9834_ch_addr addr, + unsigned long phase) { + int ret; + if (phase > BIT(AD9834_PHASE_BITS)) return -EINVAL; - st->data = cpu_to_be16(addr | phase); - return spi_sync(st->spi, &st->msg); + if (addr == AD9834_CHANNEL_ADDRESS0) + st->data = cpu_to_be16(AD9834_REG_PHASE0 | phase); + else + st->data = cpu_to_be16(AD9834_REG_PHASE1 | phase); + + ret = spi_sync(st->spi, &st->msg); + if (ret) + return ret; + + st->phase[(int)addr] = phase; + + return 0; } static int ad9834_read_raw(struct iio_dev *indio_dev, @@ -189,6 +205,13 @@ static int ad9834_read_raw(struct iio_dev *indio_dev, case IIO_CHAN_INFO_FREQUENCY: *val = st->frequency[chan->channel]; return IIO_VAL_INT; + case IIO_CHAN_INFO_PHASE: + *val = st->phase[chan->channel]; + return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + /*1 hz */ + *val = 1; + return IIO_VAL_INT; } return -EINVAL; @@ -205,6 +228,10 @@ static int ad9834_write_raw(struct iio_dev *indio_dev, return ad9834_write_frequency(st, (enum ad9834_ch_addr)chan->channel, val); + case IIO_CHAN_INFO_PHASE: + return ad9834_write_phase(st, + (enum ad9834_ch_addr)chan->channel, + val); default: return -EINVAL; } @@ -229,10 +256,6 @@ static ssize_t ad9834_write(struct device *dev, mutex_lock(&st->lock); switch ((u32)this_attr->address) { - case AD9834_REG_PHASE0: - case AD9834_REG_PHASE1: - ret = ad9834_write_phase(st, this_attr->address, val); - break; case AD9834_OPBITEN: if (st->control & AD9834_MODE) { ret = -EINVAL; /* AD9843 reserved mode */ @@ -392,12 +415,8 @@ static IIO_DEVICE_ATTR(out_altvoltage0_out1_wavetype_available, 0444, */ static IIO_DEV_ATTR_FREQSYMBOL(0, 0200, NULL, ad9834_write, AD9834_FSEL); -static IIO_CONST_ATTR_FREQ_SCALE(0, "1"); /* 1Hz */ -static IIO_DEV_ATTR_PHASE(0, 0, 0200, NULL, ad9834_write, AD9834_REG_PHASE0); -static IIO_DEV_ATTR_PHASE(0, 1, 0200, NULL, ad9834_write, AD9834_REG_PHASE1); static IIO_DEV_ATTR_PHASESYMBOL(0, 0200, NULL, ad9834_write, AD9834_PSEL); -static IIO_CONST_ATTR_PHASE_SCALE(0, "0.0015339808"); /* 2PI/2^12 rad*/ static IIO_DEV_ATTR_PINCONTROL_EN(0, 0200, NULL, ad9834_write, AD9834_PIN_SW); @@ -408,10 +427,6 @@ static IIO_DEV_ATTR_OUT_WAVETYPE(0, 0, ad9834_store_wavetype, 0); static IIO_DEV_ATTR_OUT_WAVETYPE(0, 1, ad9834_store_wavetype, 1); static struct attribute *ad9834_attributes[] = { - &iio_const_attr_out_altvoltage0_frequency_scale.dev_attr.attr, - &iio_dev_attr_out_altvoltage0_phase0.dev_attr.attr, - &iio_dev_attr_out_altvoltage0_phase1.dev_attr.attr, - &iio_const_attr_out_altvoltage0_phase_scale.dev_attr.attr, &iio_dev_attr_out_altvoltage0_pincontrol_en.dev_attr.attr, &iio_dev_attr_out_altvoltage0_frequencysymbol.dev_attr.attr, &iio_dev_attr_out_altvoltage0_phasesymbol.dev_attr.attr, @@ -425,10 +440,6 @@ static struct attribute *ad9834_attributes[] = { }; static struct attribute *ad9833_attributes[] = { - &iio_const_attr_out_altvoltage0_frequency_scale.dev_attr.attr, - &iio_dev_attr_out_altvoltage0_phase0.dev_attr.attr, - &iio_dev_attr_out_altvoltage0_phase1.dev_attr.attr, - &iio_const_attr_out_altvoltage0_phase_scale.dev_attr.attr, &iio_dev_attr_out_altvoltage0_frequencysymbol.dev_attr.attr, &iio_dev_attr_out_altvoltage0_phasesymbol.dev_attr.attr, &iio_dev_attr_out_altvoltage0_out_enable.dev_attr.attr, @@ -552,11 +563,11 @@ static int ad9834_probe(struct spi_device *spi) if (ret) goto error_clock_unprepare; - ret = ad9834_write_phase(st, AD9834_REG_PHASE0, 512); + ret = ad9834_write_phase(st, AD9834_CHANNEL_ADDRESS0, 512); if (ret) goto error_clock_unprepare; - ret = ad9834_write_phase(st, AD9834_REG_PHASE1, 1024); + ret = ad9834_write_phase(st, AD9834_CHANNEL_ADDRESS1, 1024); if (ret) goto error_clock_unprepare;