From patchwork Wed Apr 24 18:14:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Luck X-Patchwork-Id: 13642304 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6435916DEBA; Wed, 24 Apr 2024 18:15:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713982509; cv=none; b=KfvzPBkFNAszVnpD4SHdUHLOH/Q+rj0HOP5jRreGpDTeU3umeQWJor3ASs1jpKfvwjcvCNZAczoLqXy7jNbd8BT+GPHVa0jo1BgN15WUlks5QmyY0E+jlJega1fHuuYXSoYphpo/iRkuNpFtkOEms7mIuY0xJrqwwvx03zaFnag= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713982509; c=relaxed/simple; bh=Bj1Hh9P4phH3tXz7fAUpe9Zp5qNwRqIfye9t/fF1o6k=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=QGfhcC1RONOVtdatiQUzD45fjQu8YJvkja35MRoabVgUfsHLFDl6dF72DDl5J5u8jINvKfJWBIWKjV9afC6Wp5p4Yvv6cje/gFE7fviZsP8EAIUFZFFctlsCiM1ZwJhTAGpS7us+NPkpfRBYYYNiO7VLCFoPTarft0jmtNQLy3w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=V/IL/Mrj; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="V/IL/Mrj" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713982508; x=1745518508; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Bj1Hh9P4phH3tXz7fAUpe9Zp5qNwRqIfye9t/fF1o6k=; b=V/IL/MrjOPZ6oaUPfKhcmtLQQdUdtCftRB+MBmtvDZ6T7jc+dK0/1VbS 9VYUUXIP9kv3rUsm+sI/sExcnMizUI/TXBJoYOtvFwhCnEZ2hBjtJnyJw 76VdveesYbkM/J8IXEsDJSMXmEy3lKRuVLXWxGqkHFcM3pkHY6Bqlr3Q4 1qTrX9ewNpxgSseJElFveX/vrz2FVs7Vhg6LsMCI6Xh/2GcI9miIjLS2y vKMbY5lepmIaUW+ydoj8RB9GfvA4dqgZ4piLrwAuIt1XvZPVVdHIyo23+ 74j5djVDw7z7kMtfXuP4op1i4bVW0/V47iHLA5ojLPHjV01NaXTOWDEpw g==; X-CSE-ConnectionGUID: KUKVJKFcSlmf/lqx0pvAPg== X-CSE-MsgGUID: AaVHfvdlR0G7GlvnIML5kQ== X-IronPort-AV: E=McAfee;i="6600,9927,11054"; a="9481784" X-IronPort-AV: E=Sophos;i="6.07,226,1708416000"; d="scan'208";a="9481784" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2024 11:14:53 -0700 X-CSE-ConnectionGUID: g9KL3PctSRGzgFMrYZHuPQ== X-CSE-MsgGUID: 3ViPB0/LTzGJ4dCuXhhMOw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,226,1708416000"; d="scan'208";a="29262578" Received: from agluck-desk3.sc.intel.com ([172.25.222.105]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2024 11:14:53 -0700 From: Tony Luck To: Borislav Petkov , linux-kernel@vger.kernel.org Cc: Bjorn Helgaas , linux-pci@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v4 10/71] PCI: PM: Switch to new Intel CPU model defines Date: Wed, 24 Apr 2024 11:14:52 -0700 Message-ID: <20240424181452.41346-1-tony.luck@intel.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240424181245.41141-1-tony.luck@intel.com> References: <20240424181245.41141-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck Acked-by: Bjorn Helgaas --- drivers/pci/pci-mid.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pci-mid.c b/drivers/pci/pci-mid.c index fbfd78127123..bed9f0755271 100644 --- a/drivers/pci/pci-mid.c +++ b/drivers/pci/pci-mid.c @@ -38,8 +38,8 @@ pci_power_t mid_pci_get_power_state(struct pci_dev *pdev) * arch/x86/platform/intel-mid/pwr.c. */ static const struct x86_cpu_id lpss_cpu_ids[] = { - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, NULL), - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, NULL), + X86_MATCH_VFM(INTEL_ATOM_SALTWELL_MID, NULL), + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, NULL), {} }; From patchwork Wed Apr 24 18:15:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Luck X-Patchwork-Id: 13642305 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E77C181326; Wed, 24 Apr 2024 18:15:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713982524; cv=none; b=sJCsXqgCmwaqGjU0LqmFOkaoZ8/B8a8aiHamDceqgbIJwQ2b5D0EsfCn8k1xYxMWq6/SapKc8A8h7zpK28mAFA6cUcDQz6SNnk7JpYu6a6a3/IgWMlXJ9GdX4VwSIjfFFxvadGD1XRnr1n+JdtC/j7naHNQOyCPItrT6htfpMvk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713982524; c=relaxed/simple; bh=obhXYEmt6d4ZPBEnG583vH7Ox14Ir+rTrmmNAEgF6jg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=seFhzEHQ9gn8XJWiPF+QRuIz2N1OrP8gnh5RrUqdWUwS3JpFrV+ZNEoNYosrFDe6c/wZNbyQGQTDIMWNJkXYmJCSrjF9YXY9MaRqBcsYisxtvq8RMLFcc8IZbrcxqhPByD4G2Z7Usx48Xd7KJBL56Q+jG6cLEu+Q1mhDvQgmii4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=B3cj5rbl; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="B3cj5rbl" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713982521; x=1745518521; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=obhXYEmt6d4ZPBEnG583vH7Ox14Ir+rTrmmNAEgF6jg=; b=B3cj5rblgcOnu7sbJn3nZ6XpbLriNwm3J5GbITYADQK568h/LFJSiUT8 UimrECfPEpMig6AckfbBLfsuktxc41MaXrrG14A5hR+a+AStygTFKu4FY 3ixfK4A+GOJElGXBZ0yGAnb0chM8TdAhDWg+udOQAG1qsGwjFU1vd6c9s ZA7+4QM0TYcJYtk7zzQMoLqYxBdEg0TGu4J1fnY18l+iD7RkmSGjljDDo 9Mws2y9QAj7ajRGt8Dv/mCYy3lOqVed1nwWnUgMyzjLQ2fTCIBuyzcV/j tpnvl13t4cKwf82g375OYGIyREESPJrMq6PEZ4rhqMZT5EbQ5AGpr/E6O Q==; X-CSE-ConnectionGUID: gGjtlU4CTWi2nxX1DEfAjw== X-CSE-MsgGUID: CG7faPwISdCsUXGIJl3fdA== X-IronPort-AV: E=McAfee;i="6600,9927,11054"; a="9503539" X-IronPort-AV: E=Sophos;i="6.07,226,1708416000"; d="scan'208";a="9503539" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2024 11:15:21 -0700 X-CSE-ConnectionGUID: VcIiWi/bQZai5oz5I5U70w== X-CSE-MsgGUID: lbQj+TPeSR6BAaCag2O2PQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,226,1708416000"; d="scan'208";a="55750130" Received: from agluck-desk3.sc.intel.com ([172.25.222.105]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2024 11:15:20 -0700 From: Tony Luck To: Borislav Petkov , Thomas Gleixner , Ingo Molnar , Dave Hansen , x86@kernel.org Cc: Bjorn Helgaas , "H. Peter Anvin" , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v4 42/71] x86/PCI: Switch to new Intel CPU model defines Date: Wed, 24 Apr 2024 11:15:20 -0700 Message-ID: <20240424181520.41965-1-tony.luck@intel.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240424181245.41141-1-tony.luck@intel.com> References: <20240424181245.41141-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck --- arch/x86/pci/intel_mid_pci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c index 8edd62206604..933ff795e53e 100644 --- a/arch/x86/pci/intel_mid_pci.c +++ b/arch/x86/pci/intel_mid_pci.c @@ -216,7 +216,7 @@ static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, } static const struct x86_cpu_id intel_mid_cpu_ids[] = { - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, NULL), + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, NULL), {} }; @@ -243,7 +243,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev) model = id->model; switch (model) { - case INTEL_FAM6_ATOM_SILVERMONT_MID: + case VFM_MODEL(INTEL_ATOM_SILVERMONT_MID): polarity_low = false; /* Special treatment for IRQ0 */