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[2001:b400:e239:aa6a:7bb4:902b:1963:242d]) by smtp.gmail.com with ESMTPSA id lc7-20020a170902fa8700b001e3e081dea1sm804157plb.0.2024.05.02.02.12.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 May 2024 02:12:16 -0700 (PDT) From: Ricky Wu To: jesse.brandeburg@intel.co Cc: anthony.l.nguyen@intel.com, intel-wired-lan@lists.osuosl.org, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, rickywu0421@gmail.com, en-wei.wu@canonical.com Subject: [PATCH] e1000e: fix link fluctuations problem Date: Thu, 2 May 2024 17:12:15 +0800 Message-Id: <20240502091215.13068-1-en-wei.wu@canonical.com> X-Mailer: git-send-email 2.40.1 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org As described in https://bugzilla.kernel.org/show_bug.cgi?id=218642, some e1000e NIC reports link up -> link down -> link up when hog-plugging the Ethernet cable. The problem is because the unstable behavior of Link Status bit in PHY Status Register of some e1000e NIC. When we re-plug the cable, the e1000e_phy_has_link_generic() (called after the Link-Status-Changed interrupt) has read this bit with 1->0->1 (1=link up, 0=link down) and e1000e reports it to net device layer respectively. This patch solves the problem by passing polling delays on e1000e_phy_has_link_generic() so that it will not get the unstable states of Link Status bit. Also, the sleep codes in e1000e_phy_has_link_generic() only take effect when error occurs reading the MII register. Moving these codes forward to the beginning of the loop so that the polling delays passed into this function can take effect on any situation. Signed-off-by: Ricky Wu --- drivers/net/ethernet/intel/e1000e/ich8lan.c | 5 ++++- drivers/net/ethernet/intel/e1000e/phy.c | 10 ++++++---- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c index f9e94be36e97..c462aa6e6dee 100644 --- a/drivers/net/ethernet/intel/e1000e/ich8lan.c +++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c @@ -1427,8 +1427,11 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) /* First we want to see if the MII Status Register reports * link. If so, then we want to get the current speed/duplex * of the PHY. + * Some PHYs have link fluctuations with the instability of + * Link Status bit (BMSR_LSTATUS) in MII Status Register. + * Increase the iteration times and delay solves the problem. */ - ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link); + ret_val = e1000e_phy_has_link_generic(hw, COPPER_LINK_UP_LIMIT, 100000, &link); if (ret_val) goto out; diff --git a/drivers/net/ethernet/intel/e1000e/phy.c b/drivers/net/ethernet/intel/e1000e/phy.c index 93544f1cc2a5..ef056363d721 100644 --- a/drivers/net/ethernet/intel/e1000e/phy.c +++ b/drivers/net/ethernet/intel/e1000e/phy.c @@ -1776,7 +1776,13 @@ s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations, u16 i, phy_status; *success = false; + for (i = 0; i < iterations; i++) { + if (usec_interval >= 1000) + msleep(usec_interval / 1000); + else + udelay(usec_interval); + /* Some PHYs require the MII_BMSR register to be read * twice due to the link bit being sticky. No harm doing * it across the board. @@ -1799,10 +1805,6 @@ s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations, *success = true; break; } - if (usec_interval >= 1000) - msleep(usec_interval / 1000); - else - udelay(usec_interval); } return ret_val;