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Thu, 2 May 2024 05:59:36 -0400 (EDT) From: Jiaxun Yang Date: Thu, 02 May 2024 10:59:28 +0100 Subject: [PATCH v3 1/9] MIPS: asm: Move strings to .rodata.str section Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240502-mips_debug_ll-v3-1-3b61f30e484c@flygoat.com> References: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> In-Reply-To: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=661; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=QL9nuqQoyyNsWN3gxQVMz1nurlN4CBrHLvpqKsCC2dU=; b=owGbwMvMwCHmXMhTe71c8zDjabUkhjTjFPbg6bk1VW6lXAr3r8qy6v4qj/+15bPAca7q/DXlp 5t3TVnQUcrCIMbBICumyBIioNS3ofHigusPsv7AzGFlAhnCwMUpABNRTmRkaDHddCU8yMZxd/3P gvhV4Vv3LHgtcIQ7v3VD1saehdd1pRkZJmms4dv56PusdM6ol9PcmqtV2fn++Xb/5p32eduVeDk FdgA= X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Well, they are read only. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Jiaxun Yang --- v3: Fix an indentation error (philmd) --- arch/mips/include/asm/asm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h index 2e99450f4228..0c87a7de2a7d 100644 --- a/arch/mips/include/asm/asm.h +++ b/arch/mips/include/asm/asm.h @@ -94,7 +94,7 @@ symbol: .insn symbol = value #define TEXT(msg) \ - .pushsection .data; \ + .pushsection .rodata.str; \ 8: .asciiz msg; \ .popsection; From patchwork Thu May 2 09:59:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 13651521 Received: from fout6-smtp.messagingengine.com (fout6-smtp.messagingengine.com [103.168.172.149]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 144E856751; Thu, 2 May 2024 09:59:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Thu, 2 May 2024 05:59:37 -0400 (EDT) From: Jiaxun Yang Date: Thu, 02 May 2024 10:59:29 +0100 Subject: [PATCH v3 2/9] MIPS: debug: Implement low-level debugging functions Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240502-mips_debug_ll-v3-2-3b61f30e484c@flygoat.com> References: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> In-Reply-To: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=10072; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=z1I1Eil+iyx1ALzhMIx928ykez3/WVOdYbUDQhrgqqM=; b=owGbwMvMwCHmXMhTe71c8zDjabUkhjTjFPYzPwqVe9n7cjU0Hx/Pkha7W5PcVM96jLV21uSvm g43WkU7SlkYxDgYZMUUWUIElPo2NF5ccP1B1h+YOaxMIEMYuDgFYCIfshj+WRz4dXzBynRf554z Uh3PO6rLL965Hrx2j8m380o/Uo54dzAy/BdLnmlT8qrk4TTJAvFn866s9shTOhT0jyvhyaZbuQu vcwAA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Currently we have three sets of early debugging functions for MIPS: zboot putc/puts, cps-vec-ns16550, and prom_putc. This is a attempt to bring them all to one by providing a interface similar to arm's debug_ll, which is very portable and allows you to support new platforms easily. Two examples of output interfaces are provided, including 8250 uart and MIPS UHI semihosting, which already covered most of the platforms. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Jiaxun Yang --- arch/mips/Kconfig.debug | 80 +++++++++++++++++++++++++ arch/mips/include/debug/8250.S | 60 +++++++++++++++++++ arch/mips/include/debug/uhi.S | 48 +++++++++++++++ arch/mips/kernel/Makefile | 2 + arch/mips/kernel/debug.S | 130 +++++++++++++++++++++++++++++++++++++++++ 5 files changed, 320 insertions(+) diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index f4ae7900fcd3..892e31804982 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -164,3 +164,83 @@ config MIPS_CPS_NS16550_WIDTH lb/sb instructions. endif # MIPS_CPS_NS16550_BOOL + +# These options are only for real kernel hackers who want to get their hands dirty. +config DEBUG_LL + bool "Kernel low-level debugging functions (read help!)" + depends on DEBUG_KERNEL + help + Say Y here to include definitions of printascii, printch, printhex + in the kernel. This is helpful if you are debugging code that + executes before the console is initialized. + + Note that selecting this option will limit the kernel to a single + UART or semihosting definition, as specified below. Attempting to + boot the kernel image on a different platform *will not work*, so + this option should not be enabled for kernels that are intended to + be portable. + +choice + prompt "Kernel low-level debugging port" + depends on DEBUG_LL + + config DEBUG_MIPS_UHI + bool "Kernel low-level debugging via UHI semihosting" + help + Say Y here if you want kernel low-level debugging support + via MIPS UHI semihosting. + + config DEBUG_LL_UART_8250 + bool "Kernel low-level debugging via 8250 UART" + select DEBUG_LL_UART + help + Say Y here if you wish the debug print routes to direct + their output to an 8250 UART. You can use this option + to provide the parameters for the 8250 UART rather than + selecting one of the platform specific options below if + you know the parameters for the port. + +endchoice + +config DEBUG_LL_INCLUDE + string + default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250 + default "debug/uhi.S" if DEBUG_MIPS_UHI + default "debug-macro.S" + +# Compatibility options for 8250 +config DEBUG_UART_8250 + bool + select DEBUG_LL_UART + +config DEBUG_LL_UART + bool + +config DEBUG_UART_FLOW_CONTROL + bool "Enable flow control (CTS) for the debug UART" + depends on DEBUG_LL_UART + default n + help + Some UART ports are connected to terminals that will use modem + control signals to indicate whether they are ready to receive text. + In practice this means that the terminal is asserting the special + control signal CTS (Clear To Send). If your debug UART supports + this and your debug terminal will require it, enable this option. + +config DEBUG_UART_PHYS + hex "Physical base address of debug UART" + depends on DEBUG_LL_UART + help + This is the physical base address of the debug UART. It must be + accessible from unmapped kernel space (i.e. KSEG1 for 32bit kernels + or XKPHYS for 64bit kernels). + +config DEBUG_UART_8250_SHIFT + int "Register offset shift for the 8250 debug UART" + depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250 + default 2 + +config DEBUG_UART_8250_WIDTH + int "Register width for the 8250 debug UART" + depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250 + default 1 diff --git a/arch/mips/include/debug/8250.S b/arch/mips/include/debug/8250.S new file mode 100644 index 000000000000..f8608d3e271a --- /dev/null +++ b/arch/mips/include/debug/8250.S @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023, Jiaxun Yang + * MIPS Low level debug include file for 8250 UART + */ + +#include +#include +#include + +#define DEBUG_LL_UART + +#define UART_BASE CKSEG1ADDR(CONFIG_DEBUG_UART_PHYS) + +#define UART_TX_OFS (UART_TX << CONFIG_DEBUG_UART_8250_SHIFT) +#define UART_LSR_OFS (UART_LSR << CONFIG_DEBUG_UART_8250_SHIFT) +#define UART_MSR_OFS (UART_MSR << CONFIG_DEBUG_UART_8250_SHIFT) + +#if CONFIG_DEBUG_UART_8250_WIDTH == 1 +# define UART_L lb +# define UART_S sb +#elif CONFIG_DEBUG_UART_8250_WIDTH == 2 +# define UART_L lh +# define UART_S sh +#elif CONFIG_DEBUG_UART_8250_WIDTH == 4 +# define UART_L lw +# define UART_S sw +#elif defined(CONFIG_64BIT) && CONFIG_DEBUG_UART_8250_WIDTH == 8 +# define UART_L ld +# define UART_S sd +#else +# define UART_L lb +# define UART_S sb +#endif + + .macro addruart,rd,rx + PTR_LA \rd, UART_BASE + .endm + + .macro senduart,rd,rx + UART_S \rd, UART_TX_OFS(\rx) + .endm + + .macro busyuart,rd,rx +1002: + UART_L \rd, UART_LSR_OFS(\rx) + andi \rd, \rd, (UART_LSR_TEMT | UART_LSR_THRE) + xori \rd, (UART_LSR_TEMT | UART_LSR_THRE) + bnez \rd, 1002b + .endm + + .macro waituarttxrdy,rd,rx + .endm + + .macro waituartcts,rd,rx +1001: + UART_L \rd, UART_MSR_OFS(\rx) + andi \rd, UART_MSR_CTS + beqz \rd, 1001b + .endm diff --git a/arch/mips/include/debug/uhi.S b/arch/mips/include/debug/uhi.S new file mode 100644 index 000000000000..20554523e151 --- /dev/null +++ b/arch/mips/include/debug/uhi.S @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023, Jiaxun Yang + * MIPS Low level debug include file for UHI semihosting + */ + +#include + +/** + * printch() - write a character to UHI Plog + * @a0: ASCII character to write + * + * clobbers v0, t9 + * UHI may clobber k0, k1 + */ + .pushsection .bss +charbuf_addr: .space 8 + .popsection +NESTED(printch, 0, ra) + PTR_LI t9, charbuf_addr + sb a0, 0(t9) + sb zero, 1(t9) + move a0, t9 + li v0, 0x1 + li t9, 13 /* plog */ + .set push + .set MIPS_ISA_LEVEL_RAW + sdbbp 1 + .set pop + jr ra + END(printch) + +/** + * printascii() - write a string to UHI Plog + * @a0: pointer to NULL-terminated ASCII string + * + * clobbers v0 + * UHI may clobber k0, k1 + */ +NESTED(printascii, 0, ra) + li v0, 0x1 + li t9, 13 /* plog */ + .set push + .set MIPS_ISA_LEVEL_RAW + sdbbp 1 + .set pop + jr ra + END(printascii) diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index ecf3278a32f7..bfac35a64ae5 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -78,6 +78,8 @@ obj-$(CONFIG_MIPS32_COMPAT) += linux32.o ptrace32.o signal32.o obj-$(CONFIG_MIPS32_N32) += scall64-n32.o signal_n32.o obj-$(CONFIG_MIPS32_O32) += scall64-o32.o signal_o32.o +obj-$(CONFIG_DEBUG_LL) += debug.o + obj-$(CONFIG_KGDB) += kgdb.o obj-$(CONFIG_PROC_FS) += proc.o obj-$(CONFIG_MAGIC_SYSRQ) += sysrq.o diff --git a/arch/mips/kernel/debug.S b/arch/mips/kernel/debug.S new file mode 100644 index 000000000000..a78d9a55bb35 --- /dev/null +++ b/arch/mips/kernel/debug.S @@ -0,0 +1,130 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023, Jiaxun Yang + * MIPS Low level debug routines + * + * Note: Those functions are designed carefully to only clobber + * t0, t1, t9, so they can be used without stack. Also they are + * position independent to be called from any place. + */ + +#include + +#include +#include +#include +#include +#include + +#include CONFIG_DEBUG_LL_INCLUDE + +#ifdef DEBUG_LL_UART +/** + * printch() - write a character to the UART + * @a0: ASCII character to write + * + * clobbers t0, t9 + */ +NESTED(printch, 0, ra) + addruart t9, t0 +#ifdef CONFIG_DEBUG_UART_FLOW_CONTROL + waituartcts t0, t9 +#endif + waituarttxrdy t0, t9 + senduart a0, t9 + busyuart t0, t9 + jr ra + END(printch) + +/** + * printascii() - write a string to the UART + * @a0: pointer to NULL-terminated ASCII string + * + * clobbers t0, t1, t9 + * + * Write a null-terminated ASCII string to the UART. + */ +NESTED(printascii, 0, ra) + addruart t9, t0 + move t1, a0 + +1: lb a0, 0(t1) + beqz a0, 2f +#ifdef CONFIG_DEBUG_UART_FLOW_CONTROL + waituartcts t0, t9 +#endif + waituarttxrdy t0, t9 + senduart a0, t9 + busyuart t0, t9 + PTR_ADDIU t1, t1, 1 + b 1b + +2: jr ra + END(printascii) +#endif /* DEBUG_LL_UART */ + +/** + * printhex() - write n byte hex value to the UART + * @a0: Hex value to write to the UART + * @a1: number of bytes to write to the UART + * + * clobbers: t0, t1, t9 + */ + + .pushsection .bss +hexbuf_addr: .space 32 + .popsection + +NESTED(printhex, 0, ra) + PTR_LA t9, hexbuf_addr + sll a1, a1, 1 +1: + subu t0, a1, 1 + sll t0, t0, 2 + LONG_SRLV t0, a0, t0 + andi t0, t0, 0xf + li t1, '0' + blt t0, 10, 2f + li t1, 'a' + addiu t0, t0, -10 +2: + addu t1, t1, t0 + sb t1, 0(t9) + PTR_ADDIU t9, t9, 1 + addiu a1, a1, -1 + bnez a1, 1b + sb zero, 0(t9) + + move a1, ra + PTR_LA a0, hexbuf_addr + bal printascii + + jr a1 + END(printhex) + +NESTED(printhex1, 0, ra) + li a1, 1 + b printhex + END(printhex1) + +NESTED(printhex2, 0, ra) + li a1, 2 + b printhex + END(printhex2) + +NESTED(printhex4, 0, ra) + li a1, 4 + b printhex + END(printhex4) + +#ifdef CONFIG_64BIT +NESTED(printhex8, 0, ra) + li a1, 8 + b printhex + END(printhex8) +#endif + +NESTED(printhexl, 0, ra) + li a1, PTRSIZE + b printhex + END(printhexl) From patchwork Thu May 2 09:59:30 2024 Content-Type: text/plain; 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Thu, 2 May 2024 05:59:38 -0400 (EDT) From: Jiaxun Yang Date: Thu, 02 May 2024 10:59:30 +0100 Subject: [PATCH v3 3/9] MIPS: debug: Hook up DEBUG_LL with early printk Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240502-mips_debug_ll-v3-3-3b61f30e484c@flygoat.com> References: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> In-Reply-To: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1810; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=w9xlwGFJnIHWa5fchmk4oq7/y7T06fED6QHXHCyosCc=; b=owGbwMvMwCHmXMhTe71c8zDjabUkhjTjFHb/xoM9/89encH7fc2ZXyaXliue1+Z513eU4+2h8 n+FJTtZOkpZGMQ4GGTFFFlCBJT6NjReXHD9QdYfmDmsTCBDGLg4BWAibdWMDFN/fP348Ups7jle 3gl+3GrpvdmWAVP3tQfnc+4+lt73z4CRYV3PRN4EsZTnoverY5mXTf7Yxb3h0Gvvx5YGIrm7jY3 N+AE= X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Output earlyprintk to low-level debug functions when it's available. DEBUG_LL takes priority over platform earlyprintk because people must know what are they doing when they are trying to enable DEBUG_LL. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Jiaxun Yang --- arch/mips/Kconfig.debug | 2 +- arch/mips/kernel/early_printk.c | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index 892e31804982..6ef42edc7d67 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -2,7 +2,7 @@ config EARLY_PRINTK bool "Early printk" if EXPERT - depends on SYS_HAS_EARLY_PRINTK + depends on SYS_HAS_EARLY_PRINTK || DEBUG_LL default y help This option enables special console drivers which allow the kernel diff --git a/arch/mips/kernel/early_printk.c b/arch/mips/kernel/early_printk.c index 4a1647ddfbd9..c3f3b0a930f0 100644 --- a/arch/mips/kernel/early_printk.c +++ b/arch/mips/kernel/early_printk.c @@ -14,6 +14,24 @@ #include +#ifdef CONFIG_DEBUG_LL +extern void printascii(const char *); + +static void early_console_write(struct console *con, const char *s, unsigned n) +{ + char buf[128]; + + while (n) { + unsigned int l = min(n, sizeof(buf)-1); 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Thu, 2 May 2024 05:59:40 -0400 (EDT) From: Jiaxun Yang Date: Thu, 02 May 2024 10:59:31 +0100 Subject: [PATCH v3 4/9] MIPS: debug: Provide an early exception vector for low-level debugging Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240502-mips_debug_ll-v3-4-3b61f30e484c@flygoat.com> References: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> In-Reply-To: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6831; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=jlhEoHOSgN8X4mEVHK3jfYatKD2DB6Py/q55teajpWU=; b=owGbwMvMwCHmXMhTe71c8zDjabUkhjTjFPbNsYx2rmXc2rOPHO+buCU0538Kw8WetZJ75hZcm rHuXG1aRykLgxgHg6yYIkuIgFLfhsaLC64/yPoDM4eVCWQIAxenAExk1xuG/8Enb/A3yCruWDwv Nzgkxcgo5G32/TMRa6ZxGhzj+3Y/jovhn4kPx+HQV+c5bs1LqlC4rrZ7VeFRY74bn069n+rN7bC nkAUA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 This is helpful for debugging of early boot crash when exceptions happens before trap_init(), or for debugging SMP bringup code. It will install exception handler very early on kernel_entry by setting ebase or copy itself to start of CKSEG0, and print off exception vectors and other status registers like: Low level exception: ffffffff8011e180 GlobalNumber: 0x00000000 EBase: 0xffffffff8011e000 Xcontext: 0x0000000000000000 Cause: 0x0000000c Status: 0x14000082 EPC: 0xffffffff80d324e0 BadVAddr: 0x0000000000000000 BadInstr: 0xac000000 Signed-off-by: Jiaxun Yang --- arch/mips/Kconfig.debug | 9 ++ arch/mips/kernel/Makefile | 1 + arch/mips/kernel/debug-vec.S | 194 +++++++++++++++++++++++++++++++++++++++++++ arch/mips/kernel/head.S | 4 + 4 files changed, 208 insertions(+) diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index 6ef42edc7d67..323ad3ec643b 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -180,6 +180,15 @@ config DEBUG_LL this option should not be enabled for kernels that are intended to be portable. +config DEBUG_LL_EXCEPT + bool "Kernel low-level debugging of exceptions" + depends on DEBUG_LL + help + Say Y here to enable debugging prints for low-level exceptions. + This is helpful if you are debugging a early boot crash when + exceptions happens before trap_init(), or if you are debugging + SMP bringup code. + choice prompt "Kernel low-level debugging port" depends on DEBUG_LL diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index bfac35a64ae5..6641c3370e68 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -79,6 +79,7 @@ obj-$(CONFIG_MIPS32_N32) += scall64-n32.o signal_n32.o obj-$(CONFIG_MIPS32_O32) += scall64-o32.o signal_o32.o obj-$(CONFIG_DEBUG_LL) += debug.o +obj-$(CONFIG_DEBUG_LL_EXCEPT) += debug-vec.o obj-$(CONFIG_KGDB) += kgdb.o obj-$(CONFIG_PROC_FS) += proc.o diff --git a/arch/mips/kernel/debug-vec.S b/arch/mips/kernel/debug-vec.S new file mode 100644 index 000000000000..4530bf3d5b75 --- /dev/null +++ b/arch/mips/kernel/debug-vec.S @@ -0,0 +1,194 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023, Jiaxun Yang + * MIPS Low level exception vectors and handler + */ + +#include +#include +#include +#include + + +.balign 0x1000 +LEAF(debug_ll_vecs) + .set push + .set noreorder + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x80 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x100 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x180 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x200 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x280 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x300 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x380 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x400 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + +.org 0x480 + move a0, zero + PTR_LA t9, debug_ll_exception + jalr t9 + nop + b . + nop + + .set pop +END(debug_ll_vecs) + + +/** + * debug_ll_exception() - dump relevant exception state to LL outputs + * @a0: pointer to NULL-terminated ASCII string naming the exception + * + * If a0 is NULL, it will print out exception vector number calculated + * from the ra insted. This is useful for debugging exceptions that + * happen before the exception handler is set up, or routed from BEV. + */ +LEAF(debug_ll_exception) + move k0, ra + move k1, a0 + PTR_LA t3, printascii + + PTR_LA a0, str_newline + jalr t3 /* Call printascii */ + PTR_LA a0, str_exp + jalr t3 /* Call printascii */ + beqz k1, 1f + move a0, k1 + jalr t3 /* Call printascii */ + b 2f +1: + PTR_SRL a0, k0, 7 + PTR_SLL a0, a0, 7 + PTR_LA t2, printhexl + jalr t2 +2: + PTR_LA a0, str_newline + jalr t3 /* Call printascii */ + PTR_LA a0, str_newline + jalr t3 /* Call printascii */ + +#define DUMP_COP0_REG(reg, name, sz, _mfc0) \ + PTR_LA a0, 8f; \ + jalr t3; \ + _mfc0 a0, reg; \ + PTR_LA t2, printhex##sz; \ + jalr t2; \ + PTR_LA a0, str_newline; \ + jalr t3; \ + TEXT(name) + +#if defined(CONFIG_SMP) && defined(CONFIG_CPU_MIPSR6) + DUMP_COP0_REG(CP0_GLOBALNUMBER, "GlobalNumber: 0x", 4, mfc0) +#endif +#if MIPS_ISA_REV >= 2 + DUMP_COP0_REG(CP0_EBASE, "EBase: 0x", l, MFC0) +#endif +#ifdef CONFIG_64BIT + DUMP_COP0_REG(CP0_XCONTEXT, "Xcontext: 0x", 8, dmfc0) +#else + DUMP_COP0_REG(CP0_CONTEXT, "Context: 0x", 4, mfc0) +#endif + DUMP_COP0_REG(CP0_CAUSE, "Cause: 0x", 4, mfc0) + DUMP_COP0_REG(CP0_STATUS, "Status: 0x", 4, mfc0) + DUMP_COP0_REG(CP0_EPC, "EPC: 0x", l, MFC0) + DUMP_COP0_REG(CP0_BADVADDR, "BadVAddr: 0x", l, MFC0) +#if MIPS_ISA_REV >= 6 + DUMP_COP0_REG(CP0_BADINSTR, "BadInstr: 0x", 4, mfc0) +#endif + PTR_LA a0, str_newline + jalr t3 /* Call printascii */ + jr k0 + END(debug_ll_exception) + +.pushsection .rodata.str +str_exp: .asciiz "Low level exception: " +str_newline: .asciiz "\r\n" +.popsection + +NESTED(setup_debug_ll_exception, 0, ra) + PTR_LA t0, debug_ll_vecs +#if MIPS_ISA_REV >= 2 + /* Set ebase to debug_ll_vecs */ +#if defined (CONFIG_64BIT) && !defined(KBUILD_64BIT_SYM32) + ori t0, MIPS_EBASE_WG +#endif + MTC0 t0, CP0_EBASE +#else + /* Copy debug_ll_vecs to start of KSEG0 */ + PTR_LI t1, CKSEG0 + PTR_ADDIU t2, t0, 0x400 /* Only copy 0x400 as that is what reserved on old systems */ +copy_word: + PTR_LW t3, 0(t0) + PTR_SW t3, 0(t1) + PTR_ADDIU t0, t0, PTRSIZE + PTR_ADDIU t1, t1, PTRSIZE + PTR_BNE t0, t2, copy_word +#endif + /* Clear BEV bit in status register */ + mfc0 t0, CP0_STATUS + and t0, t0, ~ST0_BEV + mtc0 t0, CP0_STATUS + jr ra + END(setup_debug_ll_exception) diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S index b825ed4476c7..9be1c4ce6324 100644 --- a/arch/mips/kernel/head.S +++ b/arch/mips/kernel/head.S @@ -106,6 +106,10 @@ NESTED(kernel_entry, 16, sp) # kernel entry point LONG_S a2, fw_arg2 LONG_S a3, fw_arg3 +#ifdef CONFIG_DEBUG_LL_EXCEPT + jal setup_debug_ll_exception +#endif + MTC0 zero, CP0_CONTEXT # clear context register #ifdef CONFIG_64BIT MTC0 zero, CP0_XCONTEXT From patchwork Thu May 2 09:59:32 2024 Content-Type: text/plain; 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Thu, 2 May 2024 05:59:41 -0400 (EDT) From: Jiaxun Yang Date: Thu, 02 May 2024 10:59:32 +0100 Subject: [PATCH v3 5/9] MIPS: debug_ll: Add Kconfig symbols for some 8250 uarts Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240502-mips_debug_ll-v3-5-3b61f30e484c@flygoat.com> References: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> In-Reply-To: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3115; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=FOfpkZ1jw8FR3LMyDtmcF92PGea133W6fq2rKRby+wo=; b=owGbwMvMwCHmXMhTe71c8zDjabUkhjTjFHbl4qoZCadWVP6UKgsWY2fJ/X9BMnv76XUX3/Lva JWyMznaUcrCIMbBICumyBIioNS3ofHigusPsv7AzGFlAhnCwMUpABO5+J7hr8BXBokrQb/mFb4p lLnyPe9S6l7VQ59eLZhpU/aS/3n2ByaGf3oucvuqxUS5LHP+2b1ad0mNV/rU1OCUTKvyZt6z4oe WcwMA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Define platform symbols for all 8250 style uart type supported by zboot, plus Loongson-2K and boston. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Jiaxun Yang --- arch/mips/Kconfig.debug | 56 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index 323ad3ec643b..3609d298a9eb 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -209,6 +209,54 @@ choice selecting one of the platform specific options below if you know the parameters for the port. + config DEBUG_BOSTON_UART + bool "Kernel low-level debugging messages via Boston UART" + depends on MIPS_GENERIC_KERNEL + select DEBUG_UART_8250 + help + Say Y here if you want kernel low-level debugging support + on IMG Boston board. + + config DEBUG_MALTA_UART + bool "Kernel low-level debugging messages via malta UART" + depends on MIPS_MALTA + select DEBUG_UART_8250 + help + Say Y here if you want kernel low-level debugging support + on MTI malta board. + + config DEBUG_AR71XX_UART + bool "Kernel low-level debugging messages via AR71XX UART" + depends on ATH79 + select DEBUG_UART_8250 + help + Say Y here if you want kernel low-level debugging support + on AR71xx based platforms. + + config DEBUG_LOONGSON3_UART + bool "Kernel low-level debugging messages via Loongson-3 UART" + depends on MACH_LOONGSON64 + select DEBUG_UART_8250 + help + Say Y here if you want kernel low-level debugging support + on Loongson-3 systems. + + config DEBUG_LOONGSON2K_UART + bool "Kernel low-level debugging messages via Loongson 2K UART" + depends on MACH_LOONGSON64 + select DEBUG_UART_8250 + help + Say Y here if you want kernel low-level debugging support + on Loongson-2K SoCs. + + config DEBUG_INGENIC_UART + bool "Kernel low-level debugging messages via Ingenic UART" + depends on MACH_INGENIC_SOC + select DEBUG_UART_8250 + help + Say Y here if you want kernel low-level debugging support + on uart0 of Ingenic SoCs. + endchoice config DEBUG_LL_INCLUDE @@ -239,6 +287,12 @@ config DEBUG_UART_FLOW_CONTROL config DEBUG_UART_PHYS hex "Physical base address of debug UART" depends on DEBUG_LL_UART + default 0x17ffe000 if DEBUG_BOSTON_UART + default 0x1fd003f8 if DEBUG_MALTA_UART + default 0x18020000 if DEBUG_AR71XX_UART + default 0x1fd003f8 if DEBUG_LOONGSON3_UART + default 0x1fe00000 if DEBUG_LOONGSON2K_UART + default 0x10030000 if DEBUG_INGENIC_UART help This is the physical base address of the debug UART. It must be accessible from unmapped kernel space (i.e. KSEG1 for 32bit kernels @@ -247,6 +301,8 @@ config DEBUG_UART_PHYS config DEBUG_UART_8250_SHIFT int "Register offset shift for the 8250 debug UART" depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250 + default 1 if DEBUG_MALTA_UART || DEBUG_LOONGSON3_UART || \ + DEBUG_LOONGSON2K_UART default 2 config DEBUG_UART_8250_WIDTH From patchwork Thu May 2 09:59:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 13651525 Received: from fout6-smtp.messagingengine.com (fout6-smtp.messagingengine.com [103.168.172.149]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC16A59162; Thu, 2 May 2024 09:59:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=103.168.172.149 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Thu, 2 May 2024 05:59:42 -0400 (EDT) From: Jiaxun Yang Date: Thu, 02 May 2024 10:59:33 +0100 Subject: [PATCH v3 6/9] MIPS: debug_ll: Implement support for Alchemy uarts Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240502-mips_debug_ll-v3-6-3b61f30e484c@flygoat.com> References: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> In-Reply-To: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2825; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=dssAdswcFICvMOQneWOD2aRjHwqfi0CLy3Px0yTWsrA=; b=owGbwMvMwCHmXMhTe71c8zDjabUkhjTjFHZ2AZXdC2Z9Te2ZGbej6vPVS46S926c3ZCxZdcyJ nbJFVm7OkpZGMQ4GGTFFFlCBJT6NjReXHD9QdYfmDmsTCBDGLg4BWAi7/8x/LO1Xe0Sdach+ozv FRWrwo3t+Yf5MlOi98T9kGu3n5/1zI+RYdsppQ/PkhS2xtQ6JaUy7dtlrXWQ++NrucdXRb+fNGV 6zwEA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Alchemy uart is a 8250 derivative that requires some special care on barriers and readys, also they have a wired register layout. Implement it as a special include. Signed-off-by: Jiaxun Yang --- arch/mips/Kconfig.debug | 10 +++++++++ arch/mips/include/debug/alchemy.S | 46 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 56 insertions(+) diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index 3609d298a9eb..aef116058654 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -257,11 +257,20 @@ choice Say Y here if you want kernel low-level debugging support on uart0 of Ingenic SoCs. + config DEBUG_ALCHEMY_UART + bool "Kernel low-level debugging messages via Alchemy UART" + depends on MIPS_ALCHEMY + select DEBUG_LL_UART + help + Say Y here if you want kernel low-level debugging support + on uart of alchemy SoCs. + endchoice config DEBUG_LL_INCLUDE string default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250 + default "debug/alchemy.S" if DEBUG_ALCHEMY_UART default "debug/uhi.S" if DEBUG_MIPS_UHI default "debug-macro.S" @@ -293,6 +302,7 @@ config DEBUG_UART_PHYS default 0x1fd003f8 if DEBUG_LOONGSON3_UART default 0x1fe00000 if DEBUG_LOONGSON2K_UART default 0x10030000 if DEBUG_INGENIC_UART + default 0x11100000 if DEBUG_ALCHEMY_UART help This is the physical base address of the debug UART. It must be accessible from unmapped kernel space (i.e. KSEG1 for 32bit kernels diff --git a/arch/mips/include/debug/alchemy.S b/arch/mips/include/debug/alchemy.S new file mode 100644 index 000000000000..933efc6e828c --- /dev/null +++ b/arch/mips/include/debug/alchemy.S @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023, Jiaxun Yang + * MIPS Low level debug include file for Au1xxx UART + * Dereived from drivers/tty/serial/8250/8250_rt288x.c + */ + +#include +#include +#include + +#define DEBUG_LL_UART + +#define UART_BASE CKSEG1ADDR(CONFIG_DEBUG_UART_PHYS) + +#define UART_TX_OFS (1 << 2) +#define UART_LSR_OFS (7 << 2) + +# define UART_L lw +# define UART_S sw + + .macro addruart,rd,rx + PTR_LA \rd, UART_BASE + .endm + + .macro senduart,rd,rx + UART_S \rd, UART_TX_OFS(\rx) + sync /* wmb */ + .endm + + .macro busyuart,rd,rx +1002: + UART_L \rd, UART_LSR_OFS(\rx) + andi \rd, \rd, (UART_LSR_TEMT | UART_LSR_THRE) + xori \rd, (UART_LSR_TEMT | UART_LSR_THRE) + sync /* cpu_relax */ + bnez \rd, 1002b + .endm + + .macro waituarttxrdy,rd,rx + busyuart \rd, \rx + .endm + + /* Au1xxx has no MSR */ + .macro waituartcts,rd,rx + .endm From patchwork Thu May 2 09:59:34 2024 Content-Type: text/plain; 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Thu, 2 May 2024 05:59:43 -0400 (EDT) From: Jiaxun Yang Date: Thu, 02 May 2024 10:59:34 +0100 Subject: [PATCH v3 7/9] MIPS: debug_ll: Implement support for AR933X uarts Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240502-mips_debug_ll-v3-7-3b61f30e484c@flygoat.com> References: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> In-Reply-To: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2449; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=7F+0NOYc+OjzTTyACC9ErsZ3xLNN6M7QVx5gFrlMcZg=; b=owGbwMvMwCHmXMhTe71c8zDjabUkhjTjFPbdD07naCTVSFaVB/Clvb4tvXP+Y5sZLHXGWs8zN Lem/drbUcrCIMbBICumyBIioNS3ofHigusPsv7AzGFlAhnCwMUpABPZ84jhf5jXGa6NtufELu1b NUnx8k/Z51JFt9tWX+4+w/vhf+T8gBUM/8zbT7Ok5vO4Fy4P3XBpUZOV7Lv9Fwx9s8rr2L77bBO oZQMA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Implement support for AR933X uarts which has it's own register definition. Signed-off-by: Jiaxun Yang --- arch/mips/Kconfig.debug | 9 +++++++++ arch/mips/include/debug/ar933x.S | 41 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 50 insertions(+) diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index aef116058654..a6687c503c34 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -265,6 +265,14 @@ choice Say Y here if you want kernel low-level debugging support on uart of alchemy SoCs. + config DEBUG_AR933X_UART + bool "Kernel low-level debugging messages via Alchemy UART" + depends on MIPS_ALCHEMY + select DEBUG_LL_UART + help + Say Y here if you want kernel low-level debugging support + on uart of AR933X SoCs. + endchoice config DEBUG_LL_INCLUDE @@ -303,6 +311,7 @@ config DEBUG_UART_PHYS default 0x1fe00000 if DEBUG_LOONGSON2K_UART default 0x10030000 if DEBUG_INGENIC_UART default 0x11100000 if DEBUG_ALCHEMY_UART + default 0x18020000 if DEBUG_AR933X_UART help This is the physical base address of the debug UART. It must be accessible from unmapped kernel space (i.e. KSEG1 for 32bit kernels diff --git a/arch/mips/include/debug/ar933x.S b/arch/mips/include/debug/ar933x.S new file mode 100644 index 000000000000..1a0449082080 --- /dev/null +++ b/arch/mips/include/debug/ar933x.S @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023, Jiaxun Yang + * MIPS Low level debug include file for ar933x UART + */ + +#include +#include +#include + +#define DEBUG_LL_UART + +#define UART_BASE CKSEG1ADDR(CONFIG_DEBUG_UART_PHYS) + +# define UART_L lw +# define UART_S sw + + .macro addruart,rd,rx + PTR_LA \rd, UART_BASE + .endm + + .macro senduart,rd,rx + UART_S \rd, AR933X_UART_DATA_REG(\rx) + .endm + + /* CTS and RDY are handled by AR933X_UART_DATA_TX_CSR as well */ + .macro busyuart,rd,rx +1002: + UART_L \rd, AR933X_UART_DATA_REG(\rx) + andi \rd, \rd, (AR933X_UART_DATA_TX_CSR) + xori \rd, (AR933X_UART_DATA_TX_CSR) + bnez \rd, 1002b + .endm + + .macro waituarttxrdy,rd,rx + busyuart \rd, \rx + .endm + + .macro waituartcts,rd,rx + busyuart \rd, \rx + .endm From patchwork Thu May 2 09:59:35 2024 Content-Type: text/plain; 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Thu, 2 May 2024 05:59:44 -0400 (EDT) From: Jiaxun Yang Date: Thu, 02 May 2024 10:59:35 +0100 Subject: [PATCH v3 8/9] MIPS: zboot: Convert to use debug_ll facilities Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240502-mips_debug_ll-v3-8-3b61f30e484c@flygoat.com> References: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> In-Reply-To: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=10586; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=rHXlSGuBuAGOebwT6ljnZUR4A2ggQDC/gzRZSSvOH8k=; b=owGbwMvMwCHmXMhTe71c8zDjabUkhjTjFPbasOl7vvcfEXuySFHO/u5Rx/+rCpy9hQTfHOmYM Smp2+l5RykLgxgHg6yYIkuIgFLfhsaLC64/yPoDM4eVCWQIAxenAExkQx7DT8Ynwq4PlW+fZXrh z6q+801qzhLVK5EKy78kBG36uWRfyQ5Gho0OLydsYtoSZt5w4fvau1usr1ucvhx92y5F1Nkjsfd oJBsA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Since now debug_ll facilities can cover all platforms supported by zboot debug print, and it provides extra capability on debugging exceptions, switch zboot to use those facilities. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Jiaxun Yang --- arch/mips/Kconfig | 12 ++------ arch/mips/Kconfig.debug | 46 +++++++++++++----------------- arch/mips/boot/compressed/Makefile | 9 ++---- arch/mips/boot/compressed/dbg.c | 39 ------------------------- arch/mips/boot/compressed/debug-vec.S | 3 ++ arch/mips/boot/compressed/debug.S | 3 ++ arch/mips/boot/compressed/decompress.h | 8 +++--- arch/mips/boot/compressed/head.S | 6 ++++ arch/mips/boot/compressed/uart-16550.c | 49 -------------------------------- arch/mips/boot/compressed/uart-alchemy.c | 9 ------ arch/mips/boot/compressed/uart-ath79.c | 2 -- arch/mips/boot/compressed/uart-prom.c | 9 ------ 12 files changed, 39 insertions(+), 156 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 06ef440d16ce..6729bf1d158d 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -240,7 +240,7 @@ config ATH79 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_MIPS16 - select SYS_SUPPORTS_ZBOOT_UART_PROM + select SYS_SUPPORTS_ZBOOT select USE_OF select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM help @@ -422,7 +422,7 @@ config MACH_INGENIC_SOC select MIPS_GENERIC select MACH_INGENIC select MACH_GENERIC_CORE - select SYS_SUPPORTS_ZBOOT_UART16550 + select SYS_SUPPORTS_ZBOOT select CPU_SUPPORTS_CPUFREQ select MIPS_EXTERNAL_TIMER @@ -1792,14 +1792,6 @@ config SYS_SUPPORTS_ZBOOT select HAVE_KERNEL_XZ select HAVE_KERNEL_ZSTD -config SYS_SUPPORTS_ZBOOT_UART16550 - bool - select SYS_SUPPORTS_ZBOOT - -config SYS_SUPPORTS_ZBOOT_UART_PROM - bool - select SYS_SUPPORTS_ZBOOT - config CPU_LOONGSON2EF bool select CPU_SUPPORTS_32BIT_KERNEL diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index a6687c503c34..0ce6d24d05b3 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -79,33 +79,6 @@ config SB1XXX_CORELIS Select compile flags that produce code that can be processed by the Corelis mksym utility and UDB Emulator. -config DEBUG_ZBOOT - bool "Enable compressed kernel support debugging" - depends on DEBUG_KERNEL && SYS_SUPPORTS_ZBOOT - default n - help - If you want to add compressed kernel support to a new board, and the - board supports uart16550 compatible serial port, please select - SYS_SUPPORTS_ZBOOT_UART16550 for your board and enable this option to - debug it. - - If your board doesn't support uart16550 compatible serial port, you - can try to select SYS_SUPPORTS_ZBOOT and use the other methods to - debug it. for example, add a new serial port support just as - arch/mips/boot/compressed/uart-16550.c does. - - After the compressed kernel support works, please disable this option - to reduce the kernel image size and speed up the booting procedure a - little. - -config ZBOOT_INGENIC_UART - int "UART to use for compressed kernel debugging" - depends on DEBUG_ZBOOT && MACH_INGENIC_SOC - default 0 - range 0 4 - help - Specify the UART that should be used for compressed kernel debugging. - config SPINLOCK_TEST bool "Enable spinlock timing tests in debugfs" depends on DEBUG_FS @@ -328,3 +301,22 @@ config DEBUG_UART_8250_WIDTH int "Register width for the 8250 debug UART" depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250 default 1 + +config DEBUG_ZBOOT + bool "Enable compressed kernel debugging via DEBUG_LL output" + depends on DEBUG_LL && SYS_SUPPORTS_ZBOOT + help + Say Y here if you want to enable debugging of a compressed kernel + via the DEBUG_LL output. This is useful if you are debugging + decompressor issues. + + If unsure, say N. + +config DEBUG_ZBOOT_EXCEPT + bool "Enable compressed kernel debugging of exceptions" + depends on DEBUG_ZBOOT + help + Say Y here if you want to enable debugging of exceptions happen + during decompression of a compressed kernel via the DEBUG_LL output. + + If unsure, say N. diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile index 6cc28173bee8..78c65db8dd04 100644 --- a/arch/mips/boot/compressed/Makefile +++ b/arch/mips/boot/compressed/Makefile @@ -43,13 +43,8 @@ KCSAN_SANITIZE := n # decompressor objects (linked with vmlinuz) vmlinuzobjs-y := $(obj)/head.o $(obj)/decompress.o $(obj)/string.o $(obj)/bswapsi.o -ifdef CONFIG_DEBUG_ZBOOT -vmlinuzobjs-$(CONFIG_DEBUG_ZBOOT) += $(obj)/dbg.o -vmlinuzobjs-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART16550) += $(obj)/uart-16550.o -vmlinuzobjs-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM) += $(obj)/uart-prom.o -vmlinuzobjs-$(CONFIG_MIPS_ALCHEMY) += $(obj)/uart-alchemy.o -vmlinuzobjs-$(CONFIG_ATH79) += $(obj)/uart-ath79.o -endif +vmlinuzobjs-$(CONFIG_DEBUG_ZBOOT) += $(obj)/debug.o +vmlinuzobjs-$(CONFIG_DEBUG_ZBOOT_EXCEPT) += $(obj)/debug-vec.o vmlinuzobjs-$(CONFIG_KERNEL_XZ) += $(obj)/ashldi3.o diff --git a/arch/mips/boot/compressed/dbg.c b/arch/mips/boot/compressed/dbg.c deleted file mode 100644 index 95405292accd..000000000000 --- a/arch/mips/boot/compressed/dbg.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * MIPS-specific debug support for pre-boot environment - * - * NOTE: putc() is board specific, if your board have a 16550 compatible uart, - * please select SYS_SUPPORTS_ZBOOT_UART16550 for your machine. otherwise, you - * need to implement your own putc(). - */ -#include -#include - -#include "decompress.h" - -void __weak putc(char c) -{ -} - -void puts(const char *s) -{ - char c; - while ((c = *s++) != '\0') { - putc(c); - if (c == '\n') - putc('\r'); - } -} - -void puthex(unsigned long long val) -{ - - unsigned char buf[10]; - int i; - for (i = 7; i >= 0; i--) { - buf[i] = "0123456789ABCDEF"[val & 0x0F]; - val >>= 4; - } - buf[8] = '\0'; - puts(buf); -} diff --git a/arch/mips/boot/compressed/debug-vec.S b/arch/mips/boot/compressed/debug-vec.S new file mode 100644 index 000000000000..e7bedb183da8 --- /dev/null +++ b/arch/mips/boot/compressed/debug-vec.S @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#include "../../kernel/debug-vec.S" diff --git a/arch/mips/boot/compressed/debug.S b/arch/mips/boot/compressed/debug.S new file mode 100644 index 000000000000..0cf3da958f7e --- /dev/null +++ b/arch/mips/boot/compressed/debug.S @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#include "../../kernel/debug.S" diff --git a/arch/mips/boot/compressed/decompress.h b/arch/mips/boot/compressed/decompress.h index 073b64593b3d..e375d50c71a0 100644 --- a/arch/mips/boot/compressed/decompress.h +++ b/arch/mips/boot/compressed/decompress.h @@ -7,11 +7,11 @@ extern unsigned char __image_begin[], __image_end[]; /* debug interfaces */ #ifdef CONFIG_DEBUG_ZBOOT -extern void putc(char c); -extern void puts(const char *s); -extern void puthex(unsigned long long val); +extern void printascii(const char *s); +extern void printhexl(unsigned long val); +#define puts(s) printascii(s) +#define puthex(val) printhexl(val) #else -#define putc(s) do {} while (0) #define puts(s) do {} while (0) #define puthex(val) do {} while (0) #endif diff --git a/arch/mips/boot/compressed/head.S b/arch/mips/boot/compressed/head.S index d237a834b85e..b05e9591d3af 100644 --- a/arch/mips/boot/compressed/head.S +++ b/arch/mips/boot/compressed/head.S @@ -22,6 +22,12 @@ move s2, a2 move s3, a3 +#ifdef CONFIG_DEBUG_ZBOOT_EXCEP + /* Set up the exception vector */ + PTR_LA t9, setup_debug_ll_exception + jalr t9 +#endif + /* Clear BSS */ PTR_LA a0, _edata PTR_LA a2, _end diff --git a/arch/mips/boot/compressed/uart-16550.c b/arch/mips/boot/compressed/uart-16550.c deleted file mode 100644 index db618e72a0c4..000000000000 --- a/arch/mips/boot/compressed/uart-16550.c +++ /dev/null @@ -1,49 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * 16550 compatible uart based serial debug support for zboot - */ - -#include -#include - -#include - -#include "decompress.h" - -#if defined(CONFIG_MACH_LOONGSON64) || defined(CONFIG_MIPS_MALTA) -#define UART_BASE 0x1fd003f8 -#define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset)) -#endif - -#ifdef CONFIG_MACH_INGENIC -#define INGENIC_UART_BASE_ADDR (0x10030000 + 0x1000 * CONFIG_ZBOOT_INGENIC_UART) -#define PORT(offset) (CKSEG1ADDR(INGENIC_UART_BASE_ADDR) + (4 * offset)) -#endif - -#ifndef IOTYPE -#define IOTYPE char -#endif - -#ifndef PORT -#error please define the serial port address for your own machine -#endif - -static inline unsigned int serial_in(int offset) -{ - return *((volatile IOTYPE *)PORT(offset)) & 0xFF; -} - -static inline void serial_out(int offset, int value) -{ - *((volatile IOTYPE *)PORT(offset)) = value & 0xFF; -} - -void putc(char c) -{ - int timeout = 1000000; - - while (((serial_in(UART_LSR) & UART_LSR_THRE) == 0) && (timeout-- > 0)) - ; - - serial_out(UART_TX, c); -} diff --git a/arch/mips/boot/compressed/uart-alchemy.c b/arch/mips/boot/compressed/uart-alchemy.c deleted file mode 100644 index 003967c084b3..000000000000 --- a/arch/mips/boot/compressed/uart-alchemy.c +++ /dev/null @@ -1,9 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include - -#include "decompress.h" - -void putc(char c) -{ - alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c); -} diff --git a/arch/mips/boot/compressed/uart-ath79.c b/arch/mips/boot/compressed/uart-ath79.c deleted file mode 100644 index d686820921be..000000000000 --- a/arch/mips/boot/compressed/uart-ath79.c +++ /dev/null @@ -1,2 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -#include "../../ath79/early_printk.c" diff --git a/arch/mips/boot/compressed/uart-prom.c b/arch/mips/boot/compressed/uart-prom.c deleted file mode 100644 index 5fa3b9945333..000000000000 --- a/arch/mips/boot/compressed/uart-prom.c +++ /dev/null @@ -1,9 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include - -#include "decompress.h" - -void putc(char c) -{ - prom_putchar(c); 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Thu, 2 May 2024 05:59:45 -0400 (EDT) From: Jiaxun Yang Date: Thu, 02 May 2024 10:59:36 +0100 Subject: [PATCH v3 9/9] MIPS: CPS: Convert to use debug_ll facilities Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240502-mips_debug_ll-v3-9-3b61f30e484c@flygoat.com> References: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> In-Reply-To: <20240502-mips_debug_ll-v3-0-3b61f30e484c@flygoat.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Jiaxun Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4592; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=6Hy0CE2gz3tjfXKjbIcr16YBCFXFhkTBeaOHPEwpw3w=; b=owGbwMvMwCHmXMhTe71c8zDjabUkhjTjFPbbx/ecLr1Tlh3wp1np5dTfqeuO87JdyLbJ/CEou ELgE0NmRykLgxgHg6yYIkuIgFLfhsaLC64/yPoDM4eVCWQIAxenAEzElYmR4frKqPp7Ox91dLdI 1v0XK08Ivfog72DtszXH4t/tso68rcTIML3S1Pu179q/DtaXllRwsb39Yy0wZ0t+w4QdOlkfgr+ EswMA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 debug_ll replaced CPS's custom NS16550 printing functions for dump early SMP bring-up exceptions. This will enable CPS debugging on more platforms and also reduce code duplication. All exception name strings are prefixed with CPS to help identification with regular low-level interrupts. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Jiaxun Yang --- arch/mips/Kconfig.debug | 52 +++++++++------------------------------------- arch/mips/kernel/Makefile | 1 - arch/mips/kernel/cps-vec.S | 16 +++++++------- 3 files changed, 18 insertions(+), 51 deletions(-) diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index 0ce6d24d05b3..caba00cd8a33 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -96,48 +96,6 @@ config SCACHE_DEBUGFS If unsure, say N. -menuconfig MIPS_CPS_NS16550_BOOL - bool "CPS SMP NS16550 UART output" - depends on MIPS_CPS - help - Output debug information via an ns16550 compatible UART if exceptions - occur early in the boot process of a secondary core. - -if MIPS_CPS_NS16550_BOOL - -config MIPS_CPS_NS16550 - def_bool MIPS_CPS_NS16550_BASE != 0 - -config MIPS_CPS_NS16550_BASE - hex "UART Base Address" - default 0x1b0003f8 if MIPS_MALTA - default 0 - help - The base address of the ns16550 compatible UART on which to output - debug information from the early stages of core startup. - - This is only used if non-zero. - -config MIPS_CPS_NS16550_SHIFT - int "UART Register Shift" - default 0 - help - The number of bits to shift ns16550 register indices by in order to - form their addresses. That is, log base 2 of the span between - adjacent ns16550 registers in the system. - -config MIPS_CPS_NS16550_WIDTH - int "UART Register Width" - default 1 - help - ns16550 registers width. UART registers IO access methods will be - selected in accordance with this parameter. By setting it to 1, 2 or - 4 UART registers will be accessed by means of lb/sb, lh/sh or lw/sw - instructions respectively. Any value not from that set activates - lb/sb instructions. - -endif # MIPS_CPS_NS16550_BOOL - # These options are only for real kernel hackers who want to get their hands dirty. config DEBUG_LL bool "Kernel low-level debugging functions (read help!)" @@ -320,3 +278,13 @@ config DEBUG_ZBOOT_EXCEPT during decompression of a compressed kernel via the DEBUG_LL output. If unsure, say N. + +config DEBUG_CPS_EXCEPT + bool "Enable kernel debugging of Coherent Processing System exceptions" + depends on MIPS_CPS && DEBUG_LL_EXCEPT + help + Say Y here if you want to enable debugging of exceptions happen + during SMP bring-up stages on processors witn MIPS Coherent Processing + System support. + + If unsure, say N. diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 6641c3370e68..94325c02cae2 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -59,7 +59,6 @@ obj-$(CONFIG_MIPS_MT) += mips-mt.o obj-$(CONFIG_MIPS_MT_FPAFF) += mips-mt-fpaff.o obj-$(CONFIG_MIPS_MT_SMP) += smp-mt.o obj-$(CONFIG_MIPS_CPS) += smp-cps.o cps-vec.o -obj-$(CONFIG_MIPS_CPS_NS16550) += cps-vec-ns16550.o obj-$(CONFIG_MIPS_SPRAM) += spram.o obj-$(CONFIG_MIPS_VPE_LOADER) += vpe.o diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S index f876309130ad..49d682b3b49a 100644 --- a/arch/mips/kernel/cps-vec.S +++ b/arch/mips/kernel/cps-vec.S @@ -33,15 +33,15 @@ # define STATUS_BITDEPS 0 #endif -#ifdef CONFIG_MIPS_CPS_NS16550 +#ifdef CONFIG_DEBUG_CPS_EXCEPT #define DUMP_EXCEP(name) \ PTR_LA a0, 8f; \ - jal mips_cps_bev_dump; \ + jal debug_ll_exception; \ nop; \ TEXT(name) -#else /* !CONFIG_MIPS_CPS_NS16550 */ +#else /* !CONFIG_DEBUG_CPS_EXCEPT */ #define DUMP_EXCEP(name) @@ -154,31 +154,31 @@ LEAF(mips_cps_core_boot) __INIT LEAF(excep_tlbfill) - DUMP_EXCEP("TLB Fill") + DUMP_EXCEP("CPS - TLB Fill") b . nop END(excep_tlbfill) LEAF(excep_xtlbfill) - DUMP_EXCEP("XTLB Fill") + DUMP_EXCEP("CPS - XTLB Fill") b . nop END(excep_xtlbfill) LEAF(excep_cache) - DUMP_EXCEP("Cache") + DUMP_EXCEP("CPS - Cache") b . nop END(excep_cache) LEAF(excep_genex) - DUMP_EXCEP("General") + DUMP_EXCEP("CPS - General") b . nop END(excep_genex) LEAF(excep_intex) - DUMP_EXCEP("Interrupt") + DUMP_EXCEP("CPS - Interrupt") b . nop END(excep_intex)