From patchwork Thu May 2 21:26:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joe Damato X-Patchwork-Id: 13652132 Received: from mail-pf1-f174.google.com (mail-pf1-f174.google.com [209.85.210.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 839C9181BB2 for ; Thu, 2 May 2024 21:26:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714685197; cv=none; b=VL2t7E6u9PeFEuhSFhWKO6xSW91icJQ3r8mKRt9xdxio1iFYb4r7P2Im1j9aTa2uEwernvqTX2A2bWjHA2X/tkMP6OLVqPt5nHsGyWU7E02rLzDbUuXRJRSKkr5+Rzd5hlk7EGAo1/zRsrnXGVeRZuNA/VfK4Lwklal7raUzFxo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714685197; c=relaxed/simple; bh=FXv+vJcBCmEgOu5jScWUmm7QGv45QW6i+T+dLFjv6OY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=MCbExRZbZWZPR5KWq4NFE4Opud2CJ5I+dwEVZaOqw4NDkvfS34SOBx+SQr8vWUN3EodORyMwaC1U7XN5k7JXn7JZcaOXlmwdyWKNKMt0+C3S+q8g15Hy1TzRJTH+1ZUKP5Vm7Td7n0yItRmaBfBtKQIECvvhzER4zSLMRMUqY2w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=fastly.com; spf=pass smtp.mailfrom=fastly.com; dkim=pass (1024-bit key) header.d=fastly.com header.i=@fastly.com header.b=DAANplb8; arc=none smtp.client-ip=209.85.210.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=fastly.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fastly.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=fastly.com header.i=@fastly.com header.b="DAANplb8" Received: by mail-pf1-f174.google.com with SMTP id d2e1a72fcca58-6f4178aec15so2675401b3a.0 for ; Thu, 02 May 2024 14:26:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fastly.com; s=google; t=1714685196; x=1715289996; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/jgR8JD3oQd88EH8HKGjA3Az+hSDzBJU5y5/SDxJYdM=; b=DAANplb8T8epsb7QiagB9494a98DfQ2G1zai+CmFE/BJ8x/eMqVrLKjRHIqjQX2O+v NrUQk4UPZkwKJUDoSfhOZx4KzHdh8Vt0kePRQiBoISWV7SmCvfHdL2WfuAzB68TCWciq xKDILOO6d1/zqZQ0fBpHQ9AXWw3e/xew+qfMM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714685196; x=1715289996; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/jgR8JD3oQd88EH8HKGjA3Az+hSDzBJU5y5/SDxJYdM=; b=AYNlIXuPLzXcJ6gy2W0C3elDHI1ivp8bJMIVBdVCtA2Au9GvbvhdLa2Zzq16q/YZZR 1g/j7LAhVW0AEc03RLoAQpdygHFrUyz6z2UMApewjZcGqPXSDQ/mmv3MLjn8/YqBMKrc DxM9xiyIb0Au1Tl7YRl2mocNBfTsR1MLP4FSmLSv1msI2mdMRmgWmhO1grh3Tzd5THFB 1NGJqDvzvByK1nG0cLV2eFZrmiATfPyeTBFXEj74slWeaKEuy0WuyCavRh/NTuwlj6Cd Fgw1X60qOutzWcz92w3LI8UuQI3ee5KTF2WmzAizS4C+d0/CFqHPedm0swjQzy0PEtfn wi0A== X-Forwarded-Encrypted: i=1; AJvYcCVXbVPC7GT8zSKKsXdhp+JWZyeQxWwSkIxmIxrJAcpeDuxqRdLcMxWzQxTQZE4Lg45xswSnna4jkMr3LVe3QJ2nuHgqpfSxhGhWtA== X-Gm-Message-State: AOJu0YxCWMq2RRTQqzZOLOkBvgb+wwPSjM+01vpeySxmMFhyVj4WySdU yDdg95H5za9z90c4DS3ZEI/MOZS0qE5BP0whNkBiaonHeIania7G0tQGCfI5ud8= X-Google-Smtp-Source: AGHT+IHJviS1wozqDADgp5NssiZSlqz3RTUpOU3MNs7wdW2gVo+a7TIkffxM2G6uXIzsaRMwMWuSKg== X-Received: by 2002:a05:6a00:1305:b0:6ed:416d:e9a with SMTP id j5-20020a056a00130500b006ed416d0e9amr1014030pfu.7.1714685195864; Thu, 02 May 2024 14:26:35 -0700 (PDT) Received: from localhost.localdomain ([2620:11a:c019:0:65e:3115:2f58:c5fd]) by smtp.gmail.com with ESMTPSA id it21-20020a056a00459500b006f4401df6c9sm1371345pfb.113.2024.05.02.14.26.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 May 2024 14:26:35 -0700 (PDT) From: Joe Damato To: linux-kernel@vger.kernel.org, netdev@vger.kernel.org, tariqt@nvidia.com, saeedm@nvidia.com Cc: mkarsten@uwaterloo.ca, gal@nvidia.com, nalramli@fastly.com, Joe Damato , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , linux-rdma@vger.kernel.org (open list:MELLANOX MLX4 core VPI driver) Subject: [PATCH net-next v3 1/3] net/mlx4: Track RX allocation failures in a stat Date: Thu, 2 May 2024 21:26:25 +0000 Message-Id: <20240502212628.381069-2-jdamato@fastly.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240502212628.381069-1-jdamato@fastly.com> References: <20240502212628.381069-1-jdamato@fastly.com> Precedence: bulk X-Mailing-List: linux-rdma@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 mlx4_en_alloc_frags currently returns -ENOMEM when mlx4_alloc_page fails but does not increment a stat field when this occurs. struct mlx4_en_rx_ring has a dropped field which is tabulated in mlx4_en_DUMP_ETH_STATS, but never incremented by the driver. This change modifies mlx4_en_alloc_frags to increment mlx4_en_rx_ring's dropped field for the -ENOMEM case. Signed-off-by: Joe Damato Tested-by: Martin Karsten --- drivers/net/ethernet/mellanox/mlx4/en_rx.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx4/en_rx.c b/drivers/net/ethernet/mellanox/mlx4/en_rx.c index 8328df8645d5..573ae10300c7 100644 --- a/drivers/net/ethernet/mellanox/mlx4/en_rx.c +++ b/drivers/net/ethernet/mellanox/mlx4/en_rx.c @@ -82,8 +82,10 @@ static int mlx4_en_alloc_frags(struct mlx4_en_priv *priv, for (i = 0; i < priv->num_frags; i++, frags++) { if (!frags->page) { - if (mlx4_alloc_page(priv, frags, gfp)) + if (mlx4_alloc_page(priv, frags, gfp)) { + ring->dropped++; return -ENOMEM; + } ring->rx_alloc_pages++; } rx_desc->data[i].addr = cpu_to_be64(frags->dma + From patchwork Thu May 2 21:26:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joe Damato X-Patchwork-Id: 13652133 Received: from mail-pg1-f179.google.com (mail-pg1-f179.google.com [209.85.215.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E691181D01 for ; Thu, 2 May 2024 21:26:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714685199; cv=none; b=DocWu24oLEFPyAMosS0OOqhIWIO2BHDaRn5S9b626PMikJOvfskk+VuViU6ifDcLMXGUSosoIKTC3jSgMRCkYxT8fD9zDAqlZN0c7rHzWuek/ENPjThx0CmIA0Q1FjPiZzftfLtCfVm8nk6qY6OfP+MVwpU8yvl1HELpPIm1EvY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714685199; c=relaxed/simple; bh=dJS8q1yCszBZ+lLPCiQajxvq+UjKIhzIwbPdmSX7BF0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=U+APohftu6zt4qD0Li1TnYVhLrJRLljg08qlry/oxlLH5YfAYYOoEaQs7IjjLzQmGAJCEHVdFPnGHSHZuTHMx2PId5eYDR25CaeeiymMspR4l6p/x6CWbWUcO/1qOkE2rkNsPoSs7NzuFw7+lZ1ByihisbQMpnb1aN/9OQkmREc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=fastly.com; spf=pass smtp.mailfrom=fastly.com; dkim=pass (1024-bit key) header.d=fastly.com header.i=@fastly.com header.b=L3pSwvEk; arc=none smtp.client-ip=209.85.215.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=fastly.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fastly.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=fastly.com header.i=@fastly.com header.b="L3pSwvEk" Received: by mail-pg1-f179.google.com with SMTP id 41be03b00d2f7-5e8470c1cb7so5842241a12.2 for ; Thu, 02 May 2024 14:26:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fastly.com; s=google; t=1714685197; x=1715289997; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6/C+cLYdosM3H4Yw3Y6aWJybg0yb2tSDMEje896YPBQ=; b=L3pSwvEks/wXn9+4l6jb37/RVGMraaMhpG/24C5YjkLbkNJ3x7VIh020iE3uQjkFRp MOI0eJu9/UGFMwtjpRi1y+DfDOjux2/TDDvN1R5kA9ZApV54N4VGaOMVvZTJ2LTLvnpb TUazWCsqiIGQtz3kENyff8vx5eHyH3HoRWwdU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714685197; x=1715289997; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6/C+cLYdosM3H4Yw3Y6aWJybg0yb2tSDMEje896YPBQ=; b=pO3AGDEEOM6euxoM/DhW1kxJf4/LzVLkxOZuxH5FXvqMZ0ggQE71JPJPfKSzsWHAsM qOushUS+2PgtykJ1necnjsIOl50dNdkLhC3bRYh9vpEVZIM0fjnnS5fD4uWgZlGqoiqr 68+i5ItqfVkGKoRVm5ci2Tk8dmktrMz14dEWFHpd54feKfOMxs/JGJI6U+qjpOrVzCpj 3ymyKMvTgjJsUsNbk9zW5zFzo/dwAuMw5/yg2Bv+OGTjcT0tMKo1TYLfQHLOwDduddb2 L9p4yOLCq5fRvimk4V/6fuEHK4fRYsCyR2/gVtiwLLg+DWCsvRTGPqR8xYNEmpL4iqql fnzw== X-Forwarded-Encrypted: i=1; AJvYcCVI+up+gsgVkIPI0uLmseOSpC4zmayAFZNzFoeQSN7o5b4SVFiETWAjwwfhkgeSUM+cRxJPnefZTjLQ8s6E3IWCv+kz8fmuCO5NlA== X-Gm-Message-State: AOJu0YxnDQuSGMG3nZVpOULffIn+57c84BePKYdIaYpUPWat1yifb7ri tujJIkmJ9QECpYasA+CiKFfW5blivNRrnXf0KU5SbXL3LvOb9woHlCQf4ugHXPg= X-Google-Smtp-Source: AGHT+IGnlpaC8zumkTxRpITcudE8g/yTTc8ly55djHSXPMF/0o0TmlF6310u5p0ntLwX43jWKgQQ2Q== X-Received: by 2002:a05:6a21:9990:b0:1af:66aa:f968 with SMTP id ve16-20020a056a21999000b001af66aaf968mr1170798pzb.20.1714685197492; Thu, 02 May 2024 14:26:37 -0700 (PDT) Received: from localhost.localdomain ([2620:11a:c019:0:65e:3115:2f58:c5fd]) by smtp.gmail.com with ESMTPSA id it21-20020a056a00459500b006f4401df6c9sm1371345pfb.113.2024.05.02.14.26.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 May 2024 14:26:37 -0700 (PDT) From: Joe Damato To: linux-kernel@vger.kernel.org, netdev@vger.kernel.org, tariqt@nvidia.com, saeedm@nvidia.com Cc: mkarsten@uwaterloo.ca, gal@nvidia.com, nalramli@fastly.com, Joe Damato , Jakub Kicinski , "David S. Miller" , Eric Dumazet , Paolo Abeni , linux-rdma@vger.kernel.org (open list:MELLANOX MLX4 core VPI driver) Subject: [PATCH net-next v3 2/3] net/mlx4: link NAPI instances to queues and IRQs Date: Thu, 2 May 2024 21:26:26 +0000 Message-Id: <20240502212628.381069-3-jdamato@fastly.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240502212628.381069-1-jdamato@fastly.com> References: <20240502212628.381069-1-jdamato@fastly.com> Precedence: bulk X-Mailing-List: linux-rdma@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Make mlx4 compatible with the newly added netlink queue GET APIs. Signed-off-by: Joe Damato Tested-by: Martin Karsten Acked-by: Jakub Kicinski --- drivers/net/ethernet/mellanox/mlx4/en_cq.c | 14 ++++++++++++++ drivers/net/ethernet/mellanox/mlx4/mlx4_en.h | 1 + 2 files changed, 15 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx4/en_cq.c b/drivers/net/ethernet/mellanox/mlx4/en_cq.c index 1184ac5751e1..461cc2c79c71 100644 --- a/drivers/net/ethernet/mellanox/mlx4/en_cq.c +++ b/drivers/net/ethernet/mellanox/mlx4/en_cq.c @@ -126,6 +126,7 @@ int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq, cq_idx = cq_idx % priv->rx_ring_num; rx_cq = priv->rx_cq[cq_idx]; cq->vector = rx_cq->vector; + irq = mlx4_eq_get_irq(mdev->dev, cq->vector); } if (cq->type == RX) @@ -142,18 +143,23 @@ int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq, if (err) goto free_eq; + cq->cq_idx = cq_idx; cq->mcq.event = mlx4_en_cq_event; switch (cq->type) { case TX: cq->mcq.comp = mlx4_en_tx_irq; netif_napi_add_tx(cq->dev, &cq->napi, mlx4_en_poll_tx_cq); + netif_napi_set_irq(&cq->napi, irq); napi_enable(&cq->napi); + netif_queue_set_napi(cq->dev, cq_idx, NETDEV_QUEUE_TYPE_TX, &cq->napi); break; case RX: cq->mcq.comp = mlx4_en_rx_irq; netif_napi_add(cq->dev, &cq->napi, mlx4_en_poll_rx_cq); + netif_napi_set_irq(&cq->napi, irq); napi_enable(&cq->napi); + netif_queue_set_napi(cq->dev, cq_idx, NETDEV_QUEUE_TYPE_RX, &cq->napi); break; case TX_XDP: /* nothing regarding napi, it's shared with rx ring */ @@ -189,6 +195,14 @@ void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq **pcq) void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq) { if (cq->type != TX_XDP) { + enum netdev_queue_type qtype; + + if (cq->type == RX) + qtype = NETDEV_QUEUE_TYPE_RX; + else + qtype = NETDEV_QUEUE_TYPE_TX; + + netif_queue_set_napi(cq->dev, cq->cq_idx, qtype, NULL); napi_disable(&cq->napi); netif_napi_del(&cq->napi); } diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h index efe3f97b874f..896f985549a4 100644 --- a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h +++ b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h @@ -379,6 +379,7 @@ struct mlx4_en_cq { #define MLX4_EN_OPCODE_ERROR 0x1e const struct cpumask *aff_mask; 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Miller" , Eric Dumazet , Paolo Abeni , linux-rdma@vger.kernel.org (open list:MELLANOX MLX4 core VPI driver) Subject: [PATCH net-next v3 3/3] net/mlx4: support per-queue statistics via netlink Date: Thu, 2 May 2024 21:26:27 +0000 Message-Id: <20240502212628.381069-4-jdamato@fastly.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240502212628.381069-1-jdamato@fastly.com> References: <20240502212628.381069-1-jdamato@fastly.com> Precedence: bulk X-Mailing-List: linux-rdma@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Make mlx4 compatible with the newly added netlink queue stats API. Signed-off-by: Joe Damato Tested-by: Martin Karsten Reviewed-by: Jakub Kicinski --- .../net/ethernet/mellanox/mlx4/en_netdev.c | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c index 5d3fde63b273..6875f8c5103a 100644 --- a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c +++ b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c @@ -43,6 +43,7 @@ #include #include #include +#include #include #include @@ -3099,6 +3100,83 @@ void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev, last_i += NUM_PHY_STATS; } +static void mlx4_get_queue_stats_rx(struct net_device *dev, int i, + struct netdev_queue_stats_rx *stats) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + const struct mlx4_en_rx_ring *ring; + + spin_lock_bh(&priv->stats_lock); + + if (!priv->port_up || mlx4_is_master(priv->mdev->dev)) + goto out_unlock; + + if (i < 0 || i >= priv->rx_ring_num) + goto out_unlock; + + ring = priv->rx_ring[i]; + stats->packets = READ_ONCE(ring->packets); + stats->bytes = READ_ONCE(ring->bytes); + stats->alloc_fail = READ_ONCE(ring->dropped); + +out_unlock: + spin_unlock_bh(&priv->stats_lock); +} + +static void mlx4_get_queue_stats_tx(struct net_device *dev, int i, + struct netdev_queue_stats_tx *stats) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + const struct mlx4_en_tx_ring *ring; + + spin_lock_bh(&priv->stats_lock); + + if (!priv->port_up || mlx4_is_master(priv->mdev->dev)) + goto out_unlock; + + if (i < 0 || i >= priv->tx_ring_num[TX]) + goto out_unlock; + + ring = priv->tx_ring[TX][i]; + stats->packets = READ_ONCE(ring->packets); + stats->bytes = READ_ONCE(ring->bytes); + +out_unlock: + spin_unlock_bh(&priv->stats_lock); +} + +static void mlx4_get_base_stats(struct net_device *dev, + struct netdev_queue_stats_rx *rx, + struct netdev_queue_stats_tx *tx) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + + spin_lock_bh(&priv->stats_lock); + + if (!priv->port_up || mlx4_is_master(priv->mdev->dev)) + goto out_unlock; + + if (priv->rx_ring_num) { + rx->packets = 0; + rx->bytes = 0; + rx->alloc_fail = 0; + } + + if (priv->tx_ring_num[TX]) { + tx->packets = 0; + tx->bytes = 0; + } + +out_unlock: + spin_unlock_bh(&priv->stats_lock); +} + +static const struct netdev_stat_ops mlx4_stat_ops = { + .get_queue_stats_rx = mlx4_get_queue_stats_rx, + .get_queue_stats_tx = mlx4_get_queue_stats_tx, + .get_base_stats = mlx4_get_base_stats, +}; + int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, struct mlx4_en_port_profile *prof) { @@ -3262,6 +3340,7 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]); netif_set_real_num_rx_queues(dev, priv->rx_ring_num); + dev->stat_ops = &mlx4_stat_ops; dev->ethtool_ops = &mlx4_en_ethtool_ops; /*