From patchwork Mon May 6 12:57:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13655418 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 65B7CC25B5F for ; Mon, 6 May 2024 12:57:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D37E710F76B; Mon, 6 May 2024 12:57:25 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="DndElYl7"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2AB0D10F6C3; Mon, 6 May 2024 12:57:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1715000244; x=1746536244; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MlhpzetGflHLvLmX0xVnP2Vt4VJFXfOgVTrg/+YpD/4=; b=DndElYl723zNiPTPPNsQtm8sBOuri5kdhjZDNGxH4bCrmz9bCAqq/PgR t+Z5DC2Aw8Kc4jXD5yFVMoiZBpbS5UqwV7OOLPLktrbPk2Ei38RX8oNaL y5OziVDldhuk9lG11ARBaB3PK8/4vEPd+AoVBotq5YLlEeFrsicaXn4oM 7JNaqgh0fwyoa0yJpXpVa9GsOL6CmtU/1E0WF/zu6FK+NlNBZTKSDhIa7 5MjfWFy+Gx0jbQ4X0mLYGgx/SZAwkUoyxmHcZcFTYZBW2V0zi46e71fP6 27rxR0nE6+6LdEJy1Ge4oplnPybhQppCLSe1xv0oniBZxgShn2gFOWIL2 g==; X-CSE-ConnectionGUID: o9an4j3zSyWOcupcjM5xAQ== X-CSE-MsgGUID: Qh+NiCwRTzqFMJHF5ssYuQ== X-IronPort-AV: E=McAfee;i="6600,9927,11065"; a="10865316" X-IronPort-AV: E=Sophos;i="6.07,258,1708416000"; d="scan'208";a="10865316" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 May 2024 05:57:24 -0700 X-CSE-ConnectionGUID: 0+Is2SrKTGC7CW0hCxMHRw== X-CSE-MsgGUID: 02jmG0SPQ5GWo8oyGLbZyg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,258,1708416000"; d="scan'208";a="28164943" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 06 May 2024 05:57:22 -0700 Received: by stinkbox (sSMTP sendmail emulation); Mon, 06 May 2024 15:57:21 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org Subject: [PATCH 1/9] drm/i915: Split gen2 vs. gen3 .max_stride() Date: Mon, 6 May 2024 15:57:10 +0300 Message-ID: <20240506125718.26001-2-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240506125718.26001-1-ville.syrjala@linux.intel.com> References: <20240506125718.26001-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Plane .max_stride() is alreayd a vfunc so having one made up of two branches based on the display version is silly. Split i9xx_plane_max_stride() into gen2 vs. gen3 variants so that we get rid of said check. Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/display/i9xx_plane.c | 32 +++++++++++++---------- 1 file changed, 18 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c index 3442264443e5..21303fa4f08f 100644 --- a/drivers/gpu/drm/i915/display/i9xx_plane.c +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c @@ -741,23 +741,25 @@ i965_plane_max_stride(struct intel_plane *plane, } static unsigned int -i9xx_plane_max_stride(struct intel_plane *plane, +i915_plane_max_stride(struct intel_plane *plane, u32 pixel_format, u64 modifier, unsigned int rotation) { - struct drm_i915_private *dev_priv = to_i915(plane->base.dev); + if (modifier == I915_FORMAT_MOD_X_TILED) + return 8 * 1024; + else + return 16 * 1024; +} - if (DISPLAY_VER(dev_priv) >= 3) { - if (modifier == I915_FORMAT_MOD_X_TILED) - return 8*1024; - else - return 16*1024; - } else { - if (plane->i9xx_plane == PLANE_C) - return 4*1024; - else - return 8*1024; - } +static unsigned int +i8xx_plane_max_stride(struct intel_plane *plane, + u32 pixel_format, u64 modifier, + unsigned int rotation) +{ + if (plane->i9xx_plane == PLANE_C) + return 4 * 1024; + else + return 8 * 1024; } static const struct drm_plane_funcs i965_plane_funcs = { @@ -854,8 +856,10 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) if (HAS_GMCH(dev_priv)) { if (DISPLAY_VER(dev_priv) >= 4) plane->max_stride = i965_plane_max_stride; + else if (DISPLAY_VER(dev_priv) == 3) + plane->max_stride = i915_plane_max_stride; else - plane->max_stride = i9xx_plane_max_stride; + plane->max_stride = i8xx_plane_max_stride; } else { if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) plane->max_stride = hsw_primary_max_stride; From patchwork Mon May 6 12:57:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13655419 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8FBBEC10F16 for ; Mon, 6 May 2024 12:57:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2970A10F750; Mon, 6 May 2024 12:57:28 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="jLKmF6ZE"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3802010F750; Mon, 6 May 2024 12:57:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1715000247; x=1746536247; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Abhl3teA+ljzbyLXLR/wPKDQgOsPQiV5a5951fHgEp8=; b=jLKmF6ZEqEhnLnQ1NPc7VNfOvBt4ionlKpofMNjNjd9KnFJXMdtWKo2H rgE1ZQq3E8w2JhW/uA9KgYxnlrU70wa6CquRFIQQGSAmooZ43Sq8G7w99 BOS7wsBUNf2cfQi5mG0ox+qJD4zaIPOCPCpYADhp/X2SQLYbrJwObBd0c dEwKfiM2EHGYX3+7ckDQKHoKQtSAPEegJsOFdK3QS/CFEf3p/OPHjqUCt 8V2KjAhSw8jtO9GGDonggiZ9k128LYub7p0ROrM7XBsWbbdMSi9OfhFg/ A6rI33hIWwLJW/VzkmnbgNcuT3Na5JwaEisxWxS7+gk10mouypgsJhfQU Q==; X-CSE-ConnectionGUID: oxS3dcUOSn2ouWpIHLxkpg== X-CSE-MsgGUID: WBah+K6ETLeXSoxAu26tdA== X-IronPort-AV: E=McAfee;i="6600,9927,11065"; a="10865320" X-IronPort-AV: E=Sophos;i="6.07,258,1708416000"; d="scan'208";a="10865320" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 May 2024 05:57:27 -0700 X-CSE-ConnectionGUID: 6PFP9ZI2QSWrQIxLaUvs2A== X-CSE-MsgGUID: ESU4LjItR6KIS1C6xghHNA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,258,1708416000"; d="scan'208";a="28164944" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 06 May 2024 05:57:25 -0700 Received: by stinkbox (sSMTP sendmail emulation); Mon, 06 May 2024 15:57:24 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org Subject: [PATCH 2/9] drm/i915: Clean up skl+ plane stride limits Date: Mon, 6 May 2024 15:57:11 +0300 Message-ID: <20240506125718.26001-3-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240506125718.26001-1-ville.syrjala@linux.intel.com> References: <20240506125718.26001-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä skl_plane_max_stride() is pretty messy. Streamline it and split it into clear skl+ vs. adl+ variants. TODO: Deal with icl and tgl strude limits properly Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula --- .../drm/i915/display/skl_universal_plane.c | 65 +++++++++++-------- 1 file changed, 37 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index 0a8e781a3648..b8103d6ebc1f 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -461,41 +461,46 @@ static int icl_plane_max_height(const struct drm_framebuffer *fb, } static unsigned int -skl_plane_max_stride(struct intel_plane *plane, - u32 pixel_format, u64 modifier, - unsigned int rotation) +plane_max_stride(struct intel_plane *plane, + u32 pixel_format, u64 modifier, + unsigned int rotation, + unsigned int max_pixels, + unsigned int max_bytes) { - struct drm_i915_private *i915 = to_i915(plane->base.dev); const struct drm_format_info *info = drm_format_info(pixel_format); int cpp = info->cpp[0]; - int max_horizontal_pixels = 8192; - int max_stride_bytes; - - if (DISPLAY_VER(i915) >= 13) { - /* - * The stride in bytes must not exceed of the size - * of 128K bytes. For pixel formats of 64bpp will allow - * for a 16K pixel surface. - */ - max_stride_bytes = 131072; - if (cpp == 8) - max_horizontal_pixels = 16384; - else - max_horizontal_pixels = 65536; - } else { - /* - * "The stride in bytes must not exceed the - * of the size of 8K pixels and 32K bytes." - */ - max_stride_bytes = 32768; - } if (drm_rotation_90_or_270(rotation)) - return min(max_horizontal_pixels, max_stride_bytes / cpp); + return min(max_pixels, max_bytes / cpp); else - return min(max_horizontal_pixels * cpp, max_stride_bytes); + return min(max_pixels * cpp, max_bytes); } +static unsigned int +adl_plane_max_stride(struct intel_plane *plane, + u32 pixel_format, u64 modifier, + unsigned int rotation) +{ + unsigned int max_pixels = 65536; /* PLANE_OFFSET limit */ + unsigned int max_bytes = 128 * 1024; + + return plane_max_stride(plane, pixel_format, + modifier, rotation, + max_pixels, max_bytes); +} + +static unsigned int +skl_plane_max_stride(struct intel_plane *plane, + u32 pixel_format, u64 modifier, + unsigned int rotation) +{ + unsigned int max_pixels = 8192; /* PLANE_OFFSET limit */ + unsigned int max_bytes = 32 * 1024; + + return plane_max_stride(plane, pixel_format, + modifier, rotation, + max_pixels, max_bytes); +} /* Preoffset values for YUV to RGB Conversion */ #define PREOFF_YUV_TO_RGB_HI 0x1800 @@ -2357,7 +2362,11 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv, plane->min_cdclk = skl_plane_min_cdclk; } - plane->max_stride = skl_plane_max_stride; + if (DISPLAY_VER(dev_priv) >= 13) + plane->max_stride = adl_plane_max_stride; + else + plane->max_stride = skl_plane_max_stride; + if (DISPLAY_VER(dev_priv) >= 11) { plane->update_noarm = icl_plane_update_noarm; plane->update_arm = icl_plane_update_arm; From patchwork Mon May 6 12:57:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13655420 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CB519C25B10 for ; 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X-CSE-ConnectionGUID: vEofLJAJRsuGzo7KodKYkg== X-CSE-MsgGUID: CXzRouCxTaWXgYWxHUCoeg== X-IronPort-AV: E=McAfee;i="6600,9927,11065"; a="10865321" X-IronPort-AV: E=Sophos;i="6.07,258,1708416000"; d="scan'208";a="10865321" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 May 2024 05:57:30 -0700 X-CSE-ConnectionGUID: s2PorL3mRk+P8EKcVbX+0A== X-CSE-MsgGUID: SHUKBs1pRCC3Kujp43u/3Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,258,1708416000"; d="scan'208";a="28164945" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 06 May 2024 05:57:28 -0700 Received: by stinkbox (sSMTP sendmail emulation); Mon, 06 May 2024 15:57:27 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org Subject: [PATCH 3/9] drm/i915: Drop 'uses_fence' parameter from intel_pin_fb_obj_dpt() Date: Mon, 6 May 2024 15:57:12 +0300 Message-ID: <20240506125718.26001-4-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240506125718.26001-1-ville.syrjala@linux.intel.com> References: <20240506125718.26001-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Fence regions are only relevant for GGTT, not DPT. Drop the pointless 'uses_fence' argument from intel_pin_fb_obj_dpt(). Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_fb_pin.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c index be095cc696ba..2b50c1946c63 100644 --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c @@ -20,7 +20,6 @@ static struct i915_vma * intel_pin_fb_obj_dpt(struct drm_framebuffer *fb, const struct i915_gtt_view *view, unsigned int alignment, - bool uses_fence, unsigned long *out_flags, struct i915_address_space *vm) { @@ -274,8 +273,8 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state) plane_state->ggtt_vma = vma; vma = intel_pin_fb_obj_dpt(fb, &plane_state->view.gtt, - alignment, false, - &plane_state->flags, intel_fb->dpt_vm); + alignment, &plane_state->flags, + intel_fb->dpt_vm); if (IS_ERR(vma)) { intel_dpt_unpin(intel_fb->dpt_vm); plane_state->ggtt_vma = NULL; From patchwork Mon May 6 12:57:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13655421 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4F25EC25B10 for ; Mon, 6 May 2024 12:57:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8C0BB10EFEC; Mon, 6 May 2024 12:57:34 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="XTfG6Rxl"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 237CE10F734; Mon, 6 May 2024 12:57:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1715000253; x=1746536253; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IVvfpwa8VpljKrq5AdBaIbYbpVnbpHnnF2D4WoBYTuo=; b=XTfG6Rxly46XFnFZfTfONIe5YB74WFbeR0NJj0x6x1dMepMa5Fi8X0nJ eMX97i6ErPTWUv+A66yqwsty4GPdK8IZKuuaa3zUI/k23NrsmkHLUsoX0 6ectrR/defXROC17udEYZXsM5MIj4zYEGv8flnpUTtWzKC4GRnmLeEywB cgrZd9UYH0bHeOXvtfWWxvg5XY4qxFDzhDDeCa6xYovoxT7L+xNiqRhB6 2unBm72wwJKRrpa27oybPjaN8C8T4+CBTfCcFGvTx964xOFInNsg4oXG2 lIVKPs2TPW8KD1YEdwKNJRRDlYXPPtALkTYchvRl1Bb6tQbmTWsGY2i8f A==; X-CSE-ConnectionGUID: HF2H6C5HSBi/sYI6TtNCLA== X-CSE-MsgGUID: VXyHlnVVSmO+U3Zoo3aTVQ== X-IronPort-AV: E=McAfee;i="6600,9927,11065"; a="10865324" X-IronPort-AV: E=Sophos;i="6.07,258,1708416000"; d="scan'208";a="10865324" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 May 2024 05:57:33 -0700 X-CSE-ConnectionGUID: kljFkLzpTnWuQnwzemzlZQ== X-CSE-MsgGUID: 1+FLcBADS5mphU+LoBf+fA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,258,1708416000"; d="scan'208";a="28164946" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 06 May 2024 05:57:31 -0700 Received: by stinkbox (sSMTP sendmail emulation); Mon, 06 May 2024 15:57:30 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org Subject: [PATCH 4/9] drm/i915: Extract intel_plane_needs_physical() Date: Mon, 6 May 2024 15:57:13 +0300 Message-ID: <20240506125718.26001-5-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240506125718.26001-1-ville.syrjala@linux.intel.com> References: <20240506125718.26001-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Pull the "does this plane need a physical address?" check into a small helper. Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 8 ++++++++ drivers/gpu/drm/i915/display/intel_atomic_plane.h | 1 + drivers/gpu/drm/i915/display/intel_fb_pin.c | 9 +++------ 3 files changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index b083b985d170..27224ecdc94c 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -144,6 +144,14 @@ intel_plane_destroy_state(struct drm_plane *plane, kfree(plane_state); } +bool intel_plane_needs_physical(struct intel_plane *plane) +{ + struct drm_i915_private *i915 = to_i915(plane->base.dev); + + return plane->id == PLANE_CURSOR && + DISPLAY_INFO(i915)->cursor_needs_physical; +} + unsigned int intel_adjusted_rate(const struct drm_rect *src, const struct drm_rect *dst, unsigned int rate) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h index 191dad0efc8e..e7a0699f17c8 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h @@ -66,5 +66,6 @@ int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state); void intel_plane_set_invisible(struct intel_crtc_state *crtc_state, struct intel_plane_state *plane_state); void intel_plane_helper_add(struct intel_plane *plane); +bool intel_plane_needs_physical(struct intel_plane *plane); #endif /* __INTEL_ATOMIC_PLANE_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c index 2b50c1946c63..5b71d9488184 100644 --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c @@ -11,6 +11,7 @@ #include "gem/i915_gem_object.h" #include "i915_drv.h" +#include "intel_atomic_plane.h" #include "intel_display_types.h" #include "intel_dpt.h" #include "intel_fb.h" @@ -236,15 +237,11 @@ void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags) int intel_plane_pin_fb(struct intel_plane_state *plane_state) { struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); - struct drm_i915_private *dev_priv = to_i915(plane->base.dev); struct drm_framebuffer *fb = plane_state->hw.fb; struct i915_vma *vma; - bool phys_cursor = - plane->id == PLANE_CURSOR && - DISPLAY_INFO(dev_priv)->cursor_needs_physical; if (!intel_fb_uses_dpt(fb)) { - vma = intel_pin_and_fence_fb_obj(fb, phys_cursor, + vma = intel_pin_and_fence_fb_obj(fb, intel_plane_needs_physical(plane), &plane_state->view.gtt, intel_plane_uses_fence(plane_state), &plane_state->flags); @@ -259,7 +256,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state) * will trigger might_sleep() even if it won't actually sleep, * which is the case when the fb has already been pinned. */ - if (phys_cursor) + if (intel_plane_needs_physical(plane)) plane_state->phys_dma_addr = i915_gem_object_get_dma_address(intel_fb_obj(fb), 0); } else { From patchwork Mon May 6 12:57:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13655422 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 00A20C25B10 for ; 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X-CSE-ConnectionGUID: rGg83Ry9QcW3QVLzD9ytFw== X-CSE-MsgGUID: iTdF3uUjQAmu0vqign/8Zw== X-IronPort-AV: E=McAfee;i="6600,9927,11065"; a="10865325" X-IronPort-AV: E=Sophos;i="6.07,258,1708416000"; d="scan'208";a="10865325" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 May 2024 05:57:36 -0700 X-CSE-ConnectionGUID: MSzLHzuVSyGUAQ5Hvj2rMw== X-CSE-MsgGUID: gtw1xRIbSYybG/PCHLpRzA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,258,1708416000"; d="scan'208";a="28164947" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 06 May 2024 05:57:34 -0700 Received: by stinkbox (sSMTP sendmail emulation); Mon, 06 May 2024 15:57:33 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org Subject: [PATCH 5/9] drm/i915: Polish types in fb calculations Date: Mon, 6 May 2024 15:57:14 +0300 Message-ID: <20240506125718.26001-6-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240506125718.26001-1-ville.syrjala@linux.intel.com> References: <20240506125718.26001-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Be a bit more consistent in our use of integer types in the fb related calculatiosn. u32 we generally only use for ggtt offsets and such, and everything else can be regular (unsigned) ints. There's also an overabundance of consts for local variables in skl_check_main_surface() which is not something we generally do. So get rid of those while at it. Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/display/i9xx_plane.c | 2 +- drivers/gpu/drm/i915/display/intel_fb.c | 27 +++++++++-------- drivers/gpu/drm/i915/display/intel_fb_pin.c | 2 +- .../drm/i915/display/skl_universal_plane.c | 29 +++++++++---------- 4 files changed, 29 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c index 21303fa4f08f..ea4d8ba55ad8 100644 --- a/drivers/gpu/drm/i915/display/i9xx_plane.c +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c @@ -266,7 +266,7 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state) * despite them not using the linear offset anymore. */ if (DISPLAY_VER(dev_priv) >= 4 && fb->modifier == I915_FORMAT_MOD_X_TILED) { - u32 alignment = intel_surf_alignment(fb, 0); + unsigned int alignment = intel_surf_alignment(fb, 0); int cpp = fb->format->cpp[0]; while ((src_x + src_w) * cpp > plane_state->view.color_plane[0].mapping_stride) { diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c index bf24f48a1e76..b6638726949d 100644 --- a/drivers/gpu/drm/i915/display/intel_fb.c +++ b/drivers/gpu/drm/i915/display/intel_fb.c @@ -1045,7 +1045,7 @@ static u32 intel_compute_aligned_offset(struct drm_i915_private *i915, int color_plane, unsigned int pitch, unsigned int rotation, - u32 alignment) + unsigned int alignment) { unsigned int cpp = fb->format->cpp[color_plane]; u32 offset, offset_aligned; @@ -1102,8 +1102,8 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y, struct drm_i915_private *i915 = to_i915(intel_plane->base.dev); const struct drm_framebuffer *fb = state->hw.fb; unsigned int rotation = state->hw.rotation; - int pitch = state->view.color_plane[color_plane].mapping_stride; - u32 alignment; + unsigned int pitch = state->view.color_plane[color_plane].mapping_stride; + unsigned int alignment; if (intel_plane->id == PLANE_CURSOR) alignment = intel_cursor_alignment(i915); @@ -1120,8 +1120,7 @@ static int intel_fb_offset_to_xy(int *x, int *y, int color_plane) { struct drm_i915_private *i915 = to_i915(fb->dev); - unsigned int height; - u32 alignment, unused; + unsigned int height, alignment, unused; if (DISPLAY_VER(i915) >= 12 && !intel_fb_needs_pot_stride_remap(to_intel_framebuffer(fb)) && @@ -1508,8 +1507,8 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p check_array_bounds(i915, view->gtt.remapped.plane, color_plane); if (view->gtt.remapped.plane_alignment) { - unsigned int aligned_offset = ALIGN(gtt_offset, - view->gtt.remapped.plane_alignment); + u32 aligned_offset = ALIGN(gtt_offset, + view->gtt.remapped.plane_alignment); size += aligned_offset - gtt_offset; gtt_offset = aligned_offset; @@ -1795,16 +1794,16 @@ u32 intel_fb_max_stride(struct drm_i915_private *dev_priv, return 128 * 1024; } -static u32 +static unsigned int intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane) { struct drm_i915_private *dev_priv = to_i915(fb->dev); - u32 tile_width; + unsigned int tile_width; if (is_surface_linear(fb, color_plane)) { - u32 max_stride = intel_plane_fb_max_stride(dev_priv, - fb->format->format, - fb->modifier); + unsigned int max_stride = intel_plane_fb_max_stride(dev_priv, + fb->format->format, + fb->modifier); /* * To make remapping with linear generally feasible @@ -2061,7 +2060,7 @@ int intel_framebuffer_init(struct intel_framebuffer *intel_fb, drm_helper_mode_fill_fb_struct(&dev_priv->drm, fb, mode_cmd); for (i = 0; i < fb->format->num_planes; i++) { - u32 stride_alignment; + unsigned int stride_alignment; if (mode_cmd->handles[i] != mode_cmd->handles[0]) { drm_dbg_kms(&dev_priv->drm, "bad plane %d handle\n", @@ -2078,7 +2077,7 @@ int intel_framebuffer_init(struct intel_framebuffer *intel_fb, } if (intel_fb_is_gen12_ccs_aux_plane(fb, i)) { - int ccs_aux_stride = gen12_ccs_aux_stride(intel_fb, i); + unsigned int ccs_aux_stride = gen12_ccs_aux_stride(intel_fb, i); if (fb->pitches[i] != ccs_aux_stride) { drm_dbg_kms(&dev_priv->drm, diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c index 5b71d9488184..041f09f76628 100644 --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c @@ -113,9 +113,9 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, struct drm_i915_gem_object *obj = intel_fb_obj(fb); intel_wakeref_t wakeref; struct i915_gem_ww_ctx ww; + unsigned int alignment; struct i915_vma *vma; unsigned int pinctl; - u32 alignment; int ret; if (drm_WARN_ON(dev, !i915_gem_object_is_framebuffer(obj))) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index b8103d6ebc1f..24f90368d344 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -1619,7 +1619,7 @@ skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state, int aux_x = plane_state->view.color_plane[ccs_plane].x; int aux_y = plane_state->view.color_plane[ccs_plane].y; u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset; - u32 alignment = intel_surf_alignment(fb, ccs_plane); + unsigned int alignment = intel_surf_alignment(fb, ccs_plane); int hsub; int vsub; @@ -1639,8 +1639,7 @@ skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state, plane_state, ccs_plane, aux_offset, - aux_offset - - alignment); + aux_offset - alignment); aux_x = x * hsub + aux_x % hsub; aux_y = y * vsub + aux_y % vsub; } @@ -1662,10 +1661,10 @@ int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state, struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); struct drm_i915_private *dev_priv = to_i915(plane->base.dev); const struct drm_framebuffer *fb = plane_state->hw.fb; - const int aux_plane = skl_main_to_aux_plane(fb, 0); - const u32 aux_offset = plane_state->view.color_plane[aux_plane].offset; - const u32 alignment = intel_surf_alignment(fb, 0); - const int w = drm_rect_width(&plane_state->uapi.src) >> 16; + int aux_plane = skl_main_to_aux_plane(fb, 0); + u32 aux_offset = plane_state->view.color_plane[aux_plane].offset; + unsigned int alignment = intel_surf_alignment(fb, 0); + int w = drm_rect_width(&plane_state->uapi.src) >> 16; intel_add_fb_offsets(x, y, plane_state, 0); *offset = intel_plane_compute_aligned_offset(x, y, plane_state, 0); @@ -1715,13 +1714,13 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) const unsigned int rotation = plane_state->hw.rotation; int x = plane_state->uapi.src.x1 >> 16; int y = plane_state->uapi.src.y1 >> 16; - const int w = drm_rect_width(&plane_state->uapi.src) >> 16; - const int h = drm_rect_height(&plane_state->uapi.src) >> 16; - const int min_width = intel_plane_min_width(plane, fb, 0, rotation); - const int max_width = intel_plane_max_width(plane, fb, 0, rotation); - const int max_height = intel_plane_max_height(plane, fb, 0, rotation); - const int aux_plane = skl_main_to_aux_plane(fb, 0); - const u32 alignment = intel_surf_alignment(fb, 0); + int w = drm_rect_width(&plane_state->uapi.src) >> 16; + int h = drm_rect_height(&plane_state->uapi.src) >> 16; + int min_width = intel_plane_min_width(plane, fb, 0, rotation); + int max_width = intel_plane_max_width(plane, fb, 0, rotation); + int max_height = intel_plane_max_height(plane, fb, 0, rotation); + unsigned int alignment = intel_surf_alignment(fb, 0); + int aux_plane = skl_main_to_aux_plane(fb, 0); u32 offset; int ret; @@ -1809,7 +1808,7 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state) if (ccs_plane) { u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset; - u32 alignment = intel_surf_alignment(fb, uv_plane); + unsigned int alignment = intel_surf_alignment(fb, uv_plane); if (offset > aux_offset) offset = intel_plane_adjust_aligned_offset(&x, &y, From patchwork Mon May 6 12:57:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13655423 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 98611C25B74 for ; Mon, 6 May 2024 12:57:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F0F5E10F7D8; Mon, 6 May 2024 12:57:39 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; 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a="10865330" X-IronPort-AV: E=Sophos;i="6.07,258,1708416000"; d="scan'208";a="10865330" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 May 2024 05:57:39 -0700 X-CSE-ConnectionGUID: gVMhyE52RQ2sB05ggCFEAw== X-CSE-MsgGUID: 42rODzXoR2CN6jJNiR9h6g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,258,1708416000"; d="scan'208";a="28164951" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 06 May 2024 05:57:37 -0700 Received: by stinkbox (sSMTP sendmail emulation); Mon, 06 May 2024 15:57:36 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org Subject: [PATCH 6/9] drm/i915: Constify 'fb' in during pinning Date: Mon, 6 May 2024 15:57:15 +0300 Message-ID: <20240506125718.26001-7-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240506125718.26001-1-ville.syrjala@linux.intel.com> References: <20240506125718.26001-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Make the 'fb' pointers const in the pinning code. We never want to mutate these. Also nuke a few aliasing fb vs. intel_fb cases by just using the more specific type everywhere in the same function. Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_fb_pin.c | 33 ++++++++++----------- drivers/gpu/drm/i915/display/intel_fb_pin.h | 2 +- drivers/gpu/drm/xe/display/xe_fb_pin.c | 8 ++--- 3 files changed, 21 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c index 041f09f76628..7971656982a6 100644 --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c @@ -18,7 +18,7 @@ #include "intel_fb_pin.h" static struct i915_vma * -intel_pin_fb_obj_dpt(struct drm_framebuffer *fb, +intel_pin_fb_obj_dpt(const struct drm_framebuffer *fb, const struct i915_gtt_view *view, unsigned int alignment, unsigned long *out_flags, @@ -102,7 +102,7 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb, } struct i915_vma * -intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, +intel_pin_and_fence_fb_obj(const struct drm_framebuffer *fb, bool phys_cursor, const struct i915_gtt_view *view, bool uses_fence, @@ -237,11 +237,12 @@ void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags) int intel_plane_pin_fb(struct intel_plane_state *plane_state) { struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); - struct drm_framebuffer *fb = plane_state->hw.fb; + const struct intel_framebuffer *fb = + to_intel_framebuffer(plane_state->hw.fb); struct i915_vma *vma; - if (!intel_fb_uses_dpt(fb)) { - vma = intel_pin_and_fence_fb_obj(fb, intel_plane_needs_physical(plane), + if (!intel_fb_uses_dpt(&fb->base)) { + vma = intel_pin_and_fence_fb_obj(&fb->base, intel_plane_needs_physical(plane), &plane_state->view.gtt, intel_plane_uses_fence(plane_state), &plane_state->flags); @@ -258,22 +259,21 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state) */ if (intel_plane_needs_physical(plane)) plane_state->phys_dma_addr = - i915_gem_object_get_dma_address(intel_fb_obj(fb), 0); + i915_gem_object_get_dma_address(intel_fb_obj(&fb->base), 0); } else { - struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); - unsigned int alignment = intel_surf_alignment(fb, 0); + unsigned int alignment = intel_surf_alignment(&fb->base, 0); - vma = intel_dpt_pin(intel_fb->dpt_vm, alignment / 512); + vma = intel_dpt_pin(fb->dpt_vm, alignment / 512); if (IS_ERR(vma)) return PTR_ERR(vma); plane_state->ggtt_vma = vma; - vma = intel_pin_fb_obj_dpt(fb, &plane_state->view.gtt, + vma = intel_pin_fb_obj_dpt(&fb->base, &plane_state->view.gtt, alignment, &plane_state->flags, - intel_fb->dpt_vm); + fb->dpt_vm); if (IS_ERR(vma)) { - intel_dpt_unpin(intel_fb->dpt_vm); + intel_dpt_unpin(fb->dpt_vm); plane_state->ggtt_vma = NULL; return PTR_ERR(vma); } @@ -288,22 +288,21 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state) void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state) { - struct drm_framebuffer *fb = old_plane_state->hw.fb; + const struct intel_framebuffer *fb = + to_intel_framebuffer(old_plane_state->hw.fb); struct i915_vma *vma; - if (!intel_fb_uses_dpt(fb)) { + if (!intel_fb_uses_dpt(&fb->base)) { vma = fetch_and_zero(&old_plane_state->ggtt_vma); if (vma) intel_unpin_fb_vma(vma, old_plane_state->flags); } else { - struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); - vma = fetch_and_zero(&old_plane_state->dpt_vma); if (vma) intel_unpin_fb_vma(vma, old_plane_state->flags); vma = fetch_and_zero(&old_plane_state->ggtt_vma); if (vma) - intel_dpt_unpin(intel_fb->dpt_vm); + intel_dpt_unpin(fb->dpt_vm); } } diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h index de0efaa25905..edcebe75afd7 100644 --- a/drivers/gpu/drm/i915/display/intel_fb_pin.h +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h @@ -14,7 +14,7 @@ struct intel_plane_state; struct i915_gtt_view; struct i915_vma * -intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, +intel_pin_and_fence_fb_obj(const struct drm_framebuffer *fb, bool phys_cursor, const struct i915_gtt_view *view, bool uses_fence, diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c index 3e1ae37c4c8b..8b7ca3268834 100644 --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c @@ -77,7 +77,7 @@ write_dpt_remapped(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, *dpt_ofs = ALIGN(*dpt_ofs, 4096); } -static int __xe_pin_fb_vma_dpt(struct intel_framebuffer *fb, +static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb, const struct i915_gtt_view *view, struct i915_vma *vma) { @@ -181,7 +181,7 @@ write_ggtt_rotated(struct xe_bo *bo, struct xe_ggtt *ggtt, u32 *ggtt_ofs, u32 bo } } -static int __xe_pin_fb_vma_ggtt(struct intel_framebuffer *fb, +static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb, const struct i915_gtt_view *view, struct i915_vma *vma) { @@ -249,7 +249,7 @@ static int __xe_pin_fb_vma_ggtt(struct intel_framebuffer *fb, return ret; } -static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb, +static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb, const struct i915_gtt_view *view) { struct drm_device *dev = fb->base.dev; @@ -333,7 +333,7 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma) } struct i915_vma * -intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, +intel_pin_and_fence_fb_obj(const struct drm_framebuffer *fb, bool phys_cursor, const struct i915_gtt_view *view, bool uses_fence, From patchwork Mon May 6 12:57:16 2024 Content-Type: text/plain; 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d="scan'208";a="28164952" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 06 May 2024 05:57:39 -0700 Received: by stinkbox (sSMTP sendmail emulation); Mon, 06 May 2024 15:57:39 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org Subject: [PATCH 7/9] drm/i915: Change intel_fbdev_fb_alloc() reuturn type Date: Mon, 6 May 2024 15:57:16 +0300 Message-ID: <20240506125718.26001-8-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240506125718.26001-1-ville.syrjala@linux.intel.com> References: <20240506125718.26001-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Change intel_fbdev_fb_alloc() to return struct intel_fb instead of struct drm_framebuffer. Let's us eliminate some annoying aliasing variables in the fbdev setup code. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_fbdev.c | 10 +++++----- drivers/gpu/drm/i915/display/intel_fbdev_fb.c | 6 +++--- drivers/gpu/drm/i915/display/intel_fbdev_fb.h | 5 +++-- 3 files changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c index bda702c2cab8..0d79ec1a6427 100644 --- a/drivers/gpu/drm/i915/display/intel_fbdev.c +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c @@ -207,13 +207,13 @@ static int intelfb_create(struct drm_fb_helper *helper, intel_fb = ifbdev->fb = NULL; } if (!intel_fb || drm_WARN_ON(dev, !intel_fb_obj(&intel_fb->base))) { - struct drm_framebuffer *fb; + struct intel_framebuffer *fb; drm_dbg_kms(&dev_priv->drm, "no BIOS fb, allocating a new one\n"); - fb = intel_fbdev_fb_alloc(helper, sizes); - if (IS_ERR(fb)) - return PTR_ERR(fb); - intel_fb = ifbdev->fb = to_intel_framebuffer(fb); + intel_fb = intel_fbdev_fb_alloc(helper, sizes); + if (IS_ERR(intel_fb)) + return PTR_ERR(intel_fb); + ifbdev->fb = fb; } else { drm_dbg_kms(&dev_priv->drm, "re-using BIOS fb\n"); prealloc = true; diff --git a/drivers/gpu/drm/i915/display/intel_fbdev_fb.c b/drivers/gpu/drm/i915/display/intel_fbdev_fb.c index 0665f943f65f..497525ef9668 100644 --- a/drivers/gpu/drm/i915/display/intel_fbdev_fb.c +++ b/drivers/gpu/drm/i915/display/intel_fbdev_fb.c @@ -11,8 +11,8 @@ #include "intel_display_types.h" #include "intel_fbdev_fb.h" -struct drm_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper, - struct drm_fb_helper_surface_size *sizes) +struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper, + struct drm_fb_helper_surface_size *sizes) { struct drm_framebuffer *fb; struct drm_device *dev = helper->dev; @@ -63,7 +63,7 @@ struct drm_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper, fb = intel_framebuffer_create(obj, &mode_cmd); i915_gem_object_put(obj); - return fb; + return to_intel_framebuffer(fb); } int intel_fbdev_fb_fill_info(struct drm_i915_private *i915, struct fb_info *info, diff --git a/drivers/gpu/drm/i915/display/intel_fbdev_fb.h b/drivers/gpu/drm/i915/display/intel_fbdev_fb.h index a395b2c65d33..82e8e7cc007b 100644 --- a/drivers/gpu/drm/i915/display/intel_fbdev_fb.h +++ b/drivers/gpu/drm/i915/display/intel_fbdev_fb.h @@ -12,9 +12,10 @@ struct drm_i915_gem_object; struct drm_i915_private; struct fb_info; struct i915_vma; +struct intel_framebuffer; -struct drm_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper, - struct drm_fb_helper_surface_size *sizes); +struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper, + struct drm_fb_helper_surface_size *sizes); int intel_fbdev_fb_fill_info(struct drm_i915_private *i915, struct fb_info *info, struct drm_i915_gem_object *obj, struct i915_vma *vma); From patchwork Mon May 6 12:57:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13655425 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2D7D6C10F16 for ; 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X-CSE-ConnectionGUID: jySEd/n7Rz6ez7v3G8557w== X-CSE-MsgGUID: mGNiaT6BR8yHsuGnphxUXQ== X-IronPort-AV: E=McAfee;i="6600,9927,11065"; a="10865343" X-IronPort-AV: E=Sophos;i="6.07,258,1708416000"; d="scan'208";a="10865343" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 May 2024 05:57:45 -0700 X-CSE-ConnectionGUID: +Vg95iiYQNihNwu80v5BSA== X-CSE-MsgGUID: /mDxxbyPTkW/r8jg3BZSzg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,258,1708416000"; d="scan'208";a="28164954" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 06 May 2024 05:57:42 -0700 Received: by stinkbox (sSMTP sendmail emulation); Mon, 06 May 2024 15:57:42 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org Subject: [PATCH 8/9] drm/i915: Cleanup fbdev fb setup Date: Mon, 6 May 2024 15:57:17 +0300 Message-ID: <20240506125718.26001-9-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240506125718.26001-1-ville.syrjala@linux.intel.com> References: <20240506125718.26001-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä We use a mix of 'fb' vs. 'ifbdev->fb' in the same function. Both should be pointing at the same thing. Make things less confusing by just getting existing fb from 'ifbdev->fb' at the start and then sticking with the local 'fb' until the very end. And we'll also change intel_fbdev_fb_alloc() to return struct intel_fb instead of struct drm_framebuffer so that we don't have to have yet another alias for the same thing. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_fbdev.c | 39 +++++++++++----------- 1 file changed, 20 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c index 0d79ec1a6427..e898018ab76a 100644 --- a/drivers/gpu/drm/i915/display/intel_fbdev.c +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c @@ -175,7 +175,7 @@ static int intelfb_create(struct drm_fb_helper *helper, struct drm_fb_helper_surface_size *sizes) { struct intel_fbdev *ifbdev = to_intel_fbdev(helper); - struct intel_framebuffer *intel_fb = ifbdev->fb; + struct intel_framebuffer *fb = ifbdev->fb; struct drm_device *dev = helper->dev; struct drm_i915_private *dev_priv = to_i915(dev); const struct i915_gtt_view view = { @@ -195,30 +195,30 @@ static int intelfb_create(struct drm_fb_helper *helper, if (ret) return ret; - if (intel_fb && - (sizes->fb_width > intel_fb->base.width || - sizes->fb_height > intel_fb->base.height)) { + ifbdev->fb = NULL; + + if (fb && + (sizes->fb_width > fb->base.width || + sizes->fb_height > fb->base.height)) { drm_dbg_kms(&dev_priv->drm, "BIOS fb too small (%dx%d), we require (%dx%d)," " releasing it\n", - intel_fb->base.width, intel_fb->base.height, + fb->base.width, fb->base.height, sizes->fb_width, sizes->fb_height); - drm_framebuffer_put(&intel_fb->base); - intel_fb = ifbdev->fb = NULL; + drm_framebuffer_put(&fb->base); + fb = NULL; } - if (!intel_fb || drm_WARN_ON(dev, !intel_fb_obj(&intel_fb->base))) { - struct intel_framebuffer *fb; + if (!fb || drm_WARN_ON(dev, !intel_fb_obj(&fb->base))) { drm_dbg_kms(&dev_priv->drm, "no BIOS fb, allocating a new one\n"); - intel_fb = intel_fbdev_fb_alloc(helper, sizes); - if (IS_ERR(intel_fb)) - return PTR_ERR(intel_fb); - ifbdev->fb = fb; + fb = intel_fbdev_fb_alloc(helper, sizes); + if (IS_ERR(fb)) + return PTR_ERR(fb); } else { drm_dbg_kms(&dev_priv->drm, "re-using BIOS fb\n"); prealloc = true; - sizes->fb_width = intel_fb->base.width; - sizes->fb_height = intel_fb->base.height; + sizes->fb_width = fb->base.width; + sizes->fb_height = fb->base.height; } wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); @@ -227,7 +227,7 @@ static int intelfb_create(struct drm_fb_helper *helper, * This also validates that any existing fb inherited from the * BIOS is suitable for own access. */ - vma = intel_pin_and_fence_fb_obj(&ifbdev->fb->base, false, + vma = intel_pin_and_fence_fb_obj(&fb->base, false, &view, false, &flags); if (IS_ERR(vma)) { ret = PTR_ERR(vma); @@ -241,11 +241,11 @@ static int intelfb_create(struct drm_fb_helper *helper, goto out_unpin; } - ifbdev->helper.fb = &ifbdev->fb->base; + ifbdev->helper.fb = &fb->base; info->fbops = &intelfb_ops; - obj = intel_fb_obj(&intel_fb->base); + obj = intel_fb_obj(&fb->base); ret = intel_fbdev_fb_fill_info(dev_priv, info, obj, vma); if (ret) @@ -263,8 +263,9 @@ static int intelfb_create(struct drm_fb_helper *helper, /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */ drm_dbg_kms(&dev_priv->drm, "allocated %dx%d fb: 0x%08x\n", - ifbdev->fb->base.width, ifbdev->fb->base.height, + fb->base.width, fb->base.height, i915_ggtt_offset(vma)); + ifbdev->fb = fb; ifbdev->vma = vma; ifbdev->vma_flags = flags; From patchwork Mon May 6 12:57:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13655426 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A3FCFC10F16 for ; Mon, 6 May 2024 12:57:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E30C110F7D9; Mon, 6 May 2024 12:57:48 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Ig0q0uWb"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0690E10F8C6; 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06 May 2024 05:57:48 -0700 X-CSE-ConnectionGUID: j07OAAb+SWKlPs+1q7WIFA== X-CSE-MsgGUID: j7vYUwlVRpioOrpIKxKzug== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,258,1708416000"; d="scan'208";a="28164955" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 06 May 2024 05:57:45 -0700 Received: by stinkbox (sSMTP sendmail emulation); Mon, 06 May 2024 15:57:45 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org Subject: [PATCH 9/9] drm/i915: Rename the fb pinning functions to indicate the address space Date: Mon, 6 May 2024 15:57:18 +0300 Message-ID: <20240506125718.26001-10-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240506125718.26001-1-ville.syrjala@linux.intel.com> References: <20240506125718.26001-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Rename the fb pinning functions such that their name directly informs us what gets pinned into which address space. Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_dpt.c | 6 +-- drivers/gpu/drm/i915/display/intel_dpt.h | 6 +-- drivers/gpu/drm/i915/display/intel_fb_pin.c | 46 +++++++++---------- drivers/gpu/drm/i915/display/intel_fb_pin.h | 12 ++--- drivers/gpu/drm/i915/display/intel_fbdev.c | 8 ++-- drivers/gpu/drm/xe/display/xe_fb_pin.c | 12 ++--- drivers/gpu/drm/xe/display/xe_plane_initial.c | 4 +- 7 files changed, 47 insertions(+), 47 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers/gpu/drm/i915/display/intel_dpt.c index 786d3f2e94c7..73a1918e2537 100644 --- a/drivers/gpu/drm/i915/display/intel_dpt.c +++ b/drivers/gpu/drm/i915/display/intel_dpt.c @@ -121,8 +121,8 @@ static void dpt_cleanup(struct i915_address_space *vm) i915_gem_object_put(dpt->obj); } -struct i915_vma *intel_dpt_pin(struct i915_address_space *vm, - unsigned int alignment) +struct i915_vma *intel_dpt_pin_to_ggtt(struct i915_address_space *vm, + unsigned int alignment) { struct drm_i915_private *i915 = vm->i915; struct i915_dpt *dpt = i915_vm_to_dpt(vm); @@ -173,7 +173,7 @@ struct i915_vma *intel_dpt_pin(struct i915_address_space *vm, return err ? ERR_PTR(err) : vma; } -void intel_dpt_unpin(struct i915_address_space *vm) +void intel_dpt_unpin_from_ggtt(struct i915_address_space *vm) { struct i915_dpt *dpt = i915_vm_to_dpt(vm); diff --git a/drivers/gpu/drm/i915/display/intel_dpt.h b/drivers/gpu/drm/i915/display/intel_dpt.h index f467578a4950..ff18a525bfbe 100644 --- a/drivers/gpu/drm/i915/display/intel_dpt.h +++ b/drivers/gpu/drm/i915/display/intel_dpt.h @@ -13,9 +13,9 @@ struct i915_vma; struct intel_framebuffer; void intel_dpt_destroy(struct i915_address_space *vm); -struct i915_vma *intel_dpt_pin(struct i915_address_space *vm, - unsigned int alignment); -void intel_dpt_unpin(struct i915_address_space *vm); +struct i915_vma *intel_dpt_pin_to_ggtt(struct i915_address_space *vm, + unsigned int alignment); +void intel_dpt_unpin_from_ggtt(struct i915_address_space *vm); void intel_dpt_suspend(struct drm_i915_private *i915); void intel_dpt_resume(struct drm_i915_private *i915); struct i915_address_space * diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c index 7971656982a6..1acc11fa19f4 100644 --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c @@ -18,11 +18,11 @@ #include "intel_fb_pin.h" static struct i915_vma * -intel_pin_fb_obj_dpt(const struct drm_framebuffer *fb, - const struct i915_gtt_view *view, - unsigned int alignment, - unsigned long *out_flags, - struct i915_address_space *vm) +intel_fb_pin_to_dpt(const struct drm_framebuffer *fb, + const struct i915_gtt_view *view, + unsigned int alignment, + unsigned long *out_flags, + struct i915_address_space *vm) { struct drm_device *dev = fb->dev; struct drm_i915_private *dev_priv = to_i915(dev); @@ -102,11 +102,11 @@ intel_pin_fb_obj_dpt(const struct drm_framebuffer *fb, } struct i915_vma * -intel_pin_and_fence_fb_obj(const struct drm_framebuffer *fb, - bool phys_cursor, - const struct i915_gtt_view *view, - bool uses_fence, - unsigned long *out_flags) +intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb, + bool phys_cursor, + const struct i915_gtt_view *view, + bool uses_fence, + unsigned long *out_flags) { struct drm_device *dev = fb->dev; struct drm_i915_private *dev_priv = to_i915(dev); @@ -226,7 +226,7 @@ intel_pin_and_fence_fb_obj(const struct drm_framebuffer *fb, return vma; } -void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags) +void intel_fb_unpin_vma(struct i915_vma *vma, unsigned long flags) { if (flags & PLANE_HAS_FENCE) i915_vma_unpin_fence(vma); @@ -242,10 +242,10 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state) struct i915_vma *vma; if (!intel_fb_uses_dpt(&fb->base)) { - vma = intel_pin_and_fence_fb_obj(&fb->base, intel_plane_needs_physical(plane), - &plane_state->view.gtt, - intel_plane_uses_fence(plane_state), - &plane_state->flags); + vma = intel_fb_pin_to_ggtt(&fb->base, intel_plane_needs_physical(plane), + &plane_state->view.gtt, + intel_plane_uses_fence(plane_state), + &plane_state->flags); if (IS_ERR(vma)) return PTR_ERR(vma); @@ -263,17 +263,17 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state) } else { unsigned int alignment = intel_surf_alignment(&fb->base, 0); - vma = intel_dpt_pin(fb->dpt_vm, alignment / 512); + vma = intel_dpt_pin_to_ggtt(fb->dpt_vm, alignment / 512); if (IS_ERR(vma)) return PTR_ERR(vma); plane_state->ggtt_vma = vma; - vma = intel_pin_fb_obj_dpt(&fb->base, &plane_state->view.gtt, - alignment, &plane_state->flags, - fb->dpt_vm); + vma = intel_fb_pin_to_dpt(&fb->base, &plane_state->view.gtt, + alignment, &plane_state->flags, + fb->dpt_vm); if (IS_ERR(vma)) { - intel_dpt_unpin(fb->dpt_vm); + intel_dpt_unpin_from_ggtt(fb->dpt_vm); plane_state->ggtt_vma = NULL; return PTR_ERR(vma); } @@ -295,14 +295,14 @@ void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state) if (!intel_fb_uses_dpt(&fb->base)) { vma = fetch_and_zero(&old_plane_state->ggtt_vma); if (vma) - intel_unpin_fb_vma(vma, old_plane_state->flags); + intel_fb_unpin_vma(vma, old_plane_state->flags); } else { vma = fetch_and_zero(&old_plane_state->dpt_vma); if (vma) - intel_unpin_fb_vma(vma, old_plane_state->flags); + intel_fb_unpin_vma(vma, old_plane_state->flags); vma = fetch_and_zero(&old_plane_state->ggtt_vma); if (vma) - intel_dpt_unpin(fb->dpt_vm); + intel_dpt_unpin_from_ggtt(fb->dpt_vm); } } diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h index edcebe75afd7..3f8245edcd15 100644 --- a/drivers/gpu/drm/i915/display/intel_fb_pin.h +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h @@ -14,13 +14,13 @@ struct intel_plane_state; struct i915_gtt_view; struct i915_vma * -intel_pin_and_fence_fb_obj(const struct drm_framebuffer *fb, - bool phys_cursor, - const struct i915_gtt_view *view, - bool uses_fence, - unsigned long *out_flags); +intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb, + bool phys_cursor, + const struct i915_gtt_view *view, + bool uses_fence, + unsigned long *out_flags); -void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags); +void intel_fb_unpin_vma(struct i915_vma *vma, unsigned long flags); int intel_plane_pin_fb(struct intel_plane_state *plane_state); void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state); diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c index e898018ab76a..5ad0b4c8a0fd 100644 --- a/drivers/gpu/drm/i915/display/intel_fbdev.c +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c @@ -146,7 +146,7 @@ static void intel_fbdev_fb_destroy(struct fb_info *info) * the info->screen_base mmaping. Leaking the VMA is simpler than * trying to rectify all the possible error paths leading here. */ - intel_unpin_fb_vma(ifbdev->vma, ifbdev->vma_flags); + intel_fb_unpin_vma(ifbdev->vma, ifbdev->vma_flags); drm_framebuffer_remove(&ifbdev->fb->base); drm_client_release(&fb_helper->client); @@ -227,8 +227,8 @@ static int intelfb_create(struct drm_fb_helper *helper, * This also validates that any existing fb inherited from the * BIOS is suitable for own access. */ - vma = intel_pin_and_fence_fb_obj(&fb->base, false, - &view, false, &flags); + vma = intel_fb_pin_to_ggtt(&fb->base, false, + &view, false, &flags); if (IS_ERR(vma)) { ret = PTR_ERR(vma); goto out_unlock; @@ -274,7 +274,7 @@ static int intelfb_create(struct drm_fb_helper *helper, return 0; out_unpin: - intel_unpin_fb_vma(vma, flags); + intel_fb_unpin_vma(vma, flags); out_unlock: intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); return ret; diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c index 8b7ca3268834..36e15c4961c1 100644 --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c @@ -333,18 +333,18 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma) } struct i915_vma * -intel_pin_and_fence_fb_obj(const struct drm_framebuffer *fb, - bool phys_cursor, - const struct i915_gtt_view *view, - bool uses_fence, - unsigned long *out_flags) +intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb, + bool phys_cursor, + const struct i915_gtt_view *view, + bool uses_fence, + unsigned long *out_flags) { *out_flags = 0; return __xe_pin_fb_vma(to_intel_framebuffer(fb), view); } -void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags) +void intel_fb_unpin_vma(struct i915_vma *vma, unsigned long flags) { __xe_unpin_fb_vma(vma); } diff --git a/drivers/gpu/drm/xe/display/xe_plane_initial.c b/drivers/gpu/drm/xe/display/xe_plane_initial.c index 9693c56d386b..9eaa29e733e1 100644 --- a/drivers/gpu/drm/xe/display/xe_plane_initial.c +++ b/drivers/gpu/drm/xe/display/xe_plane_initial.c @@ -211,8 +211,8 @@ intel_find_initial_plane_obj(struct intel_crtc *crtc, intel_fb_fill_view(to_intel_framebuffer(fb), plane_state->uapi.rotation, &plane_state->view); - vma = intel_pin_and_fence_fb_obj(fb, false, &plane_state->view.gtt, - false, &plane_state->flags); + vma = intel_fb_pin_to_ggtt(fb, false, &plane_state->view.gtt, + false, &plane_state->flags); if (IS_ERR(vma)) goto nofb;