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Tue, 7 May 2024 14:51:28 -0400 (EDT) From: Jiaxun Yang Date: Tue, 07 May 2024 19:51:19 +0100 Subject: [PATCH 1/4] MIPS: kvm: Declare prototype for kvm_init_loongson_ipi Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240507-loongson64-warnings-v1-1-2cad88344e9e@flygoat.com> References: <20240507-loongson64-warnings-v1-0-2cad88344e9e@flygoat.com> In-Reply-To: <20240507-loongson64-warnings-v1-0-2cad88344e9e@flygoat.com> To: Huacai Chen , Thomas Bogendoerfer , Aleksandar Markovic , Paolo Bonzini , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Jiaxun Yang , linux-mips@vger.kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1825; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=5ffs84l0W4DH7LDClMfPZZbVMp6HzHYo0bO60hFm+vk=; b=owGbwMvMwCHmXMhTe71c8zDjabUkhjSrCt3eiSbHbvWJ5HpZzVVlObxs3+IYvy79rOZbp/+8P Zz1tJOzo5SFQYyDQVZMkSVEQKlvQ+PFBdcfZP2BmcPKBDKEgYtTACZy6DjDf88l3C9Mf+jYBf0p uMyydGVb0bu/FwUm/GS+3JGmUrE7to+R4V/D6dOqi+ZK7Y+KjRZKC169f/qnvl18leuCLlx6+/z SGQYA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Declear prototype for kvm_init_loongson_ipi in interrupt.h. Fix warning: arch/mips/kvm/loongson_ipi.c:190:6: warning: no previous prototype for ‘kvm_init_loongson_ipi’ [-Wmissing-prototypes] 190 | void kvm_init_loongson_ipi(struct kvm *kvm) | ^~~~~~~~~~~~~~~~~~~~~ Fixes: f21db3090de2 ("KVM: MIPS: Add Loongson-3 Virtual IPI interrupt support") Signed-off-by: Jiaxun Yang Reviewed-by: Philippe Mathieu-Daudé --- arch/mips/kvm/interrupt.h | 4 ++++ arch/mips/kvm/loongson_ipi.c | 2 ++ arch/mips/kvm/mips.c | 2 -- 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/mips/kvm/interrupt.h b/arch/mips/kvm/interrupt.h index e529ea2bb34b..07bc0160bc94 100644 --- a/arch/mips/kvm/interrupt.h +++ b/arch/mips/kvm/interrupt.h @@ -37,3 +37,7 @@ u32 kvm_irq_to_priority(u32 irq); int kvm_mips_pending_timer(struct kvm_vcpu *vcpu); void kvm_mips_deliver_interrupts(struct kvm_vcpu *vcpu, u32 cause); + +#ifdef CONFIG_CPU_LOONGSON64 +extern void kvm_init_loongson_ipi(struct kvm *kvm); +#endif diff --git a/arch/mips/kvm/loongson_ipi.c b/arch/mips/kvm/loongson_ipi.c index 5d53f32d837c..6ac83a31148c 100644 --- a/arch/mips/kvm/loongson_ipi.c +++ b/arch/mips/kvm/loongson_ipi.c @@ -10,6 +10,8 @@ #include +#include "interrupt.h" + #define IPI_BASE 0x3ff01000ULL #define CORE0_STATUS_OFF 0x000 diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c index 231ac052b506..56fedfbe9455 100644 --- a/arch/mips/kvm/mips.c +++ b/arch/mips/kvm/mips.c @@ -135,8 +135,6 @@ void kvm_arch_hardware_disable(void) kvm_mips_callbacks->hardware_disable(); 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Tue, 7 May 2024 14:51:31 -0400 (EDT) From: Jiaxun Yang Date: Tue, 07 May 2024 19:51:20 +0100 Subject: [PATCH 2/4] MIPS: Loongson64: Include bootinfo.h in dma.c Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240507-loongson64-warnings-v1-2-2cad88344e9e@flygoat.com> References: <20240507-loongson64-warnings-v1-0-2cad88344e9e@flygoat.com> In-Reply-To: <20240507-loongson64-warnings-v1-0-2cad88344e9e@flygoat.com> To: Huacai Chen , Thomas Bogendoerfer , Aleksandar Markovic , Paolo Bonzini , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Jiaxun Yang , linux-mips@vger.kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=850; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=KdcCNVcmeZ72AJl9E3GrBg4pv9vxdHO3/iu3xmIRyOc=; b=owGbwMvMwCHmXMhTe71c8zDjabUkhjSrCt19Cg9ZDwfv6RXZ2hdrOvlqyK9zqWqOW7fx33s3f VWW653YjlIWBjEOBlkxRZYQAaW+DY0XF1x/kPUHZg4rE8gQBi5OAZjISV2GfyZ3zOwcXlyO6dgl xGZ8VnrFhVXp3zZ9OPI32HVDj86//KUM/9NT1ncu2fzXNatevlzkuE7Co6WrGEMUDy8T8g89E2s qwgoA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 dma.c defined function plat_swiotlb_setup, which is declared in bootinfo.h. Fixes warning: arch/mips/loongson64/dma.c:25:13: warning: no previous prototype for ‘plat_swiotlb_setup’ [-Wmissing-prototypes] 25 | void __init plat_swiotlb_setup(void) | ^~~~~~~~~~~~~~~~~~ Signed-off-by: Jiaxun Yang Reviewed-by: Philippe Mathieu-Daudé --- arch/mips/loongson64/dma.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/mips/loongson64/dma.c b/arch/mips/loongson64/dma.c index 8220a1bc0db6..52801442ea86 100644 --- a/arch/mips/loongson64/dma.c +++ b/arch/mips/loongson64/dma.c @@ -2,6 +2,7 @@ #include #include #include +#include #include dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) From patchwork Tue May 7 18:51:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 13657612 Received: from wfhigh2-smtp.messagingengine.com (wfhigh2-smtp.messagingengine.com [64.147.123.153]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B849316EBFA; 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Tue, 7 May 2024 14:51:34 -0400 (EDT) From: Jiaxun Yang Date: Tue, 07 May 2024 19:51:21 +0100 Subject: [PATCH 3/4] MIPS: Loongson64: DTS: Fix msi node for ls7a Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240507-loongson64-warnings-v1-3-2cad88344e9e@flygoat.com> References: <20240507-loongson64-warnings-v1-0-2cad88344e9e@flygoat.com> In-Reply-To: <20240507-loongson64-warnings-v1-0-2cad88344e9e@flygoat.com> To: Huacai Chen , Thomas Bogendoerfer , Aleksandar Markovic , Paolo Bonzini , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Jiaxun Yang , linux-mips@vger.kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1245; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=doDoiKRSbEFEcvi9ZrcFTFMihJG9CKo4cq0xfaJMhhc=; b=owGbwMvMwCHmXMhTe71c8zDjabUkhjSrCl3b2Rw9kYeuWwU31pzNnypR9UJ/hnGdjXXVJUd5D VWGo54dpSwMYhwMsmKKLCECSn0bGi8uuP4g6w/MHFYmkCEMXJwCMJE/Oxn+ykWyyC6/GS2lZSfl nM4vyn7k8qOPv//feOAbo5G9bWa7CSPDkZcXrx2aNEv02S8edcfWZS0rBJm9nCqmFi5Kvr91nnQ XJwA= X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Add it to silent warning: arch/mips/boot/dts/loongson/ls7a-pch.dtsi:68.16-416.5: Warning (interrupt_provider): /bus@10000000/pci@1a000000: '#interrupt-cells' found, but node is not an interrupt provider arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts:32.31-40.4: Warning (interrupt_provider): /bus@10000000/msi-controller@2ff00000: Missing '#interrupt-cells' in interrupt provider arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dtb: Warning (interrupt_map): Failed prerequisite 'interrupt_provider' Signed-off-by: Jiaxun Yang --- arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts b/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts index c945f8565d54..fb180cb2b8e2 100644 --- a/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts +++ b/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts @@ -33,6 +33,7 @@ msi: msi-controller@2ff00000 { compatible = "loongson,pch-msi-1.0"; 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Tue, 7 May 2024 14:51:38 -0400 (EDT) From: Jiaxun Yang Date: Tue, 07 May 2024 19:51:22 +0100 Subject: [PATCH 4/4] MIPS: Loongson64: DTS: Fix PCIe port nodes for ls7a Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240507-loongson64-warnings-v1-4-2cad88344e9e@flygoat.com> References: <20240507-loongson64-warnings-v1-0-2cad88344e9e@flygoat.com> In-Reply-To: <20240507-loongson64-warnings-v1-0-2cad88344e9e@flygoat.com> To: Huacai Chen , Thomas Bogendoerfer , Aleksandar Markovic , Paolo Bonzini , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Jiaxun Yang , linux-mips@vger.kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4399; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=NkwgO3Xx+CZsPTw6Ct6xNfXjIzDoPYKA1nrX18S20Ho=; b=owGbwMvMwCHmXMhTe71c8zDjabUkhjSrCt1Ky+OVNZtkZycEOfxuE460CH8r1HhS1ezpyfOL9 hU2LYnuKGVhEONgkBVTZAkRUOrb0HhxwfUHWX9g5rAygQxh4OIUgInYv2dk+LVD0Dv/b+xmaZNT SQGST+bvnVecZcpz1PBp2JnqhNZblxgZdjAkVtSUxS71Kxbk37pJuuew/cL9v56kFlQ+er1GqGo LGwA= X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Add various required properties to silent warnings: arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi:116.16-297.5: Warning (interrupt_provider): /bus@10000000/pci@1a000000: '#interrupt-cells' found, but node is not an interrupt provider arch/mips/boot/dts/loongson/loongson64_2core_2k1000.dtb: Warning (interrupt_map): Failed prerequisite 'interrupt_provider' Signed-off-by: Jiaxun Yang --- arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi | 37 ++++++++++++++++++---- 1 file changed, 30 insertions(+), 7 deletions(-) diff --git a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi index ee3e2153dd13..b5593f7cc383 100644 --- a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi +++ b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi @@ -118,7 +118,6 @@ pci@1a000000 { device_type = "pci"; #address-cells = <3>; #size-cells = <2>; - #interrupt-cells = <2>; reg = <0 0x1a000000 0 0x02000000>, <0xfe 0x00000000 0 0x20000000>; @@ -204,93 +203,117 @@ sata@8,0 { interrupt-parent = <&liointc0>; }; - pci_bridge@9,0 { + pcie@9,0 { compatible = "pci0014,7a19.0", "pci0014,7a19", "pciclass060400", "pciclass0604"; reg = <0x4800 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&liointc1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &liointc1 0 IRQ_TYPE_LEVEL_LOW>; + ranges; external-facing; }; - pci_bridge@a,0 { + pcie@a,0 { compatible = "pci0014,7a09.0", "pci0014,7a09", "pciclass060400", "pciclass0604"; reg = <0x5000 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupts = <1 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&liointc1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &liointc1 1 IRQ_TYPE_LEVEL_LOW>; + ranges; external-facing; }; - pci_bridge@b,0 { + pcie@b,0 { compatible = "pci0014,7a09.0", "pci0014,7a09", "pciclass060400", "pciclass0604"; reg = <0x5800 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupts = <2 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&liointc1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &liointc1 2 IRQ_TYPE_LEVEL_LOW>; + ranges; external-facing; }; - pci_bridge@c,0 { + pcie@c,0 { compatible = "pci0014,7a09.0", "pci0014,7a09", "pciclass060400", "pciclass0604"; reg = <0x6000 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupts = <3 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&liointc1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &liointc1 3 IRQ_TYPE_LEVEL_LOW>; + ranges; external-facing; }; - pci_bridge@d,0 { + pcie@d,0 { compatible = "pci0014,7a19.0", "pci0014,7a19", "pciclass060400", "pciclass0604"; reg = <0x6800 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupts = <4 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&liointc1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &liointc1 4 IRQ_TYPE_LEVEL_LOW>; + ranges; external-facing; }; - pci_bridge@e,0 { + pcie@e,0 { compatible = "pci0014,7a09.0", "pci0014,7a09", "pciclass060400", "pciclass0604"; reg = <0x7000 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; #interrupt-cells = <1>; interrupts = <5 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&liointc1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &liointc1 5 IRQ_TYPE_LEVEL_LOW>; + ranges; external-facing; };