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([2a01:4262:1ab:c:8ce6:9eb:cd7b:fcdd]) by smtp.gmail.com with ESMTPSA id co22-20020a0564020c1600b00572a865af10sm7513556edb.44.2024.05.08.04.16.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 May 2024 04:16:06 -0700 (PDT) From: Emil Renner Berthing To: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Emil Renner Berthing , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou Subject: [PATCH v1 1/2] riscv: dts: starfive: Add JH7100 high speed UARTs Date: Wed, 8 May 2024 13:15:54 +0200 Message-ID: <20240508111604.887466-2-emil.renner.berthing@canonical.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240508111604.887466-1-emil.renner.berthing@canonical.com> References: <20240508111604.887466-1-emil.renner.berthing@canonical.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240508_041612_277758_D94FA4B1 X-CRM114-Status: GOOD ( 10.01 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Emil Renner Berthing Add missing device tree nodes for UART0 and UART1 on the StarFive JH7100 SoC. UART0 is used for Bluetooth on the BeagleV Starlight and StarFive VisionFive V1 boards. Signed-off-by: Emil Renner Berthing --- arch/riscv/boot/dts/starfive/jh7100.dtsi | 26 ++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index 9a2e9583af88..34c1622d5496 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -258,6 +258,32 @@ sysmain: syscon@11850000 { reg = <0x0 0x11850000 0x0 0x10000>; }; + uart0: serial@11870000 { + compatible = "starfive,jh7100-hsuart", "snps,dw-apb-uart"; + reg = <0x0 0x11870000 0x0 0x10000>; + clocks = <&clkgen JH7100_CLK_UART0_CORE>, + <&clkgen JH7100_CLK_UART0_APB>; + clock-names = "baudclk", "apb_pclk"; + resets = <&rstgen JH7100_RSTN_UART0_APB>; + interrupts = <92>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart1: serial@11880000 { + compatible = "starfive,jh7100-hsuart", "snps,dw-apb-uart"; + reg = <0x0 0x11880000 0x0 0x10000>; + clocks = <&clkgen JH7100_CLK_UART1_CORE>, + <&clkgen JH7100_CLK_UART1_APB>; + clock-names = "baudclk", "apb_pclk"; + resets = <&rstgen JH7100_RSTN_UART1_APB>; + interrupts = <93>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + i2c0: i2c@118b0000 { compatible = "snps,designware-i2c"; reg = <0x0 0x118b0000 0x0 0x10000>; From patchwork Wed May 8 11:15:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Emil Renner Berthing X-Patchwork-Id: 13658572 X-Patchwork-Delegate: mail@conchuod.ie Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1793BC04FFE for ; Wed, 8 May 2024 11:16:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; 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([2a01:4262:1ab:c:8ce6:9eb:cd7b:fcdd]) by smtp.gmail.com with ESMTPSA id co22-20020a0564020c1600b00572a865af10sm7513556edb.44.2024.05.08.04.16.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 May 2024 04:16:07 -0700 (PDT) From: Emil Renner Berthing To: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Emil Renner Berthing , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou Subject: [PATCH v1 2/2] riscv: dts: starfive: Enable Bluetooth on JH7100 boards Date: Wed, 8 May 2024 13:15:55 +0200 Message-ID: <20240508111604.887466-3-emil.renner.berthing@canonical.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240508111604.887466-1-emil.renner.berthing@canonical.com> References: <20240508111604.887466-1-emil.renner.berthing@canonical.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240508_041613_492368_E42A3409 X-CRM114-Status: GOOD ( 10.12 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Emil Renner Berthing Add pinctrl and UART nodes for the Broadcom Wifi/Bluetooth module on the BeagleV Starlight and StarFive VisionFive V1 boards. Signed-off-by: Emil Renner Berthing --- .../boot/dts/starfive/jh7100-common.dtsi | 49 +++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi index ae1a6aeb0aea..1f79481bfd96 100644 --- a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi @@ -289,6 +289,41 @@ GPO_SDIO1_PAD_CDATA_OEN_BIT3, }; }; + uart0_pins: uart0-0 { + rx-pins { + pinmux = ; + bias-pull-up; + drive-strength = <14>; + input-enable; + input-schmitt-enable; + }; + tx-pins { + pinmux = ; + bias-disable; + drive-strength = <35>; + input-disable; + input-schmitt-disable; + }; + cts-pins { + pinmux = ; + bias-pull-down; + drive-strength = <14>; + input-enable; + input-schmitt-enable; + }; + rts-pins { + pinmux = ; + bias-disable; + drive-strength = <35>; + input-disable; + input-schmitt-disable; + }; + }; + uart3_pins: uart3-0 { rx-pins { pinmux = ; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "brcm,bcm4330-bt"; + max-speed = <4000000>; + device-wakeup-gpios = <&gpio 38 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio 35 GPIO_ACTIVE_LOW>; + }; +}; + &uart3 { pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>;