From patchwork Mon May 13 18:34:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 13663629 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3133D39FDA; Mon, 13 May 2024 18:34:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715625293; cv=none; b=SxHYDqJmBqcfYW9RYhMsLHFEhWt6ZIjGxJY7jemaE+F/AAgTfZp4vlutnwnlYi3tlPMzRTgtBjDUoVIyDFynxQQTFIFmhWbbaQuqED9w9M1C0qEhqlzRwhl2P8m6UAZC/hKwOioS8y91LOTtunBcAs5XdV9baV4c6SRezqKpfmM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715625293; c=relaxed/simple; bh=KqQPNppvpsU995OPOshxNkbcP7N8eLdA5LFYesXRmM8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=FoIp2axVx1Fj1oJWeJFQrIA036kjadr9rm56QCYEcu9RvqkaXlbXVtNimHDvodl6tcAQkdEfvYMwv8MTkBOsUXvYu6DHdKmx2iGA93dLSfwWTtAucH3vf/Tl9Eps9od/ltHKCbaqG1dUnLReMRlr6f16Lxec4olVpVylGRumXJU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=CVsohI0M; arc=none smtp.client-ip=217.70.183.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="CVsohI0M" Received: by mail.gandi.net (Postfix) with ESMTPSA id AF1461C0006; Mon, 13 May 2024 18:34:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1715625283; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=LjHxiGwEneE5uTpr514NpD7Z2HOF5k6gTq1OQGQ/GBI=; b=CVsohI0M3iecJjsysG39eaoJmMbKL85+g7Vy4ZNCuW9uhdXh/Pw19B9V3oC4g2hR+zWNKw 2+aq91fPEKpynP1dzHPMiwLIr4c1j2Q6I/vY74At6kWmTzrNje01Liv6BK+vt7aQZ8J2SH qAabMiUmSvSo+dlgSBFnPW/k2hMpJTAlxttZRN+zQISwKbv8tbc+v2YiPOfY8SnSiDTwBm BYSGSlEMnyUfItaLY/sd0kfMEiW0Gv38309FweHHHlUkUN+K3ZzRa078lgPK9yzJXl+UMK 8cwzGlJ2B4zOwfLXXBjhJiL6WXTu7kSt/cOPViMGOtJZ5AiPno3ZGF71W+tsxg== From: Gregory CLEMENT Date: Mon, 13 May 2024 20:34:15 +0200 Subject: [PATCH v2 1/3] dt-bindings: mips: Add bindings for a new Mobileye SoC EyeQ6H Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240513-eyeq6h-v2-1-ae8c1974b52b@bootlin.com> References: <20240513-eyeq6h-v2-0-ae8c1974b52b@bootlin.com> In-Reply-To: <20240513-eyeq6h-v2-0-ae8c1974b52b@bootlin.com> To: Vladimir Kondratiev , =?utf-8?q?Th?= =?utf-8?q?=C3=A9o_Lebrun?= , Thomas Bogendoerfer , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Tawfik Bayouk , Thomas Petazzoni , Alexandre Belloni , Gregory CLEMENT , Conor Dooley X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=905; i=gregory.clement@bootlin.com; h=from:subject:message-id; bh=KqQPNppvpsU995OPOshxNkbcP7N8eLdA5LFYesXRmM8=; b=owGbwMvMwCTIzSbRJ1JkfZXxtFoSQ5pTrD3HyjTZuY4qB5cVXn7qIsM4tdj6Go/+pJk8u7/KB Z+1V/7eEcvCIMjEICumyCKxsuCMeLm+xza75uswc1iZQIYwcHEKwEQidjIsWMfGwlzdwGpmuSvD q2ZmWEfdiT2BDPNsd4pK2T6Su5znPMvld6zOaj1xmxsA X-Developer-Key: i=gregory.clement@bootlin.com; a=openpgp; fpr=18A970CC17772F48B63E83D70B06188E14723BD5 X-GND-Sasl: gregory.clement@bootlin.com Add the yaml bindings for a new Mobileye SoC: EyeQ6H. Acked-by: Conor Dooley Signed-off-by: Gregory CLEMENT --- Documentation/devicetree/bindings/mips/mobileye.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/mips/mobileye.yaml b/Documentation/devicetree/bindings/mips/mobileye.yaml index 831975f6b479..d60744550e46 100644 --- a/Documentation/devicetree/bindings/mips/mobileye.yaml +++ b/Documentation/devicetree/bindings/mips/mobileye.yaml @@ -26,6 +26,11 @@ properties: - enum: - mobileye,eyeq5-epm5 - const: mobileye,eyeq5 + - description: Boards with Mobileye EyeQ6H SoC + items: + - enum: + - mobileye,eyeq6h-epm6 + - const: mobileye,eyeq6h additionalProperties: true From patchwork Mon May 13 18:34:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 13663630 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C5CF739FF3; Mon, 13 May 2024 18:34:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715625294; cv=none; b=jD2VVHlzCVhQlcsJMb2W6kOg6VFwKY3+J9WHlwz0w3l7eKGw1glr5co72MFSbOAYRGnKavsN1RfP0wOxTfKTSNqSgQ8H6b8hNNleIrv/CG9Re1/+dIOzVKzhdzybQjN+8737JhZ1lkE5WMTpHwcNcSACQzsYQL/ZP+hQMYfrZf8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715625294; c=relaxed/simple; bh=5L4PF1MuN9FINDE53jZdA0iON6eF1VWsTsr6jnAvX6w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=W4TCP5C426Ev8BC9CIzAzXbV/w9g9UlvlnXdxo1FnxcuyuAldLBhyQH2dH+DK2GwLIVWb+EuqW9dRz1k54OsFmnAgYQf7UxPz59yVNF21p4eZ/he7Clsqnu9YSkiLkpQZ5+XiCTRpW8xuB3x7wOr2axEh0FgtoqIsDM8na9Mkwg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=QCpqI7DP; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="QCpqI7DP" Received: by mail.gandi.net (Postfix) with ESMTPSA id 97BD31BF206; Mon, 13 May 2024 18:34:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1715625284; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5WQQb0M41PALx6op11WqqbYKjYLuqaG49UCcL2xitrs=; b=QCpqI7DPN/j0zrllSd2/kQbKrNSlMsDTeK/aCm7BX/M5fbPRW5ubU6Dc1YBwO9nihNvgrA CH1cpnqogv4fbN5jcjgGZm7kqPiBOGAZa2bZtr2wpKutd0hRmLLrBC1Umd2mD5b5C8PLK1 M4Ejy2cK0s7ouOTCoae86nisjDhUYDP85wiVFjYF3KTWtDE3h1Qi2eyeVKkkwUOIi4J6d2 cirw1EFDhlX1eGBRjYPtd0XP6nJXXwNLs+a6mdxm7hG/vbU6IKMgzU8X+z8SMk+TMvUMsy dLGfz+Qe817gdFQTyLyEB7uIHoG8FsiYVLd4Ysq20c5wmnBA+/mVf1LZ0s50qw== From: Gregory CLEMENT Date: Mon, 13 May 2024 20:34:16 +0200 Subject: [PATCH v2 2/3] MIPS: mobileye: Add EyeQ6H device tree Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240513-eyeq6h-v2-2-ae8c1974b52b@bootlin.com> References: <20240513-eyeq6h-v2-0-ae8c1974b52b@bootlin.com> In-Reply-To: <20240513-eyeq6h-v2-0-ae8c1974b52b@bootlin.com> To: Vladimir Kondratiev , =?utf-8?q?Th?= =?utf-8?q?=C3=A9o_Lebrun?= , Thomas Bogendoerfer , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Tawfik Bayouk , Thomas Petazzoni , Alexandre Belloni , Gregory CLEMENT X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=8481; i=gregory.clement@bootlin.com; h=from:subject:message-id; bh=5L4PF1MuN9FINDE53jZdA0iON6eF1VWsTsr6jnAvX6w=; b=owGbwMvMwCTIzSbRJ1JkfZXxtFoSQ5pTrP2mutCQppDOs2mqRUwGl0NT8l43luU0Tvxf4H+g5 qWNz6KOWBYGQSYGWTFFFomVBWfEy/U9ttk1X4eZw8oEMoSBi1MAJtIRyzA/x1RjVx37mwdLDbtz zZiVDR4U+J5gmO9x5Tjv/hxBBpl8LobG21uPNUz8+hkA X-Developer-Key: i=gregory.clement@bootlin.com; a=openpgp; fpr=18A970CC17772F48B63E83D70B06188E14723BD5 X-GND-Sasl: gregory.clement@bootlin.com EyeQ6H (or “High”) is an other SoC from Mobileye still based on the MIPS I6500 architecture as the EyeQ5. The 2 clusters of this SoC contains 4 cores which are capable of running 4 threads. Besides this, it features multiple controllers such as the classic UART, high speed I2C, SPI, as well as CAN-FD, PCIe Gen4, Octal/Quad SPI Flash interface, Gigabit Ethernet, MIPI CSI-2, MIPI DSI, and eMMC 5.1. It also includes a Hardware Security Module, Functional Safety Hardware, and video encoders and more. This commit provides the initial device tree files with support for UART, GPIO and pinctrl, as well as fixed clocked. Signed-off-by: Gregory CLEMENT --- arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts | 22 +++++ .../boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi | 52 ++++++++++++ arch/mips/boot/dts/mobileye/eyeq6h-pins.dtsi | 88 +++++++++++++++++++ arch/mips/boot/dts/mobileye/eyeq6h.dtsi | 98 ++++++++++++++++++++++ 4 files changed, 260 insertions(+) diff --git a/arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts b/arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts new file mode 100644 index 000000000000..ebc0d363fbf8 --- /dev/null +++ b/arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright 2024 Mobileye Vision Technologies Ltd. + */ + +/dts-v1/; + +#include "eyeq6h.dtsi" + +/ { + compatible = "mobileye,eyeq6-epm6", "mobileye,eyeq6"; + model = "Mobile EyeQ6H MP6 Evaluation board"; + + chosen { + stdout-path = "serial0:921600n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x1 0x00000000 0x1 0x00000000>; + }; +}; diff --git a/arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi b/arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi new file mode 100644 index 000000000000..5fa99e06fde7 --- /dev/null +++ b/arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright 2023 Mobileye Vision Technologies Ltd. + */ + +#include + +/ { + xtal: clock-30000000 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <30000000>; + }; + + pll_west: clock-2000000000-west { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <2000000000>; + }; + + pll_cpu: clock-2000000000-cpu { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <2000000000>; + }; + + /* pll-cpu derivatives */ + occ_cpu: clock-2000000000-occ-cpu { + compatible = "fixed-factor-clock"; + clocks = <&pll_cpu>; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + }; + + /* pll-west derivatives */ + occ_periph_w: clock-200000000 { + compatible = "fixed-factor-clock"; + clocks = <&pll_west>; + #clock-cells = <0>; + clock-div = <10>; + clock-mult = <1>; + }; + uart_clk: clock-200000000-uart { + compatible = "fixed-factor-clock"; + clocks = <&occ_periph_w>; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + }; + +}; diff --git a/arch/mips/boot/dts/mobileye/eyeq6h-pins.dtsi b/arch/mips/boot/dts/mobileye/eyeq6h-pins.dtsi new file mode 100644 index 000000000000..a3d1b3684893 --- /dev/null +++ b/arch/mips/boot/dts/mobileye/eyeq6h-pins.dtsi @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright 2024 Mobileye Vision Technologies Ltd. + */ + +/* + * MUX register structure + * bits | field | comment + * [0] | MUX_SEL | 0 - GPIO, 1 - alternative func + * [4] | SW_LOOPBACK| + * [5] | SW_OUT_HZ | + * [7] | DBG_IN | + * [11:8] | DS | drive strength + * [13:12] | PUD | pull-up/pull-down. 0, 3 - no, 1 - PD, 2 - PU + * [14] | OD | Open drain + * [15] | ST_CFG | Hysteretic input enable (Schmitt trigger) + */ + +&pinctrl_west { + // TODO: use pinctrl-single,bias-pullup + // TODO: use pinctrl-single,bias-pulldown + // TODO: use pinctrl-single,drive-strength + // TODO: use pinctrl-single,input-schmitt + + i2c0_pins: i2c0-pins { + pinctrl-single,pins = < + 0x000 0x200 // I2C0_SCL pin + 0x004 0x200 // I2C0_SDA pin + >; + }; + i2c1_pins: i2c1-pins { + pinctrl-single,pins = < + 0x008 0x200 // I2C1_SCL pin + 0x00c 0x200 // I2C1_SDA pin + >; + }; + eth0_pins: eth0-pins { + pinctrl-single,pins = < + 0x080 1 // GPIO_C4__SMA0_MDC pin + 0x084 1 // GPIO_C5__SMA0_MDIO pin + >; + }; + uart0_pins: uart0-pins { + pinctrl-single,pins = <0x0a8 1>; // UART0 pin group + }; + uart1_pins: uart1-pins { + pinctrl-single,pins = <0x0a0 1>; // UART1 pin group + }; + spi0_pins: spi0-pins { + pinctrl-single,pins = <0x0ac 1>; // SPI0 pin group + }; + spi1_pins: spi1-pins { + pinctrl-single,pins = <0x0a4 1>; // SPI1 pin group + }; +}; + +&pinctrl_east { + i2c2_pins: i2c2-pins { + pinctrl-single,pins = < + 0x000 0x200 // i2c2_SCL pin + 0x004 0x200 // i2c2_SDA pin + >; + }; + i2c3_pins: i2c3-pins { + pinctrl-single,pins = < + 0x008 0x200 // i2c3_SCL pin + 0x00c 0x200 // i2c3_SDA pin + >; + }; + eth1_pins: eth1-pins { + pinctrl-single,pins = < + 0x080 1 // GPIO_D4__SMA1_MDC pin + 0x084 1 // GPIO_D5__SMA1_MDIO pin + >; + }; + uart2_sel_pins: uart2-pins { + pinctrl-single,pins = <0x0a4 1>; // UART2 pin group + }; + uart3_pins: uart3-pins { + pinctrl-single,pins = <0x09c 1>; // UART3 pin group + }; + spi2_pins: spi2-pins { + pinctrl-single,pins = <0x0a8 1>; // SPI2 pin group + }; + spi3_pins: spi3-pins { + pinctrl-single,pins = <0x0a0 1>; // SPI3 pin group + }; +}; diff --git a/arch/mips/boot/dts/mobileye/eyeq6h.dtsi b/arch/mips/boot/dts/mobileye/eyeq6h.dtsi new file mode 100644 index 000000000000..1db3c3cda2e3 --- /dev/null +++ b/arch/mips/boot/dts/mobileye/eyeq6h.dtsi @@ -0,0 +1,98 @@ +// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +/* + * Copyright 2024 Mobileye Vision Technologies Ltd. + */ + +#include + +#include "eyeq6h-fixed-clocks.dtsi" + +/ { + #address-cells = <2>; + #size-cells = <2>; + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; + compatible = "img,i6500"; + reg = <0>; + clocks = <&occ_cpu>; + }; + }; + + aliases { + serial0 = &uart0; + }; + + cpu_intc: interrupt-controller { + compatible = "mti,cpu-interrupt-controller"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + + soc: soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + uart0: serial@d3331000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0 0xd3331000 0x0 0x1000>; + reg-io-width = <4>; + interrupt-parent = <&gic>; + interrupts = ; + clocks = <&occ_periph_w>, <&occ_periph_w>; + clock-names = "uartclk", "apb_pclk"; + }; + + pinctrl_west: pinctrl@d3337000 { + compatible = "pinctrl-single"; + reg = <0x0 0xd3337000 0x0 0xb0>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffff>; + }; + + pinctrl_east: pinctrl@d3357000 { + compatible = "pinctrl-single"; + reg = <0x0 0xd3357000 0x0 0xb0>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffff>; + }; + + pinctrl_south: pinctrl@d8014000 { + compatible = "pinctrl-single"; + reg = <0x0 0xd8014000 0x0 0xf8>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xffff>; + }; + + gic: interrupt-controller@f0920000 { + compatible = "mti,gic"; + reg = <0x0 0xf0920000 0x0 0x20000>; + interrupt-controller; + #interrupt-cells = <3>; + + /* + * Declare the interrupt-parent even though the mti,gic + * binding doesn't require it, such that the kernel can + * figure out that cpu_intc is the root interrupt + * controller & should be probed first. + */ + interrupt-parent = <&cpu_intc>; + + timer { + compatible = "mti,gic-timer"; + interrupts = ; + clocks = <&occ_cpu>; + }; + }; + }; +}; + +#include "eyeq6h-pins.dtsi" From patchwork Mon May 13 18:34:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 13663627 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC0363D3B8; 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a=openpgp-sha256; l=8811; i=gregory.clement@bootlin.com; h=from:subject:message-id; bh=lWp3qSP9yeWeEVRrF736edtP5bAdugOS1ziOGLFtlso=; b=owGbwMvMwCTIzSbRJ1JkfZXxtFoSQ5pTrL3TovnHLdXWOZ83kGLcIRQVNuNV9+zUt6/91Hl23 4x1TdnREcvCIMjEICumyCKxsuCMeLm+xza75uswc1iZQIYwcHEKwEQ2pTHM9z3U6azbfzGTyevJ 24leCgU1QtmZDPMjktdvNNS+vuLxtKmLHzv95w+aKd0OAA== X-Developer-Key: i=gregory.clement@bootlin.com; a=openpgp; fpr=18A970CC17772F48B63E83D70B06188E14723BD5 X-GND-Sasl: gregory.clement@bootlin.com EyeQ6H (or “High”) is an other SoC from Mobileye still based on the MIPS I6500 architecture as the EyeQ5. The 2 clusters of this SoC contains 4 cores which are capable of running 4 threads. Besides this, it features multiple controllers such as the classic UART, high speed I2C, SPI, as well as CAN-FD, PCIe Gen4, Octal/Quad SPI Flash interface, Gigabit Ethernet, MIPI CSI-2, MIPI DSI, and eMMC 5.1. It also includes a Hardware Security Module, Functional Safety Hardware, and video encoders and more. This commit provides the infrastructure to build a kernel running on EyeQ6H SoC. For now the support is limited and only one CPU core is running. Reviewed-by: Jiaxun Yang Signed-off-by: Gregory CLEMENT --- arch/mips/Kbuild.platforms | 2 +- arch/mips/Kconfig | 7 ++- arch/mips/boot/dts/Makefile | 2 +- arch/mips/boot/dts/mobileye/Makefile | 1 + arch/mips/configs/eyeq5_defconfig | 1 + arch/mips/configs/eyeq6_defconfig | 111 +++++++++++++++++++++++++++++++++++ arch/mips/mobileye/Kconfig | 26 ++++++++ arch/mips/mobileye/Platform | 1 + 8 files changed, 146 insertions(+), 5 deletions(-) diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms index 5c145b67d3bf..bca37ddf974b 100644 --- a/arch/mips/Kbuild.platforms +++ b/arch/mips/Kbuild.platforms @@ -8,6 +8,7 @@ platform-$(CONFIG_BCM47XX) += bcm47xx/ platform-$(CONFIG_BCM63XX) += bcm63xx/ platform-$(CONFIG_BMIPS_GENERIC) += bmips/ platform-$(CONFIG_CAVIUM_OCTEON_SOC) += cavium-octeon/ +platform-$(CONFIG_EYEQ) += mobileye/ platform-$(CONFIG_MIPS_COBALT) += cobalt/ platform-$(CONFIG_MACH_DECSTATION) += dec/ platform-$(CONFIG_MIPS_GENERIC) += generic/ @@ -17,7 +18,6 @@ platform-$(CONFIG_MACH_LOONGSON2EF) += loongson2ef/ platform-$(CONFIG_MACH_LOONGSON32) += loongson32/ platform-$(CONFIG_MACH_LOONGSON64) += loongson64/ platform-$(CONFIG_MIPS_MALTA) += mti-malta/ -platform-$(CONFIG_MACH_EYEQ5) += mobileye/ platform-$(CONFIG_MACH_NINTENDO64) += n64/ platform-$(CONFIG_PIC32MZDA) += pic32/ platform-$(CONFIG_RALINK) += ralink/ diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 516dc7022bd7..ac330b135346 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -575,8 +575,8 @@ config MACH_PIC32 Microchip PIC32 is a family of general-purpose 32 bit MIPS core microcontrollers. -config MACH_EYEQ5 - bool "Mobileye EyeQ5 SoC" +config EYEQ + bool "Mobileye EyeQ SoC" select MACH_GENERIC_CORE select ARM_AMBA select PHYSICAL_START_BOOL @@ -615,7 +615,7 @@ config MACH_EYEQ5 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN select USE_OF help - Select this to build a kernel supporting EyeQ5 SoC from Mobileye. + Select this to build a kernel supporting EyeQ SoC from Mobileye. bool @@ -1021,6 +1021,7 @@ source "arch/mips/generic/Kconfig" source "arch/mips/ingenic/Kconfig" source "arch/mips/jazz/Kconfig" source "arch/mips/lantiq/Kconfig" +source "arch/mips/mobileye/Kconfig" source "arch/mips/pic32/Kconfig" source "arch/mips/ralink/Kconfig" source "arch/mips/sgi-ip27/Kconfig" diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile index efff87cb33a9..e2476b12bb0c 100644 --- a/arch/mips/boot/dts/Makefile +++ b/arch/mips/boot/dts/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 subdir-$(CONFIG_BMIPS_GENERIC) += brcm subdir-$(CONFIG_CAVIUM_OCTEON_SOC) += cavium-octeon +subdir-$(CONFIG_EYEQ) += mobileye subdir-$(CONFIG_FIT_IMAGE_FDT_MARDUK) += img subdir-$(CONFIG_FIT_IMAGE_FDT_BOSTON) += img subdir-$(CONFIG_MACH_INGENIC) += ingenic @@ -8,7 +9,6 @@ subdir-$(CONFIG_LANTIQ) += lantiq subdir-$(CONFIG_MACH_LOONGSON64) += loongson subdir-$(CONFIG_SOC_VCOREIII) += mscc subdir-$(CONFIG_MIPS_MALTA) += mti -subdir-$(CONFIG_MACH_EYEQ5) += mobileye subdir-$(CONFIG_LEGACY_BOARD_SEAD3) += mti subdir-$(CONFIG_FIT_IMAGE_FDT_NI169445) += ni subdir-$(CONFIG_MACH_PIC32) += pic32 diff --git a/arch/mips/boot/dts/mobileye/Makefile b/arch/mips/boot/dts/mobileye/Makefile index 01c01c3aad81..7cc89968aaac 100644 --- a/arch/mips/boot/dts/mobileye/Makefile +++ b/arch/mips/boot/dts/mobileye/Makefile @@ -2,3 +2,4 @@ # Copyright 2023 Mobileye Vision Technologies Ltd. dtb-$(CONFIG_MACH_EYEQ5) += eyeq5-epm5.dtb +dtb-$(CONFIG_MACH_EYEQ6H) += eyeq6h-epm6.dtb diff --git a/arch/mips/configs/eyeq5_defconfig b/arch/mips/configs/eyeq5_defconfig index c35c29a4d479..84e26ef2e3a0 100644 --- a/arch/mips/configs/eyeq5_defconfig +++ b/arch/mips/configs/eyeq5_defconfig @@ -19,6 +19,7 @@ CONFIG_USER_NS=y CONFIG_SCHED_AUTOGROUP=y CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y +CONFIG_EYEQ=y CONFIG_MACH_EYEQ5=y CONFIG_FIT_IMAGE_FDT_EPM5=y CONFIG_PAGE_SIZE_16KB=y diff --git a/arch/mips/configs/eyeq6_defconfig b/arch/mips/configs/eyeq6_defconfig new file mode 100644 index 000000000000..6597d5e88b33 --- /dev/null +++ b/arch/mips/configs/eyeq6_defconfig @@ -0,0 +1,111 @@ +CONFIG_SYSVIPC=y +CONFIG_NO_HZ_IDLE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BPF_SYSCALL=y +CONFIG_TASKSTATS=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_MEMCG=y +CONFIG_BLK_CGROUP=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CPUSETS=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_NAMESPACES=y +CONFIG_USER_NS=y +CONFIG_SCHED_AUTOGROUP=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EXPERT=y +CONFIG_EYEQ=y +CONFIG_MACH_EYEQ6H=y +CONFIG_MIPS_CPS=y +CONFIG_CPU_HAS_MSA=y +CONFIG_NR_CPUS=16 +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_JUMP_LABEL=y +CONFIG_PAGE_SIZE_16KB=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_TRIM_UNUSED_KSYMS=y +# CONFIG_COMPAT_BRK is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_USERFAULTFD=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_NET_KEY=y +CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_NETFILTER=y +CONFIG_CAN=y +CONFIG_PCI=y +CONFIG_PCI_MSI=y +CONFIG_PCI_DEBUG=y +CONFIG_PCI_ENDPOINT=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_CONNECTOR=y +CONFIG_MTD=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BLOCK=y +CONFIG_SCSI=y +CONFIG_NETDEVICES=y +CONFIG_MACVLAN=y +CONFIG_IPVLAN=y +CONFIG_MACB=y +CONFIG_MARVELL_PHY=y +CONFIG_MICREL_PHY=y +CONFIG_CAN_M_CAN=y +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +# CONFIG_PTP_1588_CLOCK is not set +CONFIG_PINCTRL=y +CONFIG_PINCTRL_SINGLE=y +CONFIG_MFD_SYSCON=y +CONFIG_HID_A4TECH=y +CONFIG_HID_BELKIN=y +CONFIG_HID_CHERRY=y +CONFIG_HID_CYPRESS=y +CONFIG_HID_EZKEY=y +CONFIG_HID_ITE=y +CONFIG_HID_KENSINGTON=y +CONFIG_HID_REDRAGON=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MONTEREY=y +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_RESET_CONTROLLER=y +# CONFIG_NVMEM is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_FS_ENCRYPTION=y +CONFIG_FUSE_FS=y +CONFIG_CUSE=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_UBIFS_FS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_ROOT_NFS=y +CONFIG_CRYPTO_CRC32_MIPS=y +CONFIG_FRAME_WARN=1024 +CONFIG_DEBUG_FS=y +# CONFIG_RCU_TRACE is not set +# CONFIG_FTRACE is not set +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="earlycon" diff --git a/arch/mips/mobileye/Kconfig b/arch/mips/mobileye/Kconfig new file mode 100644 index 000000000000..f9abb2d6e178 --- /dev/null +++ b/arch/mips/mobileye/Kconfig @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: GPL-2.0 +if EYEQ + +choice + prompt "Mobileye EyeQ SoC selection" + default MACH_EYEQ5 + help + Select Mobileye EyeQ MIPS SoC type. + + config MACH_EYEQ5 + bool "Mobileye EyeQ5 SoC" + + config MACH_EYEQ6H + bool "Mobileye EyeQ6H SoC" +endchoice + +config FIT_IMAGE_FDT_EPM5 + bool "Include FDT for Mobileye EyeQ5 development platforms" + depends on MACH_EYEQ5 + default n + help + Enable this to include the FDT for the EyeQ5 development platforms + from Mobileye in the FIT kernel image. + This requires u-boot on the platform. + +endif diff --git a/arch/mips/mobileye/Platform b/arch/mips/mobileye/Platform index c69f811dd13a..69f775bbbb1e 100644 --- a/arch/mips/mobileye/Platform +++ b/arch/mips/mobileye/Platform @@ -9,6 +9,7 @@ # load-$(CONFIG_MACH_EYEQ5) = 0xa800000808000000 +load-$(CONFIG_MACH_EYEQ6H) = 0xa800000100800000 all-$(CONFIG_MACH_EYEQ5) += vmlinux.gz.itb its-y := vmlinux.its.S