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[67.170.74.237]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2bd47ba8c2dsm2300933a91.27.2024.05.17.09.16.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 May 2024 09:16:18 -0700 (PDT) From: Dave Thaler X-Google-Original-From: Dave Thaler To: bpf@vger.kernel.org Cc: bpf@ietf.org, Dave Thaler , Dave Thaler Subject: [PATCH bpf-next] bpf, docs: clarify sign extension of 64-bit use of 32-bit imm Date: Fri, 17 May 2024 09:16:12 -0700 Message-Id: <20240517161612.4385-1-dthaler1968@gmail.com> X-Mailer: git-send-email 2.40.1 Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: bpf@iogearbox.net imm is defined as a 32-bit signed integer. {MOV, K, ALU64} says it does "dst = src" (where src is 'imm') but it does not sign extend, but instead does dst = (u32)src. The "Jump instructions" section has "unsigned" by some instructions, but the "Arithmetic instructions" section has no such note about the MOV instruction, so added an example to make this more clear. {JLE, K, JMP} says it does "PC += offset if dst <= src" (where src is 'imm', and the comparison is unsigned). This was apparently ambiguous to some readers as to whether the comparison was "dst <= (u64)(u32)imm" or "dst <= (u64)(s64)imm", since the correct assumption would be the latter except that the MOV instruction doesn't follow that, so added an example to make this more clear. Signed-off-by: Dave Thaler --- .../bpf/standardization/instruction-set.rst | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst index 997560aba..f96ebb169 100644 --- a/Documentation/bpf/standardization/instruction-set.rst +++ b/Documentation/bpf/standardization/instruction-set.rst @@ -378,13 +378,22 @@ etc. This specification requires that signed modulo use truncated division a % n = a - n * trunc(a / n) -The ``MOVSX`` instruction does a move operation with sign extension. +The ``MOV`` instruction does a move operation without sign extension, whereas +the ``MOVSX`` instruction does a move operation with sign extension. ``{MOVSX, X, ALU}`` :term:`sign extends` 8-bit and 16-bit operands into 32-bit operands, and zeroes the remaining upper 32 bits. ``{MOVSX, X, ALU64}`` :term:`sign extends` 8-bit, 16-bit, and 32-bit operands into 64-bit operands. Unlike other arithmetic instructions, ``MOVSX`` is only defined for register source operands (``X``). +``{MOV, K, ALU}`` means:: + + dst = (u32) imm + +``{MOVSX, X, ALU}`` with 'offset' 32 means:: + + dst = (s32) src + The ``NEG`` instruction is only defined when the source bit is clear (``K``). @@ -486,6 +495,10 @@ Example: where 's>=' indicates a signed '>=' comparison. +``{JLE, K, JMP}`` means:: + + if dst <= (u64)(s64)imm goto +offset + ``{JA, K, JMP32}`` means:: gotol +imm