From patchwork Mon May 20 07:38:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanislav Lisovskiy X-Patchwork-Id: 13668089 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A29E7C04FFE for ; Mon, 20 May 2024 07:38:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 00D4810E02E; Mon, 20 May 2024 07:38:48 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="a1FjbsV0"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id C08DB10E027 for ; Mon, 20 May 2024 07:38:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716190724; x=1747726724; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8xXefKf8WB30DcVAlHPWRS+qBQ2K2n4+uKiZ1Q70mjM=; b=a1FjbsV0dPMUKyrNvlQU7KkQ4nvMNHbG0rj0i1I1MEDDCRaehqXKgFmS xId+3jO3nNpSG2zcS//7DnfHl995bxBhIDea2t5ZjhK4EZwLtt8qPLMis rb5ciIkftcSWzG5C+a+r3C3EtE1WPUvxE75iY9Wq6KwKI1o6pZg2TZW9t 3o74iuwDV3QYw+Fco4VqUYyNhIAt+6DJDFQswXHB5Vcz/F0yzkw3N+fvQ KzDZaBoY29DqFzT8QlyHnr2KHJ6B9297RtPFuXtmXjSZB2FjY5mwnsPA3 OG/kEN7NfQENmXRt8aUk3EgqLQY96E4xUv07jEfAXvNcZUD+zOlMO3ReG w==; X-CSE-ConnectionGUID: 26IBX9gYT5CgBUcjJuJnZQ== X-CSE-MsgGUID: mf2ZlNNPSvGlLWfFO/rycw== X-IronPort-AV: E=McAfee;i="6600,9927,11077"; a="23444998" X-IronPort-AV: E=Sophos;i="6.08,174,1712646000"; d="scan'208";a="23444998" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 00:38:44 -0700 X-CSE-ConnectionGUID: hrFofgFlSoKFMONfqSDmFg== X-CSE-MsgGUID: pj7tvDNHSiuZ9jaWrMoc0Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,174,1712646000"; d="scan'208";a="33053210" Received: from unknown (HELO slisovsk-Lenovo-ideapad-720S-13IKB.fi.intel.com) ([10.237.72.65]) by orviesa007.jf.intel.com with ESMTP; 20 May 2024 00:38:42 -0700 From: Stanislav Lisovskiy To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 1/5] drm/i915: Rename all bigjoiner to joiner Date: Mon, 20 May 2024 10:38:35 +0300 Message-Id: <20240520073839.23881-2-stanislav.lisovskiy@intel.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240520073839.23881-1-stanislav.lisovskiy@intel.com> References: <20240520073839.23881-1-stanislav.lisovskiy@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Lets unify both bigjoiner and ultrajoiner under simple "joiner" name, because in future we might have multiple configurations, involving multiple bigjoiners, ultrajoiner, however it is possible to use same api for handling both. Signed-off-by: Stanislav Lisovskiy --- .../gpu/drm/i915/display/intel_atomic_plane.c | 4 +- drivers/gpu/drm/i915/display/intel_cdclk.c | 8 +- .../drm/i915/display/intel_crtc_state_dump.c | 8 +- drivers/gpu/drm/i915/display/intel_cursor.c | 4 +- drivers/gpu/drm/i915/display/intel_ddi.c | 4 +- drivers/gpu/drm/i915/display/intel_display.c | 204 +++++++++--------- drivers/gpu/drm/i915/display/intel_display.h | 8 +- .../drm/i915/display/intel_display_debugfs.c | 10 +- .../drm/i915/display/intel_display_types.h | 4 +- drivers/gpu/drm/i915/display/intel_dp.c | 60 +++--- drivers/gpu/drm/i915/display/intel_dp.h | 8 +- drivers/gpu/drm/i915/display/intel_dp_mst.c | 22 +- drivers/gpu/drm/i915/display/intel_drrs.c | 6 +- .../drm/i915/display/intel_modeset_setup.c | 38 ++-- drivers/gpu/drm/i915/display/intel_psr.c | 6 +- drivers/gpu/drm/i915/display/intel_vdsc.c | 12 +- drivers/gpu/drm/i915/display/intel_vdsc.h | 2 +- drivers/gpu/drm/i915/display/intel_vrr.c | 2 +- .../drm/i915/display/skl_universal_plane.c | 4 +- 19 files changed, 207 insertions(+), 207 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index 27224ecdc94c..7a0b2f3a672e 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -335,7 +335,7 @@ void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state, intel_plane_clear_hw_state(plane_state); /* - * For the bigjoiner slave uapi.crtc will point at + * For the joiner slave uapi.crtc will point at * the master crtc. So we explicitly assign the right * slave crtc to hw.crtc. uapi.crtc!=NULL simply indicates * the plane is logically enabled on the uapi level. @@ -720,7 +720,7 @@ int intel_plane_atomic_check(struct intel_atomic_state *state, struct intel_crtc_state *new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - if (new_crtc_state && intel_crtc_is_bigjoiner_slave(new_crtc_state)) { + if (new_crtc_state && intel_crtc_is_joiner_slave(new_crtc_state)) { struct intel_crtc *master_crtc = intel_master_crtc(new_crtc_state); struct intel_plane *master_plane = diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index b78154c82a71..36fb7ad1d871 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -2731,7 +2731,7 @@ static int intel_vdsc_min_cdclk(const struct intel_crtc_state *crtc_state) min_cdclk = max_t(int, min_cdclk, DIV_ROUND_UP(crtc_state->pixel_rate, num_vdsc_instances)); - if (crtc_state->bigjoiner_pipes) { + if (crtc_state->joiner_pipes) { int pixel_clock = intel_dp_mode_to_fec_clock(crtc_state->hw.adjusted_mode.clock); /* @@ -2743,13 +2743,13 @@ static int intel_vdsc_min_cdclk(const struct intel_crtc_state *crtc_state) * * => CDCLK >= compressed_bpp * Pixel clock / (PPC * Bigjoiner Interface bits) * - * Since PPC = 2 with bigjoiner + * Since PPC = 2 with joiner * => CDCLK >= compressed_bpp * Pixel clock / 2 * Bigjoiner Interface bits */ - int bigjoiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24; + int joiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24; int min_cdclk_bj = (to_bpp_int_roundup(crtc_state->dsc.compressed_bpp_x16) * - pixel_clock) / (2 * bigjoiner_interface_bits); + pixel_clock) / (2 * joiner_interface_bits); min_cdclk = max(min_cdclk, min_cdclk_bj); } diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c index ccaa4cb2809b..a999c37293bd 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c @@ -222,10 +222,10 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config, transcoder_name(pipe_config->master_transcoder), pipe_config->sync_mode_slaves_mask); - drm_printf(&p, "bigjoiner: %s, pipes: 0x%x\n", - intel_crtc_is_bigjoiner_slave(pipe_config) ? "slave" : - intel_crtc_is_bigjoiner_master(pipe_config) ? "master" : "no", - pipe_config->bigjoiner_pipes); + drm_printf(&p, "joiner: %s, pipes: 0x%x\n", + intel_crtc_is_joiner_slave(pipe_config) ? "slave" : + intel_crtc_is_joiner_master(pipe_config) ? "master" : "no", + pipe_config->joiner_pipes); drm_printf(&p, "splitter: %s, link count %d, overlap %d\n", str_enabled_disabled(pipe_config->splitter.enable), diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c index 2118b87ccb10..218ad2dfc242 100644 --- a/drivers/gpu/drm/i915/display/intel_cursor.c +++ b/drivers/gpu/drm/i915/display/intel_cursor.c @@ -703,12 +703,12 @@ intel_legacy_cursor_update(struct drm_plane *_plane, * PSR2 plane and transcoder registers can only be updated during * vblank. * - * FIXME bigjoiner fastpath would be good + * FIXME joiner fastpath would be good */ if (!crtc_state->hw.active || intel_crtc_needs_modeset(crtc_state) || intel_crtc_needs_fastset(crtc_state) || - crtc_state->bigjoiner_pipes) + crtc_state->joiner_pipes) goto slow; /* diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 3c3fc53376ce..81f644533504 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4264,10 +4264,10 @@ static bool crtcs_port_sync_compatible(const struct intel_crtc_state *crtc_state { /* * FIXME the modeset sequence is currently wrong and - * can't deal with bigjoiner + port sync at the same time. + * can't deal with joiner + port sync at the same time. */ return crtc_state1->hw.active && crtc_state2->hw.active && - !crtc_state1->bigjoiner_pipes && !crtc_state2->bigjoiner_pipes && + !crtc_state1->joiner_pipes && !crtc_state2->joiner_pipes && crtc_state1->output_types == crtc_state2->output_types && crtc_state1->output_format == crtc_state2->output_format && crtc_state1->lane_count == crtc_state2->lane_count && diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index ef986b508431..c74721188e59 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -242,53 +242,53 @@ is_trans_port_sync_mode(const struct intel_crtc_state *crtc_state) is_trans_port_sync_slave(crtc_state); } -static enum pipe bigjoiner_master_pipe(const struct intel_crtc_state *crtc_state) +static enum pipe joiner_master_pipe(const struct intel_crtc_state *crtc_state) { - return ffs(crtc_state->bigjoiner_pipes) - 1; + return ffs(crtc_state->joiner_pipes) - 1; } -u8 intel_crtc_bigjoiner_slave_pipes(const struct intel_crtc_state *crtc_state) +u8 intel_crtc_joiner_slave_pipes(const struct intel_crtc_state *crtc_state) { - if (crtc_state->bigjoiner_pipes) - return crtc_state->bigjoiner_pipes & ~BIT(bigjoiner_master_pipe(crtc_state)); + if (crtc_state->joiner_pipes) + return crtc_state->joiner_pipes & ~BIT(joiner_master_pipe(crtc_state)); else return 0; } -bool intel_crtc_is_bigjoiner_slave(const struct intel_crtc_state *crtc_state) +bool intel_crtc_is_joiner_slave(const struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - return crtc_state->bigjoiner_pipes && - crtc->pipe != bigjoiner_master_pipe(crtc_state); + return crtc_state->joiner_pipes && + crtc->pipe != joiner_master_pipe(crtc_state); } -bool intel_crtc_is_bigjoiner_master(const struct intel_crtc_state *crtc_state) +bool intel_crtc_is_joiner_master(const struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - return crtc_state->bigjoiner_pipes && - crtc->pipe == bigjoiner_master_pipe(crtc_state); + return crtc_state->joiner_pipes && + crtc->pipe == joiner_master_pipe(crtc_state); } -static int intel_bigjoiner_num_pipes(const struct intel_crtc_state *crtc_state) +static int intel_joiner_num_pipes(const struct intel_crtc_state *crtc_state) { - return hweight8(crtc_state->bigjoiner_pipes); + return hweight8(crtc_state->joiner_pipes); } u8 intel_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - return BIT(crtc->pipe) | crtc_state->bigjoiner_pipes; + return BIT(crtc->pipe) | crtc_state->joiner_pipes; } struct intel_crtc *intel_master_crtc(const struct intel_crtc_state *crtc_state) { struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); - if (intel_crtc_is_bigjoiner_slave(crtc_state)) - return intel_crtc_for_pipe(i915, bigjoiner_master_pipe(crtc_state)); + if (intel_crtc_is_joiner_slave(crtc_state)) + return intel_crtc_for_pipe(i915, joiner_master_pipe(crtc_state)); else return to_intel_crtc(crtc_state->uapi.crtc); } @@ -2314,10 +2314,10 @@ static void intel_crtc_compute_pixel_rate(struct intel_crtc_state *crtc_state) ilk_pipe_pixel_rate(crtc_state); } -static void intel_bigjoiner_adjust_timings(const struct intel_crtc_state *crtc_state, +static void intel_joiner_adjust_timings(const struct intel_crtc_state *crtc_state, struct drm_display_mode *mode) { - int num_pipes = intel_bigjoiner_num_pipes(crtc_state); + int num_pipes = intel_joiner_num_pipes(crtc_state); if (num_pipes < 2) return; @@ -2381,11 +2381,11 @@ static void intel_crtc_readout_derived_state(struct intel_crtc_state *crtc_state drm_mode_copy(mode, pipe_mode); intel_mode_from_crtc_timings(mode, mode); mode->hdisplay = drm_rect_width(&crtc_state->pipe_src) * - (intel_bigjoiner_num_pipes(crtc_state) ?: 1); + (intel_joiner_num_pipes(crtc_state) ?: 1); mode->vdisplay = drm_rect_height(&crtc_state->pipe_src); - /* Derive per-pipe timings in case bigjoiner is used */ - intel_bigjoiner_adjust_timings(crtc_state, pipe_mode); + /* Derive per-pipe timings in case joiner is used */ + intel_joiner_adjust_timings(crtc_state, pipe_mode); intel_mode_from_crtc_timings(pipe_mode, pipe_mode); intel_crtc_compute_pixel_rate(crtc_state); @@ -2399,9 +2399,9 @@ void intel_encoder_get_config(struct intel_encoder *encoder, intel_crtc_readout_derived_state(crtc_state); } -static void intel_bigjoiner_compute_pipe_src(struct intel_crtc_state *crtc_state) +static void intel_joiner_compute_pipe_src(struct intel_crtc_state *crtc_state) { - int num_pipes = intel_bigjoiner_num_pipes(crtc_state); + int num_pipes = intel_joiner_num_pipes(crtc_state); int width, height; if (num_pipes < 2) @@ -2419,7 +2419,7 @@ static int intel_crtc_compute_pipe_src(struct intel_crtc_state *crtc_state) struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *i915 = to_i915(crtc->base.dev); - intel_bigjoiner_compute_pipe_src(crtc_state); + intel_joiner_compute_pipe_src(crtc_state); /* * Pipe horizontal size must be even in: @@ -2464,8 +2464,8 @@ static int intel_crtc_compute_pipe_mode(struct intel_crtc_state *crtc_state) /* Expand MSO per-segment transcoder timings to full */ intel_splitter_adjust_timings(crtc_state, pipe_mode); - /* Derive per-pipe timings in case bigjoiner is used */ - intel_bigjoiner_adjust_timings(crtc_state, pipe_mode); + /* Derive per-pipe timings in case joiner is used */ + intel_joiner_adjust_timings(crtc_state, pipe_mode); intel_mode_from_crtc_timings(pipe_mode, pipe_mode); if (DISPLAY_VER(i915) < 4) { @@ -2847,17 +2847,17 @@ static void intel_get_transcoder_timings(struct intel_crtc *crtc, intel_de_read(dev_priv, TRANS_SET_CONTEXT_LATENCY(cpu_transcoder)); } -static void intel_bigjoiner_adjust_pipe_src(struct intel_crtc_state *crtc_state) +static void intel_joiner_adjust_pipe_src(struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); - int num_pipes = intel_bigjoiner_num_pipes(crtc_state); + int num_pipes = intel_joiner_num_pipes(crtc_state); enum pipe master_pipe, pipe = crtc->pipe; int width; if (num_pipes < 2) return; - master_pipe = bigjoiner_master_pipe(crtc_state); + master_pipe = joiner_master_pipe(crtc_state); width = drm_rect_width(&crtc_state->pipe_src); drm_rect_translate_to(&crtc_state->pipe_src, @@ -2877,7 +2877,7 @@ static void intel_get_pipe_src_size(struct intel_crtc *crtc, REG_FIELD_GET(PIPESRC_WIDTH_MASK, tmp) + 1, REG_FIELD_GET(PIPESRC_HEIGHT_MASK, tmp) + 1); - intel_bigjoiner_adjust_pipe_src(pipe_config); + intel_joiner_adjust_pipe_src(pipe_config); } void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state) @@ -3461,7 +3461,7 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc, return ret; } -static u8 bigjoiner_pipes(struct drm_i915_private *i915) +static u8 joiner_pipes(struct drm_i915_private *i915) { u8 pipes; @@ -3490,7 +3490,7 @@ static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv, return tmp & TRANS_DDI_FUNC_ENABLE; } -static void enabled_bigjoiner_pipes(struct drm_i915_private *dev_priv, +static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, u8 *master_pipes, u8 *slave_pipes) { struct intel_crtc *crtc; @@ -3499,7 +3499,7 @@ static void enabled_bigjoiner_pipes(struct drm_i915_private *dev_priv, *slave_pipes = 0; for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, - bigjoiner_pipes(dev_priv)) { + joiner_pipes(dev_priv)) { enum intel_display_power_domain power_domain; enum pipe pipe = crtc->pipe; intel_wakeref_t wakeref; @@ -3537,7 +3537,7 @@ static void enabled_bigjoiner_pipes(struct drm_i915_private *dev_priv, *master_pipes, *slave_pipes); } -static enum pipe get_bigjoiner_master_pipe(enum pipe pipe, u8 master_pipes, u8 slave_pipes) +static enum pipe get_joiner_master_pipe(enum pipe pipe, u8 master_pipes, u8 slave_pipes) { if ((slave_pipes & BIT(pipe)) == 0) return pipe; @@ -3549,11 +3549,11 @@ static enum pipe get_bigjoiner_master_pipe(enum pipe pipe, u8 master_pipes, u8 s return fls(master_pipes) - 1; } -static u8 get_bigjoiner_slave_pipes(enum pipe pipe, u8 master_pipes, u8 slave_pipes) +static u8 get_joiner_slave_pipes(enum pipe pipe, u8 master_pipes, u8 slave_pipes) { enum pipe master_pipe, next_master_pipe; - master_pipe = get_bigjoiner_master_pipe(pipe, master_pipes, slave_pipes); + master_pipe = get_joiner_master_pipe(pipe, master_pipes, slave_pipes); if ((master_pipes & BIT(master_pipe)) == 0) return 0; @@ -3630,16 +3630,16 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc) enabled_transcoders |= BIT(cpu_transcoder); } - /* single pipe or bigjoiner master */ + /* single pipe or joiner master */ cpu_transcoder = (enum transcoder) crtc->pipe; if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder)) enabled_transcoders |= BIT(cpu_transcoder); - /* bigjoiner slave -> consider the master pipe's transcoder as well */ - enabled_bigjoiner_pipes(dev_priv, &master_pipes, &slave_pipes); + /* joiner slave -> consider the master pipe's transcoder as well */ + enabled_joiner_pipes(dev_priv, &master_pipes, &slave_pipes); if (slave_pipes & BIT(crtc->pipe)) { cpu_transcoder = (enum transcoder) - get_bigjoiner_master_pipe(crtc->pipe, master_pipes, slave_pipes); + get_joiner_master_pipe(crtc->pipe, master_pipes, slave_pipes); if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder)) enabled_transcoders |= BIT(cpu_transcoder); } @@ -3764,21 +3764,21 @@ static bool bxt_get_dsi_transcoder_state(struct intel_crtc *crtc, return transcoder_is_dsi(pipe_config->cpu_transcoder); } -static void intel_bigjoiner_get_config(struct intel_crtc_state *crtc_state) +static void intel_joiner_get_config(struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *i915 = to_i915(crtc->base.dev); u8 master_pipes, slave_pipes; enum pipe pipe = crtc->pipe; - enabled_bigjoiner_pipes(i915, &master_pipes, &slave_pipes); + enabled_joiner_pipes(i915, &master_pipes, &slave_pipes); if (((master_pipes | slave_pipes) & BIT(pipe)) == 0) return; - crtc_state->bigjoiner_pipes = - BIT(get_bigjoiner_master_pipe(pipe, master_pipes, slave_pipes)) | - get_bigjoiner_slave_pipes(pipe, master_pipes, slave_pipes); + crtc_state->joiner_pipes = + BIT(get_joiner_master_pipe(pipe, master_pipes, slave_pipes)) | + get_joiner_slave_pipes(pipe, master_pipes, slave_pipes); } static bool hsw_get_pipe_config(struct intel_crtc *crtc, @@ -3805,7 +3805,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc, if (!active) goto out; - intel_bigjoiner_get_config(pipe_config); + intel_joiner_get_config(pipe_config); intel_dsc_get_config(pipe_config); if (!transcoder_is_dsi(pipe_config->cpu_transcoder) || @@ -4464,7 +4464,7 @@ intel_crtc_copy_uapi_to_hw_state_nomodeset(struct intel_atomic_state *state, struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - WARN_ON(intel_crtc_is_bigjoiner_slave(crtc_state)); + WARN_ON(intel_crtc_is_joiner_slave(crtc_state)); drm_property_replace_blob(&crtc_state->hw.degamma_lut, crtc_state->uapi.degamma_lut); @@ -4481,7 +4481,7 @@ intel_crtc_copy_uapi_to_hw_state_modeset(struct intel_atomic_state *state, struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - WARN_ON(intel_crtc_is_bigjoiner_slave(crtc_state)); + WARN_ON(intel_crtc_is_joiner_slave(crtc_state)); crtc_state->hw.enable = crtc_state->uapi.enable; crtc_state->hw.active = crtc_state->uapi.active; @@ -4495,7 +4495,7 @@ intel_crtc_copy_uapi_to_hw_state_modeset(struct intel_atomic_state *state, } static void -copy_bigjoiner_crtc_state_nomodeset(struct intel_atomic_state *state, +copy_joiner_crtc_state_nomodeset(struct intel_atomic_state *state, struct intel_crtc *slave_crtc) { struct intel_crtc_state *slave_crtc_state = @@ -4515,7 +4515,7 @@ copy_bigjoiner_crtc_state_nomodeset(struct intel_atomic_state *state, } static int -copy_bigjoiner_crtc_state_modeset(struct intel_atomic_state *state, +copy_joiner_crtc_state_modeset(struct intel_atomic_state *state, struct intel_crtc *slave_crtc) { struct intel_crtc_state *slave_crtc_state = @@ -4525,8 +4525,8 @@ copy_bigjoiner_crtc_state_modeset(struct intel_atomic_state *state, intel_atomic_get_new_crtc_state(state, master_crtc); struct intel_crtc_state *saved_state; - WARN_ON(master_crtc_state->bigjoiner_pipes != - slave_crtc_state->bigjoiner_pipes); + WARN_ON(master_crtc_state->joiner_pipes != + slave_crtc_state->joiner_pipes); saved_state = kmemdup(master_crtc_state, sizeof(*saved_state), GFP_KERNEL); if (!saved_state) @@ -4560,14 +4560,14 @@ copy_bigjoiner_crtc_state_modeset(struct intel_atomic_state *state, drm_dp_tunnel_ref_get(master_crtc_state->dp_tunnel_ref.tunnel, &slave_crtc_state->dp_tunnel_ref); - copy_bigjoiner_crtc_state_nomodeset(state, slave_crtc); + copy_joiner_crtc_state_nomodeset(state, slave_crtc); slave_crtc_state->uapi.mode_changed = master_crtc_state->uapi.mode_changed; slave_crtc_state->uapi.connectors_changed = master_crtc_state->uapi.connectors_changed; slave_crtc_state->uapi.active_changed = master_crtc_state->uapi.active_changed; - WARN_ON(master_crtc_state->bigjoiner_pipes != - slave_crtc_state->bigjoiner_pipes); + WARN_ON(master_crtc_state->joiner_pipes != + slave_crtc_state->joiner_pipes); return 0; } @@ -5365,7 +5365,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_X(sync_mode_slaves_mask); PIPE_CONF_CHECK_I(master_transcoder); - PIPE_CONF_CHECK_X(bigjoiner_pipes); + PIPE_CONF_CHECK_X(joiner_pipes); PIPE_CONF_CHECK_BOOL(dsc.config.block_pred_enable); PIPE_CONF_CHECK_BOOL(dsc.config.convert_rgb); @@ -5729,7 +5729,7 @@ static bool active_planes_affects_min_cdclk(struct drm_i915_private *dev_priv) IS_IVYBRIDGE(dev_priv); } -static int intel_crtc_add_bigjoiner_planes(struct intel_atomic_state *state, +static int intel_crtc_add_joiner_planes(struct intel_atomic_state *state, struct intel_crtc *crtc, struct intel_crtc *other) { @@ -5746,7 +5746,7 @@ static int intel_crtc_add_bigjoiner_planes(struct intel_atomic_state *state, return intel_crtc_add_planes_to_state(state, other, plane_ids); } -static int intel_bigjoiner_add_affected_planes(struct intel_atomic_state *state) +static int intel_joiner_add_affected_planes(struct intel_atomic_state *state) { struct drm_i915_private *i915 = to_i915(state->base.dev); const struct intel_crtc_state *crtc_state; @@ -5757,13 +5757,13 @@ static int intel_bigjoiner_add_affected_planes(struct intel_atomic_state *state) struct intel_crtc *other; for_each_intel_crtc_in_pipe_mask(&i915->drm, other, - crtc_state->bigjoiner_pipes) { + crtc_state->joiner_pipes) { int ret; if (crtc == other) continue; - ret = intel_crtc_add_bigjoiner_planes(state, crtc, other); + ret = intel_crtc_add_joiner_planes(state, crtc, other); if (ret) return ret; } @@ -5785,7 +5785,7 @@ static int intel_atomic_check_planes(struct intel_atomic_state *state) if (ret) return ret; - ret = intel_bigjoiner_add_affected_planes(state); + ret = intel_joiner_add_affected_planes(state); if (ret) return ret; @@ -5885,7 +5885,7 @@ static bool intel_pipes_need_modeset(struct intel_atomic_state *state, return false; } -static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state, +static int intel_atomic_check_joiner(struct intel_atomic_state *state, struct intel_crtc *master_crtc) { struct drm_i915_private *i915 = to_i915(state->base.dev); @@ -5893,25 +5893,25 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state, intel_atomic_get_new_crtc_state(state, master_crtc); struct intel_crtc *slave_crtc; - if (!master_crtc_state->bigjoiner_pipes) + if (!master_crtc_state->joiner_pipes) return 0; /* sanity check */ if (drm_WARN_ON(&i915->drm, - master_crtc->pipe != bigjoiner_master_pipe(master_crtc_state))) + master_crtc->pipe != joiner_master_pipe(master_crtc_state))) return -EINVAL; - if (master_crtc_state->bigjoiner_pipes & ~bigjoiner_pipes(i915)) { + if (master_crtc_state->joiner_pipes & ~joiner_pipes(i915)) { drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] Cannot act as big joiner master " "(need 0x%x as pipes, only 0x%x possible)\n", master_crtc->base.base.id, master_crtc->base.name, - master_crtc_state->bigjoiner_pipes, bigjoiner_pipes(i915)); + master_crtc_state->joiner_pipes, joiner_pipes(i915)); return -EINVAL; } for_each_intel_crtc_in_pipe_mask(&i915->drm, slave_crtc, - intel_crtc_bigjoiner_slave_pipes(master_crtc_state)) { + intel_crtc_joiner_slave_pipes(master_crtc_state)) { struct intel_crtc_state *slave_crtc_state; int ret; @@ -5923,7 +5923,7 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state, if (slave_crtc_state->uapi.enable) { drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] Slave is enabled as normal CRTC, but " - "[CRTC:%d:%s] claiming this CRTC for bigjoiner.\n", + "[CRTC:%d:%s] claiming this CRTC for joiner.\n", slave_crtc->base.base.id, slave_crtc->base.name, master_crtc->base.base.id, master_crtc->base.name); return -EINVAL; @@ -5945,10 +5945,10 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state, slave_crtc->base.base.id, slave_crtc->base.name, master_crtc->base.base.id, master_crtc->base.name); - slave_crtc_state->bigjoiner_pipes = - master_crtc_state->bigjoiner_pipes; + slave_crtc_state->joiner_pipes = + master_crtc_state->joiner_pipes; - ret = copy_bigjoiner_crtc_state_modeset(state, slave_crtc); + ret = copy_joiner_crtc_state_modeset(state, slave_crtc); if (ret) return ret; } @@ -5956,7 +5956,7 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state, return 0; } -static void kill_bigjoiner_slave(struct intel_atomic_state *state, +static void kill_joiner_slave(struct intel_atomic_state *state, struct intel_crtc *master_crtc) { struct drm_i915_private *i915 = to_i915(state->base.dev); @@ -5965,16 +5965,16 @@ static void kill_bigjoiner_slave(struct intel_atomic_state *state, struct intel_crtc *slave_crtc; for_each_intel_crtc_in_pipe_mask(&i915->drm, slave_crtc, - intel_crtc_bigjoiner_slave_pipes(master_crtc_state)) { + intel_crtc_joiner_slave_pipes(master_crtc_state)) { struct intel_crtc_state *slave_crtc_state = intel_atomic_get_new_crtc_state(state, slave_crtc); - slave_crtc_state->bigjoiner_pipes = 0; + slave_crtc_state->joiner_pipes = 0; intel_crtc_copy_uapi_to_hw_state_modeset(state, slave_crtc); } - master_crtc_state->bigjoiner_pipes = 0; + master_crtc_state->joiner_pipes = 0; } /** @@ -6027,9 +6027,9 @@ static int intel_async_flip_check_uapi(struct intel_atomic_state *state, * FIXME: Bigjoiner+async flip is busted currently. * Remove this check once the issues are fixed. */ - if (new_crtc_state->bigjoiner_pipes) { + if (new_crtc_state->joiner_pipes) { drm_dbg_kms(&i915->drm, - "[CRTC:%d:%s] async flip disallowed with bigjoiner\n", + "[CRTC:%d:%s] async flip disallowed with joiner\n", crtc->base.base.id, crtc->base.name); return -EINVAL; } @@ -6254,7 +6254,7 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in return 0; } -static int intel_bigjoiner_add_affected_crtcs(struct intel_atomic_state *state) +static int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state) { struct drm_i915_private *i915 = to_i915(state->base.dev); struct intel_crtc_state *crtc_state; @@ -6264,9 +6264,9 @@ static int intel_bigjoiner_add_affected_crtcs(struct intel_atomic_state *state) int i; for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { - affected_pipes |= crtc_state->bigjoiner_pipes; + affected_pipes |= crtc_state->joiner_pipes; if (intel_crtc_needs_modeset(crtc_state)) - modeset_pipes |= crtc_state->bigjoiner_pipes; + modeset_pipes |= crtc_state->joiner_pipes; } for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, affected_pipes) { @@ -6292,10 +6292,10 @@ static int intel_bigjoiner_add_affected_crtcs(struct intel_atomic_state *state) } for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { - /* Kill old bigjoiner link, we may re-establish afterwards */ + /* Kill old joiner link, we may re-establish afterwards */ if (intel_crtc_needs_modeset(crtc_state) && - intel_crtc_is_bigjoiner_master(crtc_state)) - kill_bigjoiner_slave(state, crtc); + intel_crtc_is_joiner_master(crtc_state)) + kill_joiner_slave(state, crtc); } return 0; @@ -6313,7 +6313,7 @@ static int intel_atomic_check_config(struct intel_atomic_state *state, *failed_pipe = INVALID_PIPE; - ret = intel_bigjoiner_add_affected_crtcs(state); + ret = intel_joiner_add_affected_crtcs(state); if (ret) return ret; @@ -6323,14 +6323,14 @@ static int intel_atomic_check_config(struct intel_atomic_state *state, for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { if (!intel_crtc_needs_modeset(new_crtc_state)) { - if (intel_crtc_is_bigjoiner_slave(new_crtc_state)) - copy_bigjoiner_crtc_state_nomodeset(state, crtc); + if (intel_crtc_is_joiner_slave(new_crtc_state)) + copy_joiner_crtc_state_nomodeset(state, crtc); else intel_crtc_copy_uapi_to_hw_state_nomodeset(state, crtc); continue; } - if (drm_WARN_ON(&i915->drm, intel_crtc_is_bigjoiner_slave(new_crtc_state))) + if (drm_WARN_ON(&i915->drm, intel_crtc_is_joiner_slave(new_crtc_state))) continue; ret = intel_crtc_prepare_cleared_state(state, crtc); @@ -6349,7 +6349,7 @@ static int intel_atomic_check_config(struct intel_atomic_state *state, if (!intel_crtc_needs_modeset(new_crtc_state)) continue; - if (drm_WARN_ON(&i915->drm, intel_crtc_is_bigjoiner_slave(new_crtc_state))) + if (drm_WARN_ON(&i915->drm, intel_crtc_is_joiner_slave(new_crtc_state))) continue; if (!new_crtc_state->hw.enable) @@ -6460,12 +6460,12 @@ int intel_atomic_check(struct drm_device *dev, if (!intel_crtc_needs_modeset(new_crtc_state)) continue; - if (intel_crtc_is_bigjoiner_slave(new_crtc_state)) { + if (intel_crtc_is_joiner_slave(new_crtc_state)) { drm_WARN_ON(&dev_priv->drm, new_crtc_state->uapi.enable); continue; } - ret = intel_atomic_check_bigjoiner(state, crtc); + ret = intel_atomic_check_joiner(state, crtc); if (ret) goto fail; } @@ -6475,7 +6475,7 @@ int intel_atomic_check(struct drm_device *dev, if (!intel_crtc_needs_modeset(new_crtc_state)) continue; - intel_bigjoiner_adjust_pipe_src(new_crtc_state); + intel_joiner_adjust_pipe_src(new_crtc_state); intel_crtc_check_fastset(old_crtc_state, new_crtc_state); } @@ -6515,8 +6515,8 @@ int intel_atomic_check(struct drm_device *dev, intel_crtc_flag_modeset(new_crtc_state); } - if (new_crtc_state->bigjoiner_pipes) { - if (intel_pipes_need_modeset(state, new_crtc_state->bigjoiner_pipes)) + if (new_crtc_state->joiner_pipes) { + if (intel_pipes_need_modeset(state, new_crtc_state->joiner_pipes)) intel_crtc_flag_modeset(new_crtc_state); } } @@ -6930,7 +6930,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state) if ((disable_pipes & BIT(crtc->pipe)) == 0) continue; - if (intel_crtc_is_bigjoiner_slave(old_crtc_state)) + if (intel_crtc_is_joiner_slave(old_crtc_state)) continue; /* In case of Transcoder port Sync master slave CRTCs can be @@ -6952,7 +6952,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state) if ((disable_pipes & BIT(crtc->pipe)) == 0) continue; - if (intel_crtc_is_bigjoiner_slave(old_crtc_state)) + if (intel_crtc_is_joiner_slave(old_crtc_state)) continue; intel_old_crtc_state_disables(state, crtc); @@ -7031,7 +7031,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state) while (update_pipes) { /* - * Commit in reverse order to make bigjoiner master + * Commit in reverse order to make joiner master * send the uapi events after slaves are done. */ for_each_oldnew_intel_crtc_in_state_reverse(state, crtc, old_crtc_state, @@ -7077,7 +7077,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state) if ((modeset_pipes & BIT(pipe)) == 0) continue; - if (intel_crtc_is_bigjoiner_slave(new_crtc_state)) + if (intel_crtc_is_joiner_slave(new_crtc_state)) continue; if (intel_dp_mst_is_slave_trans(new_crtc_state) || @@ -7099,7 +7099,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state) if ((modeset_pipes & BIT(pipe)) == 0) continue; - if (intel_crtc_is_bigjoiner_slave(new_crtc_state)) + if (intel_crtc_is_joiner_slave(new_crtc_state)) continue; modeset_pipes &= ~intel_crtc_joined_pipe_mask(new_crtc_state); @@ -7120,7 +7120,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state) } /* - * Commit in reverse order to make bigjoiner master + * Commit in reverse order to make joiner master * send the uapi events after slaves are done. */ for_each_new_intel_crtc_in_state_reverse(state, crtc, new_crtc_state, i) { @@ -7848,7 +7848,7 @@ static int max_dotclock(struct drm_i915_private *i915) { int max_dotclock = i915->display.cdclk.max_dotclk_freq; - /* icl+ might use bigjoiner */ + /* icl+ might use joiner */ if (DISPLAY_VER(i915) >= 11) max_dotclock *= 2; @@ -7973,7 +7973,7 @@ enum drm_mode_status intel_cpu_transcoder_mode_valid(struct drm_i915_private *de enum drm_mode_status intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv, const struct drm_display_mode *mode, - bool bigjoiner) + bool joiner) { int plane_width_max, plane_height_max; @@ -7990,7 +7990,7 @@ intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv, * too big for that. */ if (DISPLAY_VER(dev_priv) >= 11) { - plane_width_max = 5120 << bigjoiner; + plane_width_max = 5120 << joiner; plane_height_max = 4320; } else { plane_width_max = 5120; diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 56d1c0e3e62c..a2ec5309113e 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -415,7 +415,7 @@ u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv, enum drm_mode_status intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv, const struct drm_display_mode *mode, - bool bigjoiner); + bool joiner); enum drm_mode_status intel_cpu_transcoder_mode_valid(struct drm_i915_private *i915, const struct drm_display_mode *mode); @@ -423,9 +423,9 @@ enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port); bool is_trans_port_sync_mode(const struct intel_crtc_state *state); bool is_trans_port_sync_master(const struct intel_crtc_state *state); u8 intel_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state); -bool intel_crtc_is_bigjoiner_slave(const struct intel_crtc_state *crtc_state); -bool intel_crtc_is_bigjoiner_master(const struct intel_crtc_state *crtc_state); -u8 intel_crtc_bigjoiner_slave_pipes(const struct intel_crtc_state *crtc_state); +bool intel_crtc_is_joiner_slave(const struct intel_crtc_state *crtc_state); +bool intel_crtc_is_joiner_master(const struct intel_crtc_state *crtc_state); +u8 intel_crtc_joiner_slave_pipes(const struct intel_crtc_state *crtc_state); struct intel_crtc *intel_master_crtc(const struct intel_crtc_state *crtc_state); bool intel_crtc_get_pipe_config(struct intel_crtc_state *crtc_state); bool intel_pipe_config_compare(const struct intel_crtc_state *current_config, diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 35f9f86ef70f..97fcf78bc8d0 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -574,10 +574,10 @@ static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc) intel_scaler_info(m, crtc); - if (crtc_state->bigjoiner_pipes) + if (crtc_state->joiner_pipes) seq_printf(m, "\tLinked to 0x%x pipes as a %s\n", - crtc_state->bigjoiner_pipes, - intel_crtc_is_bigjoiner_slave(crtc_state) ? "slave" : "master"); + crtc_state->joiner_pipes, + intel_crtc_is_joiner_slave(crtc_state) ? "slave" : "master"); for_each_intel_encoder_mask(&dev_priv->drm, encoder, crtc_state->uapi.encoder_mask) @@ -1542,8 +1542,8 @@ void intel_connector_debugfs_add(struct intel_connector *connector) if (DISPLAY_VER(i915) >= 11 && (connector_type == DRM_MODE_CONNECTOR_DisplayPort || connector_type == DRM_MODE_CONNECTOR_eDP)) { - debugfs_create_bool("i915_bigjoiner_force_enable", 0644, root, - &connector->force_bigjoiner_enable); + debugfs_create_bool("i915_joiner_force_enable", 0644, root, + &connector->force_joiner_enable); } if (connector_type == DRM_MODE_CONNECTOR_DSI || diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index a06a154d587b..f84a2b180344 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -637,7 +637,7 @@ struct intel_connector { struct intel_dp *mst_port; - bool force_bigjoiner_enable; + bool force_joiner_enable; struct { struct drm_dp_aux *dsc_decompression_aux; @@ -1339,7 +1339,7 @@ struct intel_crtc_state { bool wgc_enable; /* big joiner pipe bitmask */ - u8 bigjoiner_pipes; + u8 joiner_pipes; /* Display Stream compression state */ struct { diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 486361eb0070..d6893a1cf5cc 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -436,7 +436,7 @@ int intel_dp_max_link_data_rate(struct intel_dp *intel_dp, return max_rate; } -bool intel_dp_has_bigjoiner(struct intel_dp *intel_dp) +bool intel_dp_has_joiner(struct intel_dp *intel_dp) { struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); struct intel_encoder *encoder = &intel_dig_port->base; @@ -805,24 +805,24 @@ u32 intel_dp_dsc_nearest_valid_bpp(struct drm_i915_private *i915, u32 bpp, u32 p static u32 get_max_compressed_bpp_with_joiner(struct drm_i915_private *i915, u32 mode_clock, u32 mode_hdisplay, - bool bigjoiner) + bool joiner) { u32 max_bpp_small_joiner_ram; /* Small Joiner Check: output bpp <= joiner RAM (bits) / Horiz. width */ max_bpp_small_joiner_ram = small_joiner_ram_size_bits(i915) / mode_hdisplay; - if (bigjoiner) { - int bigjoiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24; - /* With bigjoiner multiple dsc engines are used in parallel so PPC is 2 */ + if (joiner) { + int joiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24; + /* With joiner multiple dsc engines are used in parallel so PPC is 2 */ int ppc = 2; - u32 max_bpp_bigjoiner = - i915->display.cdclk.max_cdclk_freq * ppc * bigjoiner_interface_bits / + u32 max_bpp_joiner = + i915->display.cdclk.max_cdclk_freq * ppc * joiner_interface_bits / intel_dp_mode_to_fec_clock(mode_clock); max_bpp_small_joiner_ram *= 2; - return min(max_bpp_small_joiner_ram, max_bpp_bigjoiner); + return min(max_bpp_small_joiner_ram, max_bpp_joiner); } return max_bpp_small_joiner_ram; @@ -831,7 +831,7 @@ u32 get_max_compressed_bpp_with_joiner(struct drm_i915_private *i915, u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, u32 link_clock, u32 lane_count, u32 mode_clock, u32 mode_hdisplay, - bool bigjoiner, + bool joiner, enum intel_output_format output_format, u32 pipe_bpp, u32 timeslots) @@ -877,7 +877,7 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, intel_dp_mode_to_fec_clock(mode_clock)); joiner_max_bpp = get_max_compressed_bpp_with_joiner(i915, mode_clock, - mode_hdisplay, bigjoiner); + mode_hdisplay, joiner); bits_per_pixel = min(bits_per_pixel, joiner_max_bpp); bits_per_pixel = intel_dp_dsc_nearest_valid_bpp(i915, bits_per_pixel, pipe_bpp); @@ -887,7 +887,7 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, int mode_clock, int mode_hdisplay, - bool bigjoiner) + bool joiner) { struct drm_i915_private *i915 = to_i915(connector->base.dev); u8 min_slice_count, i; @@ -921,14 +921,14 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, /* Find the closest match to the valid slice count values */ for (i = 0; i < ARRAY_SIZE(valid_dsc_slicecount); i++) { - u8 test_slice_count = valid_dsc_slicecount[i] << bigjoiner; + u8 test_slice_count = valid_dsc_slicecount[i] << joiner; if (test_slice_count > drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd, false)) break; /* big joiner needs small joiner to be enabled */ - if (bigjoiner && test_slice_count < 4) + if (joiner && test_slice_count < 4) continue; if (min_slice_count <= test_slice_count) @@ -1207,17 +1207,17 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector, return MODE_OK; } -bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp, +bool intel_dp_need_joiner(struct intel_dp *intel_dp, struct intel_connector *connector, int hdisplay, int clock) { struct drm_i915_private *i915 = dp_to_i915(intel_dp); - if (!intel_dp_has_bigjoiner(intel_dp)) + if (!intel_dp_has_joiner(intel_dp)) return false; return clock > i915->display.cdclk.max_dotclk_freq || hdisplay > 5120 || - connector->force_bigjoiner_enable; + connector->force_joiner_enable; } static enum drm_mode_status @@ -1234,7 +1234,7 @@ intel_dp_mode_valid(struct drm_connector *_connector, u16 dsc_max_compressed_bpp = 0; u8 dsc_slice_count = 0; enum drm_mode_status status; - bool dsc = false, bigjoiner = false; + bool dsc = false, joiner = false; status = intel_cpu_transcoder_mode_valid(dev_priv, mode); if (status != MODE_OK) @@ -1255,9 +1255,9 @@ intel_dp_mode_valid(struct drm_connector *_connector, target_clock = fixed_mode->clock; } - if (intel_dp_need_bigjoiner(intel_dp, connector, + if (intel_dp_need_joiner(intel_dp, connector, mode->hdisplay, target_clock)) { - bigjoiner = true; + joiner = true; max_dotclk *= 2; } if (target_clock > max_dotclk) @@ -1304,20 +1304,20 @@ intel_dp_mode_valid(struct drm_connector *_connector, max_lanes, target_clock, mode->hdisplay, - bigjoiner, + joiner, output_format, pipe_bpp, 64); dsc_slice_count = intel_dp_dsc_get_slice_count(connector, target_clock, mode->hdisplay, - bigjoiner); + joiner); } dsc = dsc_max_compressed_bpp && dsc_slice_count; } - if (intel_dp_joiner_needs_dsc(dev_priv, bigjoiner) && !dsc) + if (intel_dp_joiner_needs_dsc(dev_priv, joiner) && !dsc) return MODE_CLOCK_HIGH; if (mode_rate > max_rate && !dsc) @@ -1327,7 +1327,7 @@ intel_dp_mode_valid(struct drm_connector *_connector, if (status != MODE_OK) return status; - return intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner); + return intel_mode_valid_max_plane_size(dev_priv, mode, joiner); } bool intel_dp_source_supports_tps3(struct drm_i915_private *i915) @@ -2018,7 +2018,7 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, dsc_joiner_max_bpp = get_max_compressed_bpp_with_joiner(i915, adjusted_mode->clock, adjusted_mode->hdisplay, - pipe_config->bigjoiner_pipes); + pipe_config->joiner_pipes); dsc_max_bpp = min(dsc_max_bpp, dsc_joiner_max_bpp); dsc_max_bpp = min(dsc_max_bpp, to_bpp_int(limits->link.max_bpp_x16)); @@ -2252,7 +2252,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, intel_dp_dsc_get_slice_count(connector, adjusted_mode->crtc_clock, adjusted_mode->crtc_hdisplay, - pipe_config->bigjoiner_pipes); + pipe_config->joiner_pipes); if (!dsc_dp_slice_count) { drm_dbg_kms(&dev_priv->drm, "Compressed Slice Count not supported\n"); @@ -2266,7 +2266,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, * is greater than the maximum Cdclock and if slice count is even * then we need to use 2 VDSC instances. */ - if (pipe_config->bigjoiner_pipes || pipe_config->dsc.slice_count > 1) + if (pipe_config->joiner_pipes || pipe_config->dsc.slice_count > 1) pipe_config->dsc.dsc_split = true; ret = intel_dp_dsc_compute_params(connector, pipe_config); @@ -2432,12 +2432,12 @@ intel_dp_compute_link_config(struct intel_encoder *encoder, !intel_dp_supports_fec(intel_dp, connector, pipe_config)) return -EINVAL; - if (intel_dp_need_bigjoiner(intel_dp, connector, + if (intel_dp_need_joiner(intel_dp, connector, adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_clock)) - pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); + pipe_config->joiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); - joiner_needs_dsc = intel_dp_joiner_needs_dsc(i915, pipe_config->bigjoiner_pipes); + joiner_needs_dsc = intel_dp_joiner_needs_dsc(i915, pipe_config->joiner_pipes); dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en || !intel_dp_compute_config_limits(intel_dp, pipe_config, @@ -2757,7 +2757,7 @@ intel_dp_drrs_compute_config(struct intel_connector *connector, * FIXME all joined pipes share the same transcoder. * Need to account for that when updating M/N live. */ - if (has_seamless_m_n(connector) && !pipe_config->bigjoiner_pipes) + if (has_seamless_m_n(connector) && !pipe_config->joiner_pipes) pipe_config->update_m_n = true; if (!can_enable_drrs(connector, pipe_config, downclock_mode)) { diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 106ecfde36d9..4e4f88e69c55 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -121,7 +121,7 @@ int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16, int intel_dp_max_link_data_rate(struct intel_dp *intel_dp, int max_dprx_rate, int max_dprx_lanes); bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, bool use_joiner); -bool intel_dp_has_bigjoiner(struct intel_dp *intel_dp); +bool intel_dp_has_joiner(struct intel_dp *intel_dp); bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, @@ -139,7 +139,7 @@ int intel_dp_dsc_compute_max_bpp(const struct intel_connector *connector, u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, u32 link_clock, u32 lane_count, u32 mode_clock, u32 mode_hdisplay, - bool bigjoiner, + bool joiner, enum intel_output_format output_format, u32 pipe_bpp, u32 timeslots); @@ -149,8 +149,8 @@ int intel_dp_dsc_sink_max_compressed_bpp(const struct intel_connector *connector int bpc); u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, int mode_clock, int mode_hdisplay, - bool bigjoiner); -bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp, + bool joiner); +bool intel_dp_need_joiner(struct intel_dp *intel_dp, struct intel_connector *connector, int hdisplay, int clock); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index c772ba19c547..b2c6f7ec578f 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -105,7 +105,7 @@ static int intel_dp_mst_bw_overhead(const struct intel_crtc_state *crtc_state, dsc_slice_count = intel_dp_dsc_get_slice_count(connector, adjusted_mode->clock, adjusted_mode->hdisplay, - crtc_state->bigjoiner_pipes); + crtc_state->joiner_pipes); } overhead = drm_dp_bw_overhead(crtc_state->lane_count, @@ -567,16 +567,16 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) return -EINVAL; - if (intel_dp_need_bigjoiner(intel_dp, connector, + if (intel_dp_need_joiner(intel_dp, connector, adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_clock)) - pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); + pipe_config->joiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; pipe_config->has_pch_encoder = false; - joiner_needs_dsc = intel_dp_joiner_needs_dsc(dev_priv, pipe_config->bigjoiner_pipes); + joiner_needs_dsc = intel_dp_joiner_needs_dsc(dev_priv, pipe_config->joiner_pipes); dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en || !intel_dp_mst_compute_config_limits(intel_dp, @@ -1375,7 +1375,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, int max_dotclk = to_i915(connector->dev)->display.cdclk.max_dotclk_freq; int max_rate, mode_rate, max_lanes, max_link_clock; int ret; - bool dsc = false, bigjoiner = false; + bool dsc = false, joiner = false; u16 dsc_max_compressed_bpp = 0; u8 dsc_slice_count = 0; int target_clock = mode->clock; @@ -1418,9 +1418,9 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, * corresponding link capabilities of the sink) in case the * stream is uncompressed for it by the last branch device. */ - if (intel_dp_need_bigjoiner(intel_dp, intel_connector, + if (intel_dp_need_joiner(intel_dp, intel_connector, mode->hdisplay, target_clock)) { - bigjoiner = true; + joiner = true; max_dotclk *= 2; } @@ -1449,20 +1449,20 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, max_lanes, target_clock, mode->hdisplay, - bigjoiner, + joiner, INTEL_OUTPUT_FORMAT_RGB, pipe_bpp, 64); dsc_slice_count = intel_dp_dsc_get_slice_count(intel_connector, target_clock, mode->hdisplay, - bigjoiner); + joiner); } dsc = dsc_max_compressed_bpp && dsc_slice_count; } - if (intel_dp_joiner_needs_dsc(dev_priv, bigjoiner) && !dsc) { + if (intel_dp_joiner_needs_dsc(dev_priv, joiner) && !dsc) { *status = MODE_CLOCK_HIGH; return 0; } @@ -1472,7 +1472,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, return 0; } - *status = intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner); + *status = intel_mode_valid_max_plane_size(dev_priv, mode, joiner); return 0; } diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c index 597f8bd6aa1a..ccdf49b2aebb 100644 --- a/drivers/gpu/drm/i915/display/intel_drrs.c +++ b/drivers/gpu/drm/i915/display/intel_drrs.c @@ -135,7 +135,7 @@ static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *c frontbuffer_bits = INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe); for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, - crtc_state->bigjoiner_pipes) + crtc_state->joiner_pipes) frontbuffer_bits |= INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe); return frontbuffer_bits; @@ -157,7 +157,7 @@ void intel_drrs_activate(const struct intel_crtc_state *crtc_state) if (!crtc_state->hw.active) return; - if (intel_crtc_is_bigjoiner_slave(crtc_state)) + if (intel_crtc_is_joiner_slave(crtc_state)) return; mutex_lock(&crtc->drrs.mutex); @@ -189,7 +189,7 @@ void intel_drrs_deactivate(const struct intel_crtc_state *old_crtc_state) if (!old_crtc_state->hw.active) return; - if (intel_crtc_is_bigjoiner_slave(old_crtc_state)) + if (intel_crtc_is_joiner_slave(old_crtc_state)) return; mutex_lock(&crtc->drrs.mutex); diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c index caeca3a8442c..2e4c006122e5 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c @@ -68,7 +68,7 @@ static void intel_crtc_disable_noatomic_begin(struct intel_crtc *crtc, /* Everything's already locked, -EDEADLK can't happen. */ for_each_intel_crtc_in_pipe_mask(&i915->drm, temp_crtc, BIT(pipe) | - intel_crtc_bigjoiner_slave_pipes(crtc_state)) { + intel_crtc_joiner_slave_pipes(crtc_state)) { struct intel_crtc_state *temp_crtc_state = intel_atomic_get_crtc_state(state, temp_crtc); int ret; @@ -189,7 +189,7 @@ static void intel_crtc_disable_noatomic_complete(struct intel_crtc *crtc) /* * Return all the pipes using a transcoder in @transcoder_mask. - * For bigjoiner configs return only the bigjoiner master. + * For joiner configs return only the joiner master. */ static u8 get_transcoder_pipes(struct drm_i915_private *i915, u8 transcoder_mask) @@ -204,7 +204,7 @@ static u8 get_transcoder_pipes(struct drm_i915_private *i915, if (temp_crtc_state->cpu_transcoder == INVALID_TRANSCODER) continue; - if (intel_crtc_is_bigjoiner_slave(temp_crtc_state)) + if (intel_crtc_is_joiner_slave(temp_crtc_state)) continue; if (transcoder_mask & BIT(temp_crtc_state->cpu_transcoder)) @@ -216,7 +216,7 @@ static u8 get_transcoder_pipes(struct drm_i915_private *i915, /* * Return the port sync master and slave pipes linked to @crtc. - * For bigjoiner configs return only the bigjoiner master pipes. + * For joiner configs return only the joiner master pipes. */ static void get_portsync_pipes(struct intel_crtc *crtc, u8 *master_pipe_mask, u8 *slave_pipes_mask) @@ -248,7 +248,7 @@ static void get_portsync_pipes(struct intel_crtc *crtc, *slave_pipes_mask = get_transcoder_pipes(i915, master_crtc_state->sync_mode_slaves_mask); } -static u8 get_bigjoiner_slave_pipes(struct drm_i915_private *i915, u8 master_pipes_mask) +static u8 get_joiner_slave_pipes(struct drm_i915_private *i915, u8 master_pipes_mask) { struct intel_crtc *master_crtc; u8 pipes = 0; @@ -257,7 +257,7 @@ static u8 get_bigjoiner_slave_pipes(struct drm_i915_private *i915, u8 master_pip struct intel_crtc_state *master_crtc_state = to_intel_crtc_state(master_crtc->base.state); - pipes |= intel_crtc_bigjoiner_slave_pipes(master_crtc_state); + pipes |= intel_crtc_joiner_slave_pipes(master_crtc_state); } return pipes; @@ -269,21 +269,21 @@ static void intel_crtc_disable_noatomic(struct intel_crtc *crtc, struct drm_i915_private *i915 = to_i915(crtc->base.dev); u8 portsync_master_mask; u8 portsync_slaves_mask; - u8 bigjoiner_slaves_mask; + u8 joiner_slaves_mask; struct intel_crtc *temp_crtc; /* TODO: Add support for MST */ get_portsync_pipes(crtc, &portsync_master_mask, &portsync_slaves_mask); - bigjoiner_slaves_mask = get_bigjoiner_slave_pipes(i915, + joiner_slaves_mask = get_joiner_slave_pipes(i915, portsync_master_mask | portsync_slaves_mask); drm_WARN_ON(&i915->drm, portsync_master_mask & portsync_slaves_mask || - portsync_master_mask & bigjoiner_slaves_mask || - portsync_slaves_mask & bigjoiner_slaves_mask); + portsync_master_mask & joiner_slaves_mask || + portsync_slaves_mask & joiner_slaves_mask); - for_each_intel_crtc_in_pipe_mask(&i915->drm, temp_crtc, bigjoiner_slaves_mask) + for_each_intel_crtc_in_pipe_mask(&i915->drm, temp_crtc, joiner_slaves_mask) intel_crtc_disable_noatomic_begin(temp_crtc, ctx); for_each_intel_crtc_in_pipe_mask(&i915->drm, temp_crtc, portsync_slaves_mask) @@ -293,7 +293,7 @@ static void intel_crtc_disable_noatomic(struct intel_crtc *crtc, intel_crtc_disable_noatomic_begin(temp_crtc, ctx); for_each_intel_crtc_in_pipe_mask(&i915->drm, temp_crtc, - bigjoiner_slaves_mask | + joiner_slaves_mask | portsync_slaves_mask | portsync_master_mask) intel_crtc_disable_noatomic_complete(temp_crtc); @@ -326,7 +326,7 @@ static void intel_modeset_update_connector_atomic_state(struct drm_i915_private static void intel_crtc_copy_hw_to_uapi_state(struct intel_crtc_state *crtc_state) { - if (intel_crtc_is_bigjoiner_slave(crtc_state)) + if (intel_crtc_is_joiner_slave(crtc_state)) return; crtc_state->uapi.enable = crtc_state->hw.enable; @@ -474,7 +474,7 @@ static bool intel_sanitize_crtc(struct intel_crtc *crtc, } if (!crtc_state->hw.active || - intel_crtc_is_bigjoiner_slave(crtc_state)) + intel_crtc_is_joiner_slave(crtc_state)) return false; needs_link_reset = intel_crtc_needs_link_reset(crtc); @@ -728,15 +728,15 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) encoder->base.crtc = &crtc->base; intel_encoder_get_config(encoder, crtc_state); - /* read out to slave crtc as well for bigjoiner */ - if (crtc_state->bigjoiner_pipes) { + /* read out to slave crtc as well for joiner */ + if (crtc_state->joiner_pipes) { struct intel_crtc *slave_crtc; - /* encoder should read be linked to bigjoiner master */ - WARN_ON(intel_crtc_is_bigjoiner_slave(crtc_state)); + /* encoder should read be linked to joiner master */ + WARN_ON(intel_crtc_is_joiner_slave(crtc_state)); for_each_intel_crtc_in_pipe_mask(&i915->drm, slave_crtc, - intel_crtc_bigjoiner_slave_pipes(crtc_state)) { + intel_crtc_joiner_slave_pipes(crtc_state)) { struct intel_crtc_state *slave_crtc_state; slave_crtc_state = to_intel_crtc_state(slave_crtc->base.state); diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 595eb1b3b6c6..f9bc9679f888 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1625,13 +1625,13 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, } /* - * FIXME figure out what is wrong with PSR+bigjoiner and + * FIXME figure out what is wrong with PSR+joiner and * fix it. Presumably something related to the fact that * PSR is a transcoder level feature. */ - if (crtc_state->bigjoiner_pipes) { + if (crtc_state->joiner_pipes) { drm_dbg_kms(&dev_priv->drm, - "PSR disabled due to bigjoiner\n"); + "PSR disabled due to joiner\n"); return; } diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index 17d6572f9d0a..47468af8e029 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -380,7 +380,7 @@ int intel_dsc_get_num_vdsc_instances(const struct intel_crtc_state *crtc_state) { int num_vdsc_instances = intel_dsc_get_vdsc_per_pipe(crtc_state); - if (crtc_state->bigjoiner_pipes) + if (crtc_state->joiner_pipes) num_vdsc_instances *= 2; return num_vdsc_instances; @@ -761,8 +761,8 @@ void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state) struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 dss_ctl1_val = 0; - if (crtc_state->bigjoiner_pipes && !crtc_state->dsc.compression_enable) { - if (intel_crtc_is_bigjoiner_slave(crtc_state)) + if (crtc_state->joiner_pipes && !crtc_state->dsc.compression_enable) { + if (intel_crtc_is_joiner_slave(crtc_state)) dss_ctl1_val |= UNCOMPRESSED_JOINER_SLAVE; else dss_ctl1_val |= UNCOMPRESSED_JOINER_MASTER; @@ -789,9 +789,9 @@ void intel_dsc_enable(const struct intel_crtc_state *crtc_state) dss_ctl2_val |= RIGHT_BRANCH_VDSC_ENABLE; dss_ctl1_val |= JOINER_ENABLE; } - if (crtc_state->bigjoiner_pipes) { + if (crtc_state->joiner_pipes) { dss_ctl1_val |= BIG_JOINER_ENABLE; - if (!intel_crtc_is_bigjoiner_slave(crtc_state)) + if (!intel_crtc_is_joiner_slave(crtc_state)) dss_ctl1_val |= MASTER_BIG_JOINER_ENABLE; } intel_de_write(dev_priv, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), dss_ctl1_val); @@ -805,7 +805,7 @@ void intel_dsc_disable(const struct intel_crtc_state *old_crtc_state) /* Disable only if either of them is enabled */ if (old_crtc_state->dsc.compression_enable || - old_crtc_state->bigjoiner_pipes) { + old_crtc_state->joiner_pipes) { intel_de_write(dev_priv, dss_ctl1_reg(crtc, old_crtc_state->cpu_transcoder), 0); intel_de_write(dev_priv, dss_ctl2_reg(crtc, old_crtc_state->cpu_transcoder), 0); } diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h index 2cc41ff08909..b12ed71c42c0 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.h +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h @@ -21,7 +21,7 @@ int intel_dsc_compute_params(struct intel_crtc_state *pipe_config); void intel_dsc_get_config(struct intel_crtc_state *crtc_state); enum intel_display_power_domain intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder); -struct intel_crtc *intel_dsc_get_bigjoiner_secondary(const struct intel_crtc *primary_crtc); +struct intel_crtc *intel_dsc_get_joiner_secondary(const struct intel_crtc *primary_crtc); int intel_dsc_get_num_vdsc_instances(const struct intel_crtc_state *crtc_state); void intel_dsc_dsi_pps_write(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 5f3657aa8313..58531f02971b 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -123,7 +123,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, * FIXME all joined pipes share the same transcoder. * Need to account for that during VRR toggle/push/etc. */ - if (crtc_state->bigjoiner_pipes) + if (crtc_state->joiner_pipes) return; if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index 7b79704fa674..06e01dd6fd62 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -2494,9 +2494,9 @@ skl_get_initial_plane_config(struct intel_crtc *crtc, drm_WARN_ON(dev, pipe != crtc->pipe); - if (crtc_state->bigjoiner_pipes) { + if (crtc_state->joiner_pipes) { drm_dbg_kms(&dev_priv->drm, - "Unsupported bigjoiner configuration for initial FB\n"); + "Unsupported joiner configuration for initial FB\n"); return; } From patchwork Mon May 20 07:38:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanislav Lisovskiy X-Patchwork-Id: 13668091 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 730BCC04FFE for ; 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X-CSE-ConnectionGUID: m3eaQPmvREC5s8X/4VR20w== X-CSE-MsgGUID: tk/0zKkiRKe8M/VziUCORw== X-IronPort-AV: E=McAfee;i="6600,9927,11077"; a="23445001" X-IronPort-AV: E=Sophos;i="6.08,174,1712646000"; d="scan'208";a="23445001" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 00:38:45 -0700 X-CSE-ConnectionGUID: xy0WgZWKRgGt+LylONEbGQ== X-CSE-MsgGUID: UdzaZQdDRZykQoq9MzoNTA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,174,1712646000"; d="scan'208";a="33053217" Received: from unknown (HELO slisovsk-Lenovo-ideapad-720S-13IKB.fi.intel.com) ([10.237.72.65]) by orviesa007.jf.intel.com with ESMTP; 20 May 2024 00:38:44 -0700 From: Stanislav Lisovskiy To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 2/5] drm/i915: Implement basic functions for ultrajoiner support Date: Mon, 20 May 2024 10:38:36 +0300 Message-Id: <20240520073839.23881-3-stanislav.lisovskiy@intel.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240520073839.23881-1-stanislav.lisovskiy@intel.com> References: <20240520073839.23881-1-stanislav.lisovskiy@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Lets implement or change basic functions required for ultrajoiner support from atomic commit/modesetting point of view. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_display.c | 66 +++++++++++++++++--- 1 file changed, 56 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index c74721188e59..c390b79a43d6 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -242,33 +242,65 @@ is_trans_port_sync_mode(const struct intel_crtc_state *crtc_state) is_trans_port_sync_slave(crtc_state); } -static enum pipe joiner_master_pipe(const struct intel_crtc_state *crtc_state) +static u8 joiner_master_pipes(const struct intel_crtc_state *crtc_state) { - return ffs(crtc_state->joiner_pipes) - 1; + return BIT(PIPE_A) | BIT(PIPE_C); +} + +static u8 joiner_primary_master_pipes(const struct intel_crtc_state *crtc_state) +{ + return BIT(PIPE_A); } u8 intel_crtc_joiner_slave_pipes(const struct intel_crtc_state *crtc_state) { - if (crtc_state->joiner_pipes) - return crtc_state->joiner_pipes & ~BIT(joiner_master_pipe(crtc_state)); + if (intel_is_ultrajoiner(crtc_state)) + return crtc_state->joiner_pipes & ~joiner_primary_master_pipes(crtc_state); + else if (intel_is_bigjoiner(crtc_state)) + return crtc_state->joiner_pipes & ~joiner_master_pipes(crtc_state); else return 0; } -bool intel_crtc_is_joiner_slave(const struct intel_crtc_state *crtc_state) +bool intel_crtc_is_bigjoiner_slave(const struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); return crtc_state->joiner_pipes && - crtc->pipe != joiner_master_pipe(crtc_state); + !(BIT(crtc->pipe) & joiner_master_pipes(crtc_state)); +} + +bool intel_crtc_is_bigjoiner_master(const struct intel_crtc_state *crtc_state) +{ + return !intel_crtc_is_bigjoiner_slave(crtc_state); +} + +bool intel_crtc_is_joiner_slave(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + + if (intel_is_ultrajoiner(crtc_state)) + return crtc_state->joiner_pipes && + !(BIT(crtc->pipe) & joiner_primary_master_pipes(crtc_state)); + return intel_crtc_is_bigjoiner_slave(crtc_state); } bool intel_crtc_is_joiner_master(const struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + if (intel_is_ultrajoiner(crtc_state)) + return crtc_state->joiner_pipes && + (BIT(crtc->pipe) & joiner_primary_master_pipes(crtc_state)); + return intel_crtc_is_bigjoiner_master(crtc_state); +} + +bool intel_crtc_is_joiner_primary_master(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + return crtc_state->joiner_pipes && - crtc->pipe == joiner_master_pipe(crtc_state); + (BIT(crtc->pipe) & joiner_primary_master_pipes(crtc_state)); } static int intel_joiner_num_pipes(const struct intel_crtc_state *crtc_state) @@ -283,12 +315,26 @@ u8 intel_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state) return BIT(crtc->pipe) | crtc_state->joiner_pipes; } +enum pipe intel_crtc_master_pipe(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + + if (intel_is_ultrajoiner(crtc_state)) { + return ffs(joiner_primary_master_pipes(crtc_state)) - 1; + } else if (intel_is_bigjoiner(crtc_state)) { + return intel_crtc_is_joiner_slave(crtc_state) ? + crtc->pipe - 1 : crtc->pipe; + } else { + return crtc->pipe; + } +} + struct intel_crtc *intel_master_crtc(const struct intel_crtc_state *crtc_state) { struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); if (intel_crtc_is_joiner_slave(crtc_state)) - return intel_crtc_for_pipe(i915, joiner_master_pipe(crtc_state)); + return intel_crtc_for_pipe(i915, intel_crtc_master_pipe(crtc_state)); else return to_intel_crtc(crtc_state->uapi.crtc); } @@ -2857,7 +2903,7 @@ static void intel_joiner_adjust_pipe_src(struct intel_crtc_state *crtc_state) if (num_pipes < 2) return; - master_pipe = joiner_master_pipe(crtc_state); + master_pipe = intel_crtc_master_pipe(crtc_state); width = drm_rect_width(&crtc_state->pipe_src); drm_rect_translate_to(&crtc_state->pipe_src, @@ -5898,7 +5944,7 @@ static int intel_atomic_check_joiner(struct intel_atomic_state *state, /* sanity check */ if (drm_WARN_ON(&i915->drm, - master_crtc->pipe != joiner_master_pipe(master_crtc_state))) + master_crtc->pipe != intel_crtc_master_pipe(master_crtc_state))) return -EINVAL; if (master_crtc_state->joiner_pipes & ~joiner_pipes(i915)) { From patchwork Mon May 20 07:38:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanislav Lisovskiy X-Patchwork-Id: 13668088 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B16C3C25B79 for ; Mon, 20 May 2024 07:38:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8DA2C10E2C0; Mon, 20 May 2024 07:38:48 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="DAxzZDdB"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id BA90B10E10E for ; Mon, 20 May 2024 07:38:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716190727; x=1747726727; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ThRpxKIQJZ7zeB+xTUSy7rto1T9CeL16hDt8wrjTuzM=; b=DAxzZDdBUy1zoCf3ikyooHzloWJGJy96vWJ6Et2qK4Svc3oOPcjROR2p vs2BSYy/rhT+uCdpLVSo0+wXZu6WLtzyo5sWZlhhDP84p2ook0g0XwgZh HWJyVnM6eYhRMG0dEbNFoXjDrRwt0/x8nwxLhScd83yXR4BZFp0ADAskb T6RmifQ35NpNlOkBtRpwh0bpXqArmxb6GQJ7iRvrK+48lm7woT/De5tjp OB4PEXDRkUp+o6FWtHPJrBzx/WYXkOm9PF0TmWxayPvsEtjnLqVv1EUTJ nhta6xB+dmuGEVaaG9Y0rgaLIBtnHao6qGiOXpVT+76ejH4MBOGlGPvNi w==; X-CSE-ConnectionGUID: LEgNg7HDRMCY2S0LCF1bQA== X-CSE-MsgGUID: WjOtrqR/Rq691e5jRpjBbQ== X-IronPort-AV: E=McAfee;i="6600,9927,11077"; a="23445002" X-IronPort-AV: E=Sophos;i="6.08,174,1712646000"; d="scan'208";a="23445002" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2024 00:38:47 -0700 X-CSE-ConnectionGUID: 9hf+P2HtQtGDLagannlt9g== X-CSE-MsgGUID: xmJRRpFeQgy3eL4BAw2YTw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,174,1712646000"; d="scan'208";a="33053221" Received: from unknown (HELO slisovsk-Lenovo-ideapad-720S-13IKB.fi.intel.com) ([10.237.72.65]) by orviesa007.jf.intel.com with ESMTP; 20 May 2024 00:38:45 -0700 From: Stanislav Lisovskiy To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 3/5] drm/i915: Implement hw state readout for ultrajoiner Date: Mon, 20 May 2024 10:38:37 +0300 Message-Id: <20240520073839.23881-4-stanislav.lisovskiy@intel.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240520073839.23881-1-stanislav.lisovskiy@intel.com> References: <20240520073839.23881-1-stanislav.lisovskiy@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Ultrajoiner mode has some new bits and states to be read out from the hw. Lets make changes accordingly. SIgned-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_display.c | 56 +++++++++++++++---- .../gpu/drm/i915/display/intel_vdsc_regs.h | 2 + 2 files changed, 46 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index c390b79a43d6..0dc5349712f6 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3537,12 +3537,14 @@ static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv, } static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, - u8 *master_pipes, u8 *slave_pipes) + u8 *master_pipes, u8 *slave_pipes, + bool *ultrajoiner_used) { struct intel_crtc *crtc; *master_pipes = 0; *slave_pipes = 0; + *ultrajoiner_used = false; for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, joiner_pipes(dev_priv)) { @@ -3557,6 +3559,20 @@ static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, if (!(tmp & BIG_JOINER_ENABLE)) continue; + if (tmp & ULTRA_JOINER_ENABLE) + *ultrajoiner_used = true; + + /* + * As of now we always assume primary master to be PIPE A. + * Otherwise we need a new field in crtc_state to track + * primary master as well. + */ + drm_WARN(&dev_priv->drm, + (tmp & MASTER_ULTRA_JOINER_ENABLE) && crtc->pipe != PIPE_A, + "Ultrajoiner primary master isn't PIPE A(pipe %c)", + pipe_name(crtc->pipe)); + + if (tmp & MASTER_BIG_JOINER_ENABLE) *master_pipes |= BIT(pipe); else @@ -3583,7 +3599,8 @@ static void enabled_joiner_pipes(struct drm_i915_private *dev_priv, *master_pipes, *slave_pipes); } -static enum pipe get_joiner_master_pipe(enum pipe pipe, u8 master_pipes, u8 slave_pipes) +static enum pipe get_joiner_master_pipe(enum pipe pipe, u8 master_pipes, + u8 slave_pipes, bool ultrajoiner_used) { if ((slave_pipes & BIT(pipe)) == 0) return pipe; @@ -3591,15 +3608,22 @@ static enum pipe get_joiner_master_pipe(enum pipe pipe, u8 master_pipes, u8 slav /* ignore everything above our pipe */ master_pipes &= ~GENMASK(7, pipe); - /* highest remaining bit should be our master pipe */ - return fls(master_pipes) - 1; + if (!ultrajoiner_used) { + /* highest remaining bit should be our master pipe */ + return fls(master_pipes) - 1; + } else { + /* lowest remaining bit should be our primary master pipe */ + return ffs(master_pipes) - 1; + } } -static u8 get_joiner_slave_pipes(enum pipe pipe, u8 master_pipes, u8 slave_pipes) +static u8 get_joiner_slave_pipes(enum pipe pipe, u8 master_pipes, + u8 slave_pipes, bool ultrajoiner_used) { enum pipe master_pipe, next_master_pipe; - master_pipe = get_joiner_master_pipe(pipe, master_pipes, slave_pipes); + master_pipe = get_joiner_master_pipe(pipe, master_pipes, + slave_pipes, ultrajoiner_used); if ((master_pipes & BIT(master_pipe)) == 0) return 0; @@ -3611,7 +3635,10 @@ static u8 get_joiner_slave_pipes(enum pipe pipe, u8 master_pipes, u8 slave_pipes /* lowest remaining bit should be the next master pipe */ next_master_pipe = ffs(master_pipes) - 1; - return slave_pipes & GENMASK(next_master_pipe - 1, master_pipe); + if (!ultrajoiner_used) + return slave_pipes & GENMASK(next_master_pipe - 1, master_pipe); + else + return (slave_pipes | master_pipes) & ~BIT(master_pipe); } static u8 hsw_panel_transcoders(struct drm_i915_private *i915) @@ -3632,6 +3659,7 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc) enum transcoder cpu_transcoder; u8 master_pipes, slave_pipes; u8 enabled_transcoders = 0; + bool ultrajoiner_used; /* * XXX: Do intel_display_power_get_if_enabled before reading this (for @@ -3682,10 +3710,11 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc) enabled_transcoders |= BIT(cpu_transcoder); /* joiner slave -> consider the master pipe's transcoder as well */ - enabled_joiner_pipes(dev_priv, &master_pipes, &slave_pipes); + enabled_joiner_pipes(dev_priv, &master_pipes, &slave_pipes, &ultrajoiner_used); if (slave_pipes & BIT(crtc->pipe)) { cpu_transcoder = (enum transcoder) - get_joiner_master_pipe(crtc->pipe, master_pipes, slave_pipes); + get_joiner_master_pipe(crtc->pipe, master_pipes, + slave_pipes, ultrajoiner_used); if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder)) enabled_transcoders |= BIT(cpu_transcoder); } @@ -3816,15 +3845,18 @@ static void intel_joiner_get_config(struct intel_crtc_state *crtc_state) struct drm_i915_private *i915 = to_i915(crtc->base.dev); u8 master_pipes, slave_pipes; enum pipe pipe = crtc->pipe; + bool ultrajoiner_used; - enabled_joiner_pipes(i915, &master_pipes, &slave_pipes); + enabled_joiner_pipes(i915, &master_pipes, &slave_pipes, &ultrajoiner_used); if (((master_pipes | slave_pipes) & BIT(pipe)) == 0) return; crtc_state->joiner_pipes = - BIT(get_joiner_master_pipe(pipe, master_pipes, slave_pipes)) | - get_joiner_slave_pipes(pipe, master_pipes, slave_pipes); + BIT(get_joiner_master_pipe(pipe, master_pipes, + slave_pipes, ultrajoiner_used)) | + get_joiner_slave_pipes(pipe, master_pipes, + slave_pipes, ultrajoiner_used); } static bool hsw_get_pipe_config(struct intel_crtc *crtc, diff --git a/drivers/gpu/drm/i915/display/intel_vdsc_regs.h b/drivers/gpu/drm/i915/display/intel_vdsc_regs.h index 8b21dc8e26d5..b3d91c0a17a6 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc_regs.h +++ b/drivers/gpu/drm/i915/display/intel_vdsc_regs.h @@ -37,6 +37,8 @@ #define SPLITTER_CONFIGURATION_MASK REG_GENMASK(26, 25) #define SPLITTER_CONFIGURATION_2_SEGMENT REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 0) #define SPLITTER_CONFIGURATION_4_SEGMENT REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 1) +#define ULTRA_JOINER_ENABLE (1 << 23) +#define MASTER_ULTRA_JOINER_ENABLE (1 << 22) #define UNCOMPRESSED_JOINER_MASTER (1 << 21) #define UNCOMPRESSED_JOINER_SLAVE (1 << 20) From patchwork Mon May 20 07:38:38 2024 Content-Type: text/plain; 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d="scan'208";a="33053226" Received: from unknown (HELO slisovsk-Lenovo-ideapad-720S-13IKB.fi.intel.com) ([10.237.72.65]) by orviesa007.jf.intel.com with ESMTP; 20 May 2024 00:38:47 -0700 From: Stanislav Lisovskiy To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 4/5] drm/i915: Compute config and mode valid changes for ultrajoiner Date: Mon, 20 May 2024 10:38:38 +0300 Message-Id: <20240520073839.23881-5-stanislav.lisovskiy@intel.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240520073839.23881-1-stanislav.lisovskiy@intel.com> References: <20240520073839.23881-1-stanislav.lisovskiy@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Implement required changes for mode validation and compute config, to support Ultrajoiner. This also includes required DSC changes and checks. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_display.c | 5 +- drivers/gpu/drm/i915/display/intel_display.h | 3 +- drivers/gpu/drm/i915/display/intel_dp.c | 109 ++++++++++++++----- drivers/gpu/drm/i915/display/intel_dp.h | 16 ++- drivers/gpu/drm/i915/display/intel_dp_mst.c | 31 ++++-- drivers/gpu/drm/i915/display/intel_dsi.c | 2 +- drivers/gpu/drm/i915/display/intel_hdmi.c | 14 ++- drivers/gpu/drm/i915/display/intel_vdsc.c | 27 ++++- 8 files changed, 158 insertions(+), 49 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 0dc5349712f6..6510476ac98c 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -8051,7 +8051,8 @@ enum drm_mode_status intel_cpu_transcoder_mode_valid(struct drm_i915_private *de enum drm_mode_status intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv, const struct drm_display_mode *mode, - bool joiner) + bool bigjoiner, + bool ultrajoiner) { int plane_width_max, plane_height_max; @@ -8068,7 +8069,7 @@ intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv, * too big for that. */ if (DISPLAY_VER(dev_priv) >= 11) { - plane_width_max = 5120 << joiner; + plane_width_max = (5120 << bigjoiner) << ultrajoiner; plane_height_max = 4320; } else { plane_width_max = 5120; diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index a2ec5309113e..aafb2eac5e03 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -415,7 +415,8 @@ u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv, enum drm_mode_status intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv, const struct drm_display_mode *mode, - bool joiner); + bool bigjoiner, + bool ultrajoiner); enum drm_mode_status intel_cpu_transcoder_mode_valid(struct drm_i915_private *i915, const struct drm_display_mode *mode); diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index d6893a1cf5cc..858db0ac9907 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -805,33 +805,41 @@ u32 intel_dp_dsc_nearest_valid_bpp(struct drm_i915_private *i915, u32 bpp, u32 p static u32 get_max_compressed_bpp_with_joiner(struct drm_i915_private *i915, u32 mode_clock, u32 mode_hdisplay, - bool joiner) + bool bigjoiner, bool ultrajoiner) { u32 max_bpp_small_joiner_ram; + u32 max_bpp_joiner; /* Small Joiner Check: output bpp <= joiner RAM (bits) / Horiz. width */ - max_bpp_small_joiner_ram = small_joiner_ram_size_bits(i915) / mode_hdisplay; + max_bpp_joiner = max_bpp_small_joiner_ram = + small_joiner_ram_size_bits(i915) / mode_hdisplay; - if (joiner) { + /* if ultra joiner is enabled, we have 2 bigjoiners enabled */ + if (bigjoiner || ultrajoiner) { int joiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24; /* With joiner multiple dsc engines are used in parallel so PPC is 2 */ int ppc = 2; - u32 max_bpp_joiner = + max_bpp_joiner = i915->display.cdclk.max_cdclk_freq * ppc * joiner_interface_bits / intel_dp_mode_to_fec_clock(mode_clock); max_bpp_small_joiner_ram *= 2; + } - return min(max_bpp_small_joiner_ram, max_bpp_joiner); + if (ultrajoiner) { + /* both get multiplied by 2, because ram bits/ppc now doubled */ + max_bpp_small_joiner_ram *= 2; + max_bpp_joiner *= 2; } - return max_bpp_small_joiner_ram; + return min(max_bpp_small_joiner_ram, max_bpp_joiner); } u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, u32 link_clock, u32 lane_count, u32 mode_clock, u32 mode_hdisplay, - bool joiner, + bool bigjoiner, + bool ultrajoiner, enum intel_output_format output_format, u32 pipe_bpp, u32 timeslots) @@ -877,7 +885,7 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, intel_dp_mode_to_fec_clock(mode_clock)); joiner_max_bpp = get_max_compressed_bpp_with_joiner(i915, mode_clock, - mode_hdisplay, joiner); + mode_hdisplay, bigjoiner, ultrajoiner); bits_per_pixel = min(bits_per_pixel, joiner_max_bpp); bits_per_pixel = intel_dp_dsc_nearest_valid_bpp(i915, bits_per_pixel, pipe_bpp); @@ -887,7 +895,8 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, int mode_clock, int mode_hdisplay, - bool joiner) + bool bigjoiner, + bool ultrajoiner) { struct drm_i915_private *i915 = to_i915(connector->base.dev); u8 min_slice_count, i; @@ -921,14 +930,18 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, /* Find the closest match to the valid slice count values */ for (i = 0; i < ARRAY_SIZE(valid_dsc_slicecount); i++) { - u8 test_slice_count = valid_dsc_slicecount[i] << joiner; + u8 test_slice_count = (valid_dsc_slicecount[i] << bigjoiner) << ultrajoiner; if (test_slice_count > drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd, false)) break; /* big joiner needs small joiner to be enabled */ - if (joiner && test_slice_count < 4) + if (bigjoiner && test_slice_count < 4) + continue; + + /* big joiner needs small joiner to be enabled */ + if (ultrajoiner && test_slice_count < 8) continue; if (min_slice_count <= test_slice_count) @@ -1207,7 +1220,7 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector, return MODE_OK; } -bool intel_dp_need_joiner(struct intel_dp *intel_dp, +bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp, struct intel_connector *connector, int hdisplay, int clock) { @@ -1220,6 +1233,35 @@ bool intel_dp_need_joiner(struct intel_dp *intel_dp, connector->force_joiner_enable; } +static +bool intel_can_ultrajoiner(const struct intel_encoder *encoder) +{ + struct drm_i915_private *i915 = to_i915(encoder->base.dev); + + return IS_DGFX(i915) && DISPLAY_VER(i915) >= 14; +} + +bool intel_dp_need_ultrajoiner(struct intel_dp *dp, int clock) +{ + const struct intel_encoder *encoder = &dp_to_dig_port(dp)->base; + struct drm_i915_private *i915 = to_i915(encoder->base.dev); + + if (!intel_can_ultrajoiner(encoder)) + return false; + + return clock > (i915->display.cdclk.max_dotclk_freq * 2); +} + +bool intel_is_bigjoiner(const struct intel_crtc_state *pipe_config) +{ + return hweight8(pipe_config->joiner_pipes) == 2; +} + +bool intel_is_ultrajoiner(const struct intel_crtc_state *pipe_config) +{ + return hweight8(pipe_config->joiner_pipes) == 4; +} + static enum drm_mode_status intel_dp_mode_valid(struct drm_connector *_connector, struct drm_display_mode *mode) @@ -1234,7 +1276,7 @@ intel_dp_mode_valid(struct drm_connector *_connector, u16 dsc_max_compressed_bpp = 0; u8 dsc_slice_count = 0; enum drm_mode_status status; - bool dsc = false, joiner = false; + bool dsc = false, bigjoiner = false, ultrajoiner = false; status = intel_cpu_transcoder_mode_valid(dev_priv, mode); if (status != MODE_OK) @@ -1255,11 +1297,16 @@ intel_dp_mode_valid(struct drm_connector *_connector, target_clock = fixed_mode->clock; } - if (intel_dp_need_joiner(intel_dp, connector, + if (intel_dp_need_ultrajoiner(intel_dp, target_clock)) { + ultrajoiner = true; + max_dotclk *= 4; + } + else if (intel_dp_need_bigjoiner(intel_dp, connector, mode->hdisplay, target_clock)) { - joiner = true; + bigjoiner = true; max_dotclk *= 2; } + if (target_clock > max_dotclk) return MODE_CLOCK_HIGH; @@ -1304,20 +1351,22 @@ intel_dp_mode_valid(struct drm_connector *_connector, max_lanes, target_clock, mode->hdisplay, - joiner, + bigjoiner, + ultrajoiner, output_format, pipe_bpp, 64); dsc_slice_count = intel_dp_dsc_get_slice_count(connector, target_clock, mode->hdisplay, - joiner); + bigjoiner, + ultrajoiner); } dsc = dsc_max_compressed_bpp && dsc_slice_count; } - if (intel_dp_joiner_needs_dsc(dev_priv, joiner) && !dsc) + if (intel_dp_joiner_needs_dsc(dev_priv, bigjoiner, ultrajoiner) && !dsc) return MODE_CLOCK_HIGH; if (mode_rate > max_rate && !dsc) @@ -1327,7 +1376,7 @@ intel_dp_mode_valid(struct drm_connector *_connector, if (status != MODE_OK) return status; - return intel_mode_valid_max_plane_size(dev_priv, mode, joiner); + return intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner, ultrajoiner); } bool intel_dp_source_supports_tps3(struct drm_i915_private *i915) @@ -2018,7 +2067,8 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, dsc_joiner_max_bpp = get_max_compressed_bpp_with_joiner(i915, adjusted_mode->clock, adjusted_mode->hdisplay, - pipe_config->joiner_pipes); + intel_is_bigjoiner(pipe_config), + intel_is_ultrajoiner(pipe_config)); dsc_max_bpp = min(dsc_max_bpp, dsc_joiner_max_bpp); dsc_max_bpp = min(dsc_max_bpp, to_bpp_int(limits->link.max_bpp_x16)); @@ -2252,7 +2302,8 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, intel_dp_dsc_get_slice_count(connector, adjusted_mode->crtc_clock, adjusted_mode->crtc_hdisplay, - pipe_config->joiner_pipes); + intel_is_bigjoiner(pipe_config), + intel_is_ultrajoiner(pipe_config)); if (!dsc_dp_slice_count) { drm_dbg_kms(&dev_priv->drm, "Compressed Slice Count not supported\n"); @@ -2401,14 +2452,15 @@ int intel_dp_config_required_rate(const struct intel_crtc_state *crtc_state) return intel_dp_link_required(adjusted_mode->crtc_clock, bpp); } -bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, bool use_joiner) +bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, bool bigjoiner, bool ultrajoiner) { /* * Pipe joiner needs compression up to display 12 due to bandwidth * limitation. DG2 onwards pipe joiner can be enabled without * compression. + * Ultrajoiner always needs compression. */ - return DISPLAY_VER(i915) < 13 && use_joiner; + return (DISPLAY_VER(i915) < 13 && bigjoiner) || ultrajoiner; } static int @@ -2426,18 +2478,21 @@ intel_dp_compute_link_config(struct intel_encoder *encoder, struct intel_dp *intel_dp = enc_to_intel_dp(encoder); struct link_config_limits limits; bool dsc_needed, joiner_needs_dsc; + bool bigjoiner = false, ultrajoiner = false; int ret = 0; if (pipe_config->fec_enable && !intel_dp_supports_fec(intel_dp, connector, pipe_config)) return -EINVAL; - if (intel_dp_need_joiner(intel_dp, connector, - adjusted_mode->crtc_hdisplay, - adjusted_mode->crtc_clock)) + if (intel_dp_need_ultrajoiner(intel_dp, adjusted_mode->crtc_clock)) + pipe_config->joiner_pipes = GENMASK(crtc->pipe + 3, crtc->pipe); + else if (intel_dp_need_bigjoiner(intel_dp, connector, + adjusted_mode->crtc_hdisplay, + adjusted_mode->crtc_clock)) pipe_config->joiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); - joiner_needs_dsc = intel_dp_joiner_needs_dsc(i915, pipe_config->joiner_pipes); + joiner_needs_dsc = intel_dp_joiner_needs_dsc(i915, bigjoiner, ultrajoiner); dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en || !intel_dp_compute_config_limits(intel_dp, pipe_config, diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 4e4f88e69c55..d0939052146c 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -120,7 +120,7 @@ int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16, int bw_overhead); int intel_dp_max_link_data_rate(struct intel_dp *intel_dp, int max_dprx_rate, int max_dprx_lanes); -bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, bool use_joiner); +bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, bool use_bigjoiner, bool use_ultrajoiner); bool intel_dp_has_joiner(struct intel_dp *intel_dp); bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); @@ -139,7 +139,8 @@ int intel_dp_dsc_compute_max_bpp(const struct intel_connector *connector, u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, u32 link_clock, u32 lane_count, u32 mode_clock, u32 mode_hdisplay, - bool joiner, + bool bigjoiner, + bool ultrajoiner, enum intel_output_format output_format, u32 pipe_bpp, u32 timeslots); @@ -149,10 +150,17 @@ int intel_dp_dsc_sink_max_compressed_bpp(const struct intel_connector *connector int bpc); u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, int mode_clock, int mode_hdisplay, - bool joiner); -bool intel_dp_need_joiner(struct intel_dp *intel_dp, + bool bigjoiner, bool ultrajoiner); +bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp, struct intel_connector *connector, int hdisplay, int clock); +bool intel_dp_need_ultrajoiner(struct intel_dp *intel_dp, int clock); +bool intel_is_bigjoiner(const struct intel_crtc_state *pipe_config); +bool intel_is_ultrajoiner(const struct intel_crtc_state *pipe_config); +bool intel_crtc_is_bigjoiner_slave(const struct intel_crtc_state *crtc_state); +bool intel_crtc_is_bigjoiner_master(const struct intel_crtc_state *crtc_state); +bool intel_crtc_is_joiner_primary_master(const struct intel_crtc_state *crtc_state); +enum pipe intel_crtc_master_pipe(const struct intel_crtc_state *crtc_state); static inline unsigned int intel_dp_unused_lane_mask(int lane_count) { diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index b2c6f7ec578f..2ac0835c1e8d 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -105,7 +105,8 @@ static int intel_dp_mst_bw_overhead(const struct intel_crtc_state *crtc_state, dsc_slice_count = intel_dp_dsc_get_slice_count(connector, adjusted_mode->clock, adjusted_mode->hdisplay, - crtc_state->joiner_pipes); + intel_is_bigjoiner(crtc_state), + intel_is_ultrajoiner(crtc_state)); } overhead = drm_dp_bw_overhead(crtc_state->lane_count, @@ -567,7 +568,9 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) return -EINVAL; - if (intel_dp_need_joiner(intel_dp, connector, + if (intel_dp_need_ultrajoiner(intel_dp, adjusted_mode->crtc_clock)) + pipe_config->joiner_pipes = GENMASK(crtc->pipe + 3, crtc->pipe); + else if (intel_dp_need_bigjoiner(intel_dp, connector, adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_clock)) pipe_config->joiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); @@ -576,7 +579,8 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; pipe_config->has_pch_encoder = false; - joiner_needs_dsc = intel_dp_joiner_needs_dsc(dev_priv, pipe_config->joiner_pipes); + joiner_needs_dsc = intel_dp_joiner_needs_dsc(dev_priv, intel_is_bigjoiner(pipe_config), + intel_is_ultrajoiner(pipe_config)); dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en || !intel_dp_mst_compute_config_limits(intel_dp, @@ -1375,7 +1379,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, int max_dotclk = to_i915(connector->dev)->display.cdclk.max_dotclk_freq; int max_rate, mode_rate, max_lanes, max_link_clock; int ret; - bool dsc = false, joiner = false; + bool dsc = false, bigjoiner = false, ultrajoiner = false; u16 dsc_max_compressed_bpp = 0; u8 dsc_slice_count = 0; int target_clock = mode->clock; @@ -1418,9 +1422,12 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, * corresponding link capabilities of the sink) in case the * stream is uncompressed for it by the last branch device. */ - if (intel_dp_need_joiner(intel_dp, intel_connector, - mode->hdisplay, target_clock)) { - joiner = true; + if (intel_dp_need_ultrajoiner(intel_dp, target_clock)) { + ultrajoiner = true; + max_dotclk *= 4; + } else if (intel_dp_need_bigjoiner(intel_dp, intel_connector, + mode->hdisplay, target_clock)) { + bigjoiner = true; max_dotclk *= 2; } @@ -1449,20 +1456,22 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, max_lanes, target_clock, mode->hdisplay, - joiner, + bigjoiner, + ultrajoiner, INTEL_OUTPUT_FORMAT_RGB, pipe_bpp, 64); dsc_slice_count = intel_dp_dsc_get_slice_count(intel_connector, target_clock, mode->hdisplay, - joiner); + bigjoiner, + ultrajoiner); } dsc = dsc_max_compressed_bpp && dsc_slice_count; } - if (intel_dp_joiner_needs_dsc(dev_priv, joiner) && !dsc) { + if (intel_dp_joiner_needs_dsc(dev_priv, bigjoiner, ultrajoiner) && !dsc) { *status = MODE_CLOCK_HIGH; return 0; } @@ -1472,7 +1481,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, return 0; } - *status = intel_mode_valid_max_plane_size(dev_priv, mode, joiner); + *status = intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner, ultrajoiner); return 0; } diff --git a/drivers/gpu/drm/i915/display/intel_dsi.c b/drivers/gpu/drm/i915/display/intel_dsi.c index bd5888ce4852..1a7e9a56fccd 100644 --- a/drivers/gpu/drm/i915/display/intel_dsi.c +++ b/drivers/gpu/drm/i915/display/intel_dsi.c @@ -76,7 +76,7 @@ enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector, if (fixed_mode->clock > max_dotclk) return MODE_CLOCK_HIGH; - return intel_mode_valid_max_plane_size(dev_priv, mode, false); + return intel_mode_valid_max_plane_size(dev_priv, mode, false, false); } struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi, diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index 5f6deceaf8ba..ecb8fb128cbd 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -2043,7 +2043,7 @@ intel_hdmi_mode_valid(struct drm_connector *connector, return status; } - return intel_mode_valid_max_plane_size(dev_priv, mode, false); + return intel_mode_valid_max_plane_size(dev_priv, mode, false, false); } bool intel_hdmi_bpc_possible(const struct intel_crtc_state *crtc_state, @@ -2336,6 +2336,18 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder, return ret; } + if (adjusted_mode->crtc_clock > dev_priv->display.cdclk.max_dotclk_freq || + pipe_config->joiner_pipes) { + if (pipe_config->dsc.slice_count < 2) { + drm_dbg_kms(&dev_priv->drm, + "Cannot split stream to use 2 VDSC instances\n"); + return -EINVAL; + } + + pipe_config->dsc.dsc_split = true; + } + + if (intel_hdmi_is_ycbcr420(pipe_config)) { ret = intel_panel_fitting(pipe_config, conn_state); if (ret) diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index 47468af8e029..5f1186f075e9 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -14,6 +14,7 @@ #include "intel_crtc.h" #include "intel_de.h" #include "intel_display_types.h" +#include "intel_dp.h" #include "intel_dsi.h" #include "intel_qp_tables.h" #include "intel_vdsc.h" @@ -380,7 +381,9 @@ int intel_dsc_get_num_vdsc_instances(const struct intel_crtc_state *crtc_state) { int num_vdsc_instances = intel_dsc_get_vdsc_per_pipe(crtc_state); - if (crtc_state->joiner_pipes) + if (intel_is_ultrajoiner(crtc_state)) + num_vdsc_instances *= 4; + else if (intel_is_bigjoiner(crtc_state)) num_vdsc_instances *= 2; return num_vdsc_instances; @@ -771,6 +774,13 @@ void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state) } } +static bool intel_crtc_ultrajoiner_enable_needed(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + + return intel_is_ultrajoiner(crtc_state) && crtc->pipe != PIPE_D; +} + void intel_dsc_enable(const struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); @@ -789,9 +799,22 @@ void intel_dsc_enable(const struct intel_crtc_state *crtc_state) dss_ctl2_val |= RIGHT_BRANCH_VDSC_ENABLE; dss_ctl1_val |= JOINER_ENABLE; } + if (crtc_state->joiner_pipes) { + /* + * This bit doesn't seem to follow master/slave logic or + * any other logic, so lets just add helper function to + * at least hide this hassle.. + */ + if (intel_crtc_ultrajoiner_enable_needed(crtc_state)) + dss_ctl1_val |= ULTRA_JOINER_ENABLE; + + if (intel_crtc_is_joiner_primary_master(crtc_state)) + dss_ctl1_val |= MASTER_ULTRA_JOINER_ENABLE;; + dss_ctl1_val |= BIG_JOINER_ENABLE; - if (!intel_crtc_is_joiner_slave(crtc_state)) + + if (intel_crtc_is_bigjoiner_master(crtc_state)) dss_ctl1_val |= MASTER_BIG_JOINER_ENABLE; } intel_de_write(dev_priv, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), dss_ctl1_val); From patchwork Mon May 20 07:38:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanislav Lisovskiy X-Patchwork-Id: 13668090 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 10694C25B78 for ; Mon, 20 May 2024 07:38:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4F9A810E2EC; Mon, 20 May 2024 07:38:53 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="BNKW1jz8"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id BDF5310E10E for ; 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20 May 2024 00:38:50 -0700 X-CSE-ConnectionGUID: eA61C1pmTzqtZggkPsiwWA== X-CSE-MsgGUID: H7PQNmWAQP2hS4urrGU0HQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,174,1712646000"; d="scan'208";a="33053230" Received: from unknown (HELO slisovsk-Lenovo-ideapad-720S-13IKB.fi.intel.com) ([10.237.72.65]) by orviesa007.jf.intel.com with ESMTP; 20 May 2024 00:38:48 -0700 From: Stanislav Lisovskiy To: intel-gfx@lists.freedesktop.org Cc: jani.saarinen@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH 5/5] drm/i915: Add new abstraction layer to handle pipe order for different joiners Date: Mon, 20 May 2024 10:38:39 +0300 Message-Id: <20240520073839.23881-6-stanislav.lisovskiy@intel.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20240520073839.23881-1-stanislav.lisovskiy@intel.com> References: <20240520073839.23881-1-stanislav.lisovskiy@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Ultrajoiner case requires special treatment where both reverse and staight order iteration doesn't work(for instance disabling case requires order to be: primary master, slaves, secondary master). Lets unify our approach by using not only pipe masks for iterating required pipes based on joiner type used, but also using different "priority" arrays for each of those. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_ddi.c | 19 ++--- drivers/gpu/drm/i915/display/intel_display.c | 73 +++++++++++++++----- drivers/gpu/drm/i915/display/intel_display.h | 7 ++ drivers/gpu/drm/i915/display/intel_dp_mst.c | 19 ++--- 4 files changed, 86 insertions(+), 32 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 81f644533504..6cd0c545b85f 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3102,10 +3102,11 @@ static void intel_ddi_post_disable_hdmi_or_sst(struct intel_atomic_state *state, const struct drm_connector_state *old_conn_state) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - struct intel_crtc *pipe_crtc; + struct intel_crtc *pipe_crtc; enum pipe pipe; - for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(old_crtc_state), + intel_get_pipe_order_disable(old_crtc_state)) { const struct intel_crtc_state *old_pipe_crtc_state = intel_atomic_get_old_crtc_state(state, pipe_crtc); @@ -3116,8 +3117,9 @@ static void intel_ddi_post_disable_hdmi_or_sst(struct intel_atomic_state *state, intel_ddi_disable_transcoder_func(old_crtc_state); - for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(old_crtc_state), + intel_get_pipe_order_disable(old_crtc_state)) { const struct intel_crtc_state *old_pipe_crtc_state = intel_atomic_get_old_crtc_state(state, pipe_crtc); @@ -3369,7 +3371,7 @@ static void intel_enable_ddi(struct intel_atomic_state *state, const struct drm_connector_state *conn_state) { struct drm_i915_private *i915 = to_i915(encoder->base.dev); - struct intel_crtc *pipe_crtc; + struct intel_crtc *pipe_crtc; enum pipe pipe; intel_ddi_enable_transcoder_func(encoder, crtc_state); @@ -3380,8 +3382,9 @@ static void intel_enable_ddi(struct intel_atomic_state *state, intel_ddi_wait_for_fec_status(encoder, crtc_state, true); - for_each_intel_crtc_in_pipe_mask_reverse(&i915->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(crtc_state)) { + for_each_intel_crtc_in_mask_priority(i915, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(crtc_state), + intel_get_pipe_order_enable(crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 6510476ac98c..7e62604c1e12 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1696,6 +1696,40 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta hsw_set_transconf(crtc_state); } + + +const enum pipe *intel_get_pipe_order_enable(const struct intel_crtc_state *crtc_state) +{ + static const enum pipe ultrajoiner_pipe_order_enable[I915_MAX_PIPES] = + { PIPE_B, PIPE_D, PIPE_C, PIPE_A }; + static const enum pipe bigjoiner_pipe_order_enable[I915_MAX_PIPES] = + { PIPE_B, PIPE_A, PIPE_D, PIPE_C }; + static const enum pipe nojoiner_pipe_order_enable[I915_MAX_PIPES] = + { PIPE_A, PIPE_B, PIPE_C, PIPE_D }; + + if (intel_is_ultrajoiner(crtc_state)) + return ultrajoiner_pipe_order_enable; + else if (intel_is_bigjoiner(crtc_state)) + return bigjoiner_pipe_order_enable; + return nojoiner_pipe_order_enable; +} + +const enum pipe *intel_get_pipe_order_disable(const struct intel_crtc_state *crtc_state) +{ + static const enum pipe ultrajoiner_pipe_order_disable[I915_MAX_PIPES] = + { PIPE_A, PIPE_B, PIPE_D, PIPE_C }; + static const enum pipe bigjoiner_pipe_order_disable[I915_MAX_PIPES] = + { PIPE_A, PIPE_B, PIPE_C, PIPE_D }; + static const enum pipe nojoiner_pipe_order_disable[I915_MAX_PIPES] = + { PIPE_A, PIPE_B, PIPE_C, PIPE_D }; + + if (intel_is_ultrajoiner(crtc_state)) + return ultrajoiner_pipe_order_disable; + else if (intel_is_bigjoiner(crtc_state)) + return bigjoiner_pipe_order_disable; + return nojoiner_pipe_order_disable; +} + static void hsw_crtc_enable(struct intel_atomic_state *state, struct intel_crtc *crtc) { @@ -1703,19 +1737,21 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, intel_atomic_get_new_crtc_state(state, crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder; - struct intel_crtc *pipe_crtc; + struct intel_crtc *pipe_crtc; enum pipe pipe; if (drm_WARN_ON(&dev_priv->drm, crtc->active)) return; - for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(new_crtc_state)) + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(new_crtc_state), + intel_get_pipe_order_enable(new_crtc_state)) intel_dmc_enable_pipe(dev_priv, pipe_crtc->pipe); intel_encoders_pre_pll_enable(state, crtc); - for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(new_crtc_state)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(new_crtc_state), + intel_get_pipe_order_enable(new_crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); @@ -1725,8 +1761,9 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, intel_encoders_pre_enable(state, crtc); - for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(new_crtc_state)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(new_crtc_state), + intel_get_pipe_order_enable(new_crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); @@ -1744,8 +1781,9 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, if (!transcoder_is_dsi(cpu_transcoder)) hsw_configure_cpu_transcoder(new_crtc_state); - for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(new_crtc_state)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(new_crtc_state), + intel_get_pipe_order_enable(new_crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); @@ -1780,8 +1818,9 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, intel_encoders_enable(state, crtc); - for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(new_crtc_state)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(new_crtc_state), + intel_get_pipe_order_enable(new_crtc_state)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc); enum pipe hsw_workaround_pipe; @@ -1866,7 +1905,7 @@ static void hsw_crtc_disable(struct intel_atomic_state *state, const struct intel_crtc_state *old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc); struct drm_i915_private *i915 = to_i915(crtc->base.dev); - struct intel_crtc *pipe_crtc; + struct intel_crtc *pipe_crtc; enum pipe pipe; /* * FIXME collapse everything to one hook. @@ -1875,8 +1914,9 @@ static void hsw_crtc_disable(struct intel_atomic_state *state, intel_encoders_disable(state, crtc); intel_encoders_post_disable(state, crtc); - for_each_intel_crtc_in_pipe_mask(&i915->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) { + for_each_intel_crtc_in_mask_priority(i915, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(old_crtc_state), + intel_get_pipe_order_disable(old_crtc_state)) { const struct intel_crtc_state *old_pipe_crtc_state = intel_atomic_get_old_crtc_state(state, pipe_crtc); @@ -1885,8 +1925,9 @@ static void hsw_crtc_disable(struct intel_atomic_state *state, intel_encoders_post_pll_disable(state, crtc); - for_each_intel_crtc_in_pipe_mask(&i915->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) + for_each_intel_crtc_in_mask_priority(i915, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(old_crtc_state), + intel_get_pipe_order_disable(old_crtc_state)) intel_dmc_disable_pipe(i915, pipe_crtc->pipe); } diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index aafb2eac5e03..c44464ab3e1e 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -274,6 +274,11 @@ enum phy_fia { &(dev)->mode_config.crtc_list, \ base.head) +#define for_each_intel_crtc_in_mask_priority(__dev_priv, intel_crtc, __p, __mask, __priolist) \ + for_each_pipe(__dev_priv, __p) \ + for_each_if((__mask) & BIT(__priolist[__p])) \ + for_each_if(intel_crtc = intel_crtc_for_pipe(__dev_priv, __priolist[__p])) + #define for_each_intel_crtc_in_pipe_mask(dev, intel_crtc, pipe_mask) \ list_for_each_entry(intel_crtc, \ &(dev)->mode_config.crtc_list, \ @@ -424,6 +429,8 @@ enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port); bool is_trans_port_sync_mode(const struct intel_crtc_state *state); bool is_trans_port_sync_master(const struct intel_crtc_state *state); u8 intel_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state); +const enum pipe *intel_get_pipe_order_enable(const struct intel_crtc_state *crtc_state); +const enum pipe *intel_get_pipe_order_disable(const struct intel_crtc_state *crtc_state); bool intel_crtc_is_joiner_slave(const struct intel_crtc_state *crtc_state); bool intel_crtc_is_joiner_master(const struct intel_crtc_state *crtc_state); u8 intel_crtc_joiner_slave_pipes(const struct intel_crtc_state *crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 2ac0835c1e8d..5a732b4bf19c 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -990,7 +990,7 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state, struct drm_dp_mst_atomic_payload *new_payload = drm_atomic_get_mst_payload_state(new_mst_state, connector->port); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct intel_crtc *pipe_crtc; + struct intel_crtc *pipe_crtc; enum pipe pipe; bool last_mst_stream; intel_dp->active_mst_links--; @@ -999,8 +999,9 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state, DISPLAY_VER(dev_priv) >= 12 && last_mst_stream && !intel_dp_mst_is_master_trans(old_crtc_state)); - for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(old_crtc_state), + intel_get_pipe_order_disable(old_crtc_state)) { const struct intel_crtc_state *old_pipe_crtc_state = intel_atomic_get_old_crtc_state(state, pipe_crtc); @@ -1023,8 +1024,9 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state, intel_ddi_disable_transcoder_func(old_crtc_state); - for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(old_crtc_state)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(old_crtc_state), + intel_get_pipe_order_disable(old_crtc_state)) { const struct intel_crtc_state *old_pipe_crtc_state = intel_atomic_get_old_crtc_state(state, pipe_crtc); @@ -1213,7 +1215,7 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state, drm_atomic_get_new_mst_topology_state(&state->base, &intel_dp->mst_mgr); enum transcoder trans = pipe_config->cpu_transcoder; bool first_mst_stream = intel_dp->active_mst_links == 1; - struct intel_crtc *pipe_crtc; + struct intel_crtc *pipe_crtc; enum pipe pipe; drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder); @@ -1257,8 +1259,9 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state, intel_enable_transcoder(pipe_config); - for_each_intel_crtc_in_pipe_mask_reverse(&dev_priv->drm, pipe_crtc, - intel_crtc_joined_pipe_mask(pipe_config)) { + for_each_intel_crtc_in_mask_priority(dev_priv, pipe_crtc, pipe, + intel_crtc_joined_pipe_mask(pipe_config), + intel_get_pipe_order_enable(pipe_config)) { const struct intel_crtc_state *pipe_crtc_state = intel_atomic_get_new_crtc_state(state, pipe_crtc);