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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 May 2024 15:08:52.0452 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: abc9bbf6-24e3-499b-2989-08dc7a711752 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022570.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5876 In preparation to add tracepoint support, move protocol error UUID definition to a common location and make CXL RAS capability struct global for use across different modules. Signed-off-by: Smita Koralahalli Reviewed-by: Dave Jiang Reviewed-by: Alison Schofield Reviewed-by: Jonathan Cameron --- drivers/firmware/efi/cper_cxl.c | 11 ----------- drivers/firmware/efi/cper_cxl.h | 7 ++----- include/linux/cper.h | 4 ++++ include/linux/cxl-event.h | 11 +++++++++++ 4 files changed, 17 insertions(+), 16 deletions(-) diff --git a/drivers/firmware/efi/cper_cxl.c b/drivers/firmware/efi/cper_cxl.c index a55771b99a97..4fd8d783993e 100644 --- a/drivers/firmware/efi/cper_cxl.c +++ b/drivers/firmware/efi/cper_cxl.c @@ -18,17 +18,6 @@ #define PROT_ERR_VALID_DVSEC BIT_ULL(5) #define PROT_ERR_VALID_ERROR_LOG BIT_ULL(6) -/* CXL RAS Capability Structure, CXL v3.0 sec 8.2.4.16 */ -struct cxl_ras_capability_regs { - u32 uncor_status; - u32 uncor_mask; - u32 uncor_severity; - u32 cor_status; - u32 cor_mask; - u32 cap_control; - u32 header_log[16]; -}; - static const char * const prot_err_agent_type_strs[] = { "Restricted CXL Device", "Restricted CXL Host Downstream Port", diff --git a/drivers/firmware/efi/cper_cxl.h b/drivers/firmware/efi/cper_cxl.h index 86bfcf7909ec..6f8c00495708 100644 --- a/drivers/firmware/efi/cper_cxl.h +++ b/drivers/firmware/efi/cper_cxl.h @@ -7,14 +7,11 @@ * Author: Smita Koralahalli */ +#include + #ifndef LINUX_CPER_CXL_H #define LINUX_CPER_CXL_H -/* CXL Protocol Error Section */ -#define CPER_SEC_CXL_PROT_ERR \ - GUID_INIT(0x80B9EFB4, 0x52B5, 0x4DE3, 0xA7, 0x77, 0x68, 0x78, \ - 0x4B, 0x77, 0x10, 0x48) - #pragma pack(1) /* Compute Express Link Protocol Error Section, UEFI v2.10 sec N.2.13 */ diff --git a/include/linux/cper.h b/include/linux/cper.h index 265b0f8fc0b3..5c6d4d5b9975 100644 --- a/include/linux/cper.h +++ b/include/linux/cper.h @@ -89,6 +89,10 @@ enum { #define CPER_NOTIFY_DMAR \ GUID_INIT(0x667DD791, 0xC6B3, 0x4c27, 0x8A, 0x6B, 0x0F, 0x8E, \ 0x72, 0x2D, 0xEB, 0x41) +/* CXL Protocol Error Section */ +#define CPER_SEC_CXL_PROT_ERR \ + GUID_INIT(0x80B9EFB4, 0x52B5, 0x4DE3, 0xA7, 0x77, 0x68, 0x78, \ + 0x4B, 0x77, 0x10, 0x48) /* CXL Event record UUIDs are formatted as GUIDs and reported in section type */ /* diff --git a/include/linux/cxl-event.h b/include/linux/cxl-event.h index 60b25020281f..f11e52ff565a 100644 --- a/include/linux/cxl-event.h +++ b/include/linux/cxl-event.h @@ -154,6 +154,17 @@ struct cxl_cper_event_rec { union cxl_event event; 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Add GHES support to detect CXL CPER Protocol Error Record and Cache Error Severity, Device ID, Device Serial number and CXL RAS capability struct in struct cxl_cper_prot_err. Include this struct as a member of struct cxl_cper_work_data. Signed-off-by: Smita Koralahalli --- drivers/acpi/apei/ghes.c | 10 +++++ drivers/firmware/efi/cper_cxl.c | 66 +++++++++++++++++++++++++++++++++ include/linux/cxl-event.h | 26 +++++++++++++ 3 files changed, 102 insertions(+) diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c index 623cc0cb4a65..1a58032770ee 100644 --- a/drivers/acpi/apei/ghes.c +++ b/drivers/acpi/apei/ghes.c @@ -717,6 +717,14 @@ static void cxl_cper_post_event(enum cxl_event_type event_type, schedule_work(cxl_cper_work); } +static void cxl_cper_handle_prot_err(struct acpi_hest_generic_data *gdata) +{ + struct cxl_cper_work_data wd; + + if (cxl_cper_handle_prot_err_info(gdata, &wd.p_err)) + return; +} + int cxl_cper_register_work(struct work_struct *work) { if (cxl_cper_work) @@ -791,6 +799,8 @@ static bool ghes_do_proc(struct ghes *ghes, struct cxl_cper_event_rec *rec = acpi_hest_get_payload(gdata); cxl_cper_post_event(CXL_CPER_EVENT_MEM_MODULE, rec); + } else if (guid_equal(sec_type, &CPER_SEC_CXL_PROT_ERR)) { + cxl_cper_handle_prot_err(gdata); } else { void *err = acpi_hest_get_payload(gdata); diff --git a/drivers/firmware/efi/cper_cxl.c b/drivers/firmware/efi/cper_cxl.c index 4fd8d783993e..03b9839f3b73 100644 --- a/drivers/firmware/efi/cper_cxl.c +++ b/drivers/firmware/efi/cper_cxl.c @@ -8,6 +8,7 @@ */ #include +#include #include "cper_cxl.h" #define PROT_ERR_VALID_AGENT_TYPE BIT_ULL(0) @@ -44,6 +45,17 @@ enum { USP, /* CXL Upstream Switch Port */ }; +static enum cxl_aer_err_type cper_severity_cxl_aer(int cper_severity) +{ + switch (cper_severity) { + case CPER_SEV_RECOVERABLE: + case CPER_SEV_FATAL: + return CXL_AER_UNCORRECTABLE; + default: + return CXL_AER_CORRECTABLE; + } +} + void cper_print_prot_err(const char *pfx, const struct cper_sec_prot_err *prot_err) { if (prot_err->valid_bits & PROT_ERR_VALID_AGENT_TYPE) @@ -176,3 +188,57 @@ void cper_print_prot_err(const char *pfx, const struct cper_sec_prot_err *prot_e sizeof(cxl_ras->header_log), 0); } } + +int cxl_cper_handle_prot_err_info(struct acpi_hest_generic_data *gdata, + struct cxl_cper_prot_err *p_err) +{ + struct cper_sec_prot_err *prot_err = acpi_hest_get_payload(gdata); + u8 *dvsec_start, *cap_start; + + if (!(prot_err->valid_bits & PROT_ERR_VALID_DEVICE_ID)) { + pr_err(FW_WARN "No Device ID\n"); + return -EINVAL; + } + + /* + * The device ID or agent address is required for CXL RCD, CXL + * SLD, CXL LD, CXL Fabric Manager Managed LD, CXL Root Port, + * CXL Downstream Switch Port and CXL Upstream Switch Port. + */ + if (prot_err->agent_type <= 0x7 && prot_err->agent_type != RCH_DP) { + p_err->segment = prot_err->agent_addr.segment; + p_err->bus = prot_err->agent_addr.bus; + p_err->device = prot_err->agent_addr.device; + p_err->function = prot_err->agent_addr.function; + } else { + pr_err(FW_WARN "Invalid agent type\n"); + return -EINVAL; + } + + if (!(prot_err->valid_bits & PROT_ERR_VALID_ERROR_LOG)) { + pr_err(FW_WARN "Invalid Protocol Error log\n"); + return -EINVAL; + } + + dvsec_start = (u8 *)(prot_err + 1); + cap_start = dvsec_start + prot_err->dvsec_len; + p_err->cxl_ras = *(struct cxl_ras_capability_regs *)cap_start; + + /* + * Set device serial number unconditionally. + * + * Print a warning message if it is not valid. The device serial + * number is required for CXL RCD, CXL SLD, CXL LD and CXL Fabric + * Manager Managed LD. + */ + if (!(prot_err->valid_bits & PROT_ERR_VALID_SERIAL_NUMBER) || + prot_err->agent_type > 0x4 || prot_err->agent_type == RCH_DP) + pr_warn(FW_WARN "No Device Serial number\n"); + + p_err->lower_dw = prot_err->dev_serial_num.lower_dw; + p_err->upper_dw = prot_err->dev_serial_num.upper_dw; + + p_err->severity = cper_severity_cxl_aer(gdata->error_severity); + + return 0; +} diff --git a/include/linux/cxl-event.h b/include/linux/cxl-event.h index f11e52ff565a..9c7b69e076a0 100644 --- a/include/linux/cxl-event.h +++ b/include/linux/cxl-event.h @@ -165,11 +165,37 @@ struct cxl_ras_capability_regs { u32 header_log[16]; }; +enum cxl_aer_err_type { + CXL_AER_UNCORRECTABLE, + CXL_AER_CORRECTABLE, +}; + +struct cxl_cper_prot_err { + struct cxl_ras_capability_regs cxl_ras; + + /* Device ID */ + u8 function; + u8 device; + u8 bus; + u16 segment; + + /* Device Serial Number */ + u32 lower_dw; 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X-Microsoft-Antispam-Message-Info: epTqHPU9QOmCToS33mzOykMjBHH8PfRxADUp3tYgD05oEdfHJrBknzivmkQCQ9HrpY0yvnkm40y3TwDaBf7Vqed3NJjBrSYAwGwi77D5EgcxuM4RmON5FlaQY4rlqXshRnMoywHgazsdDuHexHXw81sGIkm2IbGuvaZobRC0SGpBTouRPjc3S9tnAS46pe9KkCnSHcePylqFkbIoSHRgwyzJH80N+R2nHWxSkWl5Wrr2729RBZeRTrFMlIYGWX/6vUVqKXjM9S+wPBzSqW3kAcQO+YxiFGh6BYG7ODwnLMMdCTNx+V4fQZ+jVSRslkXWRqCM/11sbYWotPojj3YoyCJtV6ofjUJfBz/L/anNqHTrrl05/idCEiCASKXqBeIf46OCMekIYp1tv3fyb5vxpw/M70Nv5/O3N++hLp08ddCKXbBPaLF4oV1TYavaKlsa/UG3PFbvsfFEDbN00eyXAqcL7tRYZKiSG34OX1S/uKWDODFioPapv+Y6gVHvJpipzM31DxVq4S8ffhKqbkkYoDTclMKBstbvChEOtviWTG3lPFBSag10ecKoz0nG9/JdR8EFk9yxULFfwm4t4rYYjMHzZQTIwF3tuEa/MHXTegJDqYkFXus5duNKaS+TO5UweBSuoGwkrZ7uwJHGjZlGh+SaLgIBx72qRQpudnUEfzWLzTfwnXZ6LR1j+xq90VzwtuQtlkme2DM5oExplLaoAiWKEwy7I29I0bHsvUGh4661k7f1iEjRUa+/CVa76kWaZbTao46czTURqif2qEQze6Y9MTGTE1OcLtYO24JK8HbrNwXZ3jGzPWQ5UPz/V4tAVWh/k14w3lgh8/9lr1SUrwK+ew/L9Q0bW8E8lyS4LLAg0/XQ1zqfOZ2SRd9lOzHqv4rXqYHbGUCAYsPrxtFL59JiDUidiZAptaD6NFs43P0ggtkX56/RuRL8aXJ2TbRiAdU5SqX3OuY+iChkl4SeOV6nZxDj+Uikw/SwqsqDyFPclvMcxCQYPQFQQGrWw1LW6tDzddcSf3/IrD9vlbbY3k3+eXUMolMbG4RpUz6Ylf248bgmC/1C2r0l5OmMy519J7RBKcvEaV6svyen1DeHta4BIuwKM8LrdA1TKczohY2G3bTp2J+/lfRWoSk17VIpQcS8KF0TjebM8k+7rliLZbZtsIjl+EunyTUEloYj0nTmRhVjOXE3/V25KKvAdzytDFNZTIb1p0fjfofBvh+hOUBExPPUrsEc7zTbUQCTj5TZcmbSoMNRNGClql2HcJIV/+wWYCJAETYKOksOtLqvU6G9DEVF90gDeh0dXxeFVZnwgE6UP8VqS2pl7rpasLpJbpW6dIlLH2SkFyYpIVDst/Rp7spbeK/QJ2skkOVgPrgZ7MtZqgFPxtuvR1zfFpFU X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(36860700004)(376005)(82310400017)(1800799015);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 May 2024 15:08:53.2640 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 75448cdb-8dec-4220-20c9-08dc7a71180c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022570.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8301 When PCIe AER is in FW-First, OS should process CXL Protocol errors from CPER records. Reuse the existing work queue cxl_cper_work registered with GHES to notify the CXL subsystem on a Protocol error. The defined trace events cxl_aer_uncorrectable_error and cxl_aer_correctable_error currently trace native CXL AER errors. Reuse them to trace FW-First Protocol Errors. Signed-off-by: Smita Koralahalli Reviewed-by: Alison Schofield --- drivers/acpi/apei/ghes.c | 14 ++++++++++++++ drivers/cxl/core/pci.c | 24 ++++++++++++++++++++++++ drivers/cxl/cxlpci.h | 3 +++ drivers/cxl/pci.c | 34 ++++++++++++++++++++++++++++++++-- include/linux/cxl-event.h | 1 + 5 files changed, 74 insertions(+), 2 deletions(-) diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c index 1a58032770ee..a31bd91e9475 100644 --- a/drivers/acpi/apei/ghes.c +++ b/drivers/acpi/apei/ghes.c @@ -723,6 +723,20 @@ static void cxl_cper_handle_prot_err(struct acpi_hest_generic_data *gdata) if (cxl_cper_handle_prot_err_info(gdata, &wd.p_err)) return; + + guard(spinlock_irqsave)(&cxl_cper_work_lock); + + if (!cxl_cper_work) + return; + + wd.event_type = CXL_CPER_EVENT_PROT_ERR; + + if (!kfifo_put(&cxl_cper_fifo, wd)) { + pr_err_ratelimited("CXL CPER kfifo overflow\n"); + return; + } + + schedule_work(cxl_cper_work); } int cxl_cper_register_work(struct work_struct *work) diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c index 0df09bd79408..ef9438cb1dd6 100644 --- a/drivers/cxl/core/pci.c +++ b/drivers/cxl/core/pci.c @@ -686,6 +686,30 @@ void read_cdat_data(struct cxl_port *port) } EXPORT_SYMBOL_NS_GPL(read_cdat_data, CXL); +void cxl_trace_prot_err(struct cxl_dev_state *cxlds, + struct cxl_cper_prot_err *p_err) +{ + u32 status, fe; + + if (p_err->severity == CXL_AER_CORRECTABLE) { + status = p_err->cxl_ras.cor_status & ~p_err->cxl_ras.cor_mask; + + trace_cxl_aer_correctable_error(cxlds->cxlmd, status); + } else { + status = p_err->cxl_ras.uncor_status & ~p_err->cxl_ras.uncor_mask; + + if (hweight32(status) > 1) + fe = BIT(FIELD_GET(CXL_RAS_CAP_CONTROL_FE_MASK, + p_err->cxl_ras.cap_control)); + else + fe = status; + + trace_cxl_aer_uncorrectable_error(cxlds->cxlmd, status, fe, + p_err->cxl_ras.header_log); + } +} +EXPORT_SYMBOL_NS_GPL(cxl_trace_prot_err, CXL); + static void __cxl_handle_cor_ras(struct cxl_dev_state *cxlds, void __iomem *ras_base) { diff --git a/drivers/cxl/cxlpci.h b/drivers/cxl/cxlpci.h index 93992a1c8eec..0ba3215786e1 100644 --- a/drivers/cxl/cxlpci.h +++ b/drivers/cxl/cxlpci.h @@ -130,4 +130,7 @@ void read_cdat_data(struct cxl_port *port); void cxl_cor_error_detected(struct pci_dev *pdev); pci_ers_result_t cxl_error_detected(struct pci_dev *pdev, pci_channel_state_t state); +struct cxl_cper_prot_err; +void cxl_trace_prot_err(struct cxl_dev_state *cxlds, + struct cxl_cper_prot_err *p_err); #endif /* __CXL_PCI_H__ */ diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index 74876c9835e8..3e3c36983686 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -1011,12 +1011,42 @@ static void cxl_handle_cper_event(enum cxl_event_type ev_type, &uuid_null, &rec->event); } +static void cxl_handle_prot_err(struct cxl_cper_prot_err *p_err) +{ + struct pci_dev *pdev __free(pci_dev_put) = NULL; + struct cxl_dev_state *cxlds; + unsigned int devfn; + + devfn = PCI_DEVFN(p_err->device, p_err->function); + pdev = pci_get_domain_bus_and_slot(p_err->segment, + p_err->bus, devfn); + if (!pdev) + return; + + guard(device)(&pdev->dev); + if (pdev->driver != &cxl_pci_driver) + return; + + cxlds = pci_get_drvdata(pdev); + if (!cxlds) + return; + + if (((u64)p_err->upper_dw << 32 | p_err->lower_dw) != cxlds->serial) + pr_warn("CPER-reported device serial number does not match expected value\n"); + + cxl_trace_prot_err(cxlds, p_err); +} + static void cxl_cper_work_fn(struct work_struct *work) { struct cxl_cper_work_data wd; - while (cxl_cper_kfifo_get(&wd)) - cxl_handle_cper_event(wd.event_type, &wd.rec); + while (cxl_cper_kfifo_get(&wd)) { + if (wd.event_type == CXL_CPER_EVENT_PROT_ERR) + cxl_handle_prot_err(&wd.p_err); + else + cxl_handle_cper_event(wd.event_type, &wd.rec); + } } static DECLARE_WORK(cxl_cper_work, cxl_cper_work_fn); diff --git a/include/linux/cxl-event.h b/include/linux/cxl-event.h index 9c7b69e076a0..5562844df850 100644 --- a/include/linux/cxl-event.h +++ b/include/linux/cxl-event.h @@ -122,6 +122,7 @@ struct cxl_event_record_raw { } __packed; enum cxl_event_type { + CXL_CPER_EVENT_PROT_ERR, CXL_CPER_EVENT_GENERIC, CXL_CPER_EVENT_GEN_MEDIA, CXL_CPER_EVENT_DRAM, From patchwork Wed May 22 15:08:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Smita Koralahalli X-Patchwork-Id: 13670931 Received: from NAM04-MW2-obe.outbound.protection.outlook.com (mail-mw2nam04on2066.outbound.protection.outlook.com [40.107.101.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C441823B5; 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Wed, 22 May 2024 10:08:52 -0500 From: Smita Koralahalli To: , , CC: Ard Biesheuvel , Alison Schofield , Vishal Verma , "Ira Weiny" , Dan Williams , Jonathan Cameron , Yazen Ghannam , Bowman Terry Subject: [PATCH 4/4] cxl/pci: Define a common function get_cxl_dev() Date: Wed, 22 May 2024 15:08:39 +0000 Message-ID: <20240522150839.27578-5-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240522150839.27578-1-Smita.KoralahalliChannabasappa@amd.com> References: <20240522150839.27578-1-Smita.KoralahalliChannabasappa@amd.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00022570:EE_|SN7PR12MB7107:EE_ X-MS-Office365-Filtering-Correlation-Id: 7aaf3023-9191-4657-099b-08dc7a711856 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|82310400017|36860700004|1800799015|376005; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 May 2024 15:08:53.7483 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7aaf3023-9191-4657-099b-08dc7a711856 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022570.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7107 Refactor computation of cxlds to a common function get_cxl_dev() and reuse the function in both cxl_handle_cper_event() and cxl_handle_prot_err(). Signed-off-by: Smita Koralahalli --- drivers/cxl/pci.c | 52 +++++++++++++++++++++++------------------------ 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index 3e3c36983686..26e65e5b68cb 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -974,32 +974,43 @@ static struct pci_driver cxl_pci_driver = { }, }; +static struct cxl_dev_state *get_cxl_dev(u16 segment, u8 bus, u8 device, + u8 function) +{ + struct pci_dev *pdev __free(pci_dev_put) = NULL; + struct cxl_dev_state *cxlds; + unsigned int devfn; + + devfn = PCI_DEVFN(device, function); + pdev = pci_get_domain_bus_and_slot(segment, bus, devfn); + + if (!pdev) + return NULL; + + guard(device)(&pdev->dev); + if (pdev->driver != &cxl_pci_driver) + return NULL; + + cxlds = pci_get_drvdata(pdev); + + return cxlds; +} + #define CXL_EVENT_HDR_FLAGS_REC_SEVERITY GENMASK(1, 0) static void cxl_handle_cper_event(enum cxl_event_type ev_type, struct cxl_cper_event_rec *rec) { struct cper_cxl_event_devid *device_id = &rec->hdr.device_id; - struct pci_dev *pdev __free(pci_dev_put) = NULL; enum cxl_event_log_type log_type; struct cxl_dev_state *cxlds; - unsigned int devfn; u32 hdr_flags; pr_debug("CPER event %d for device %u:%u:%u.%u\n", ev_type, device_id->segment_num, device_id->bus_num, device_id->device_num, device_id->func_num); - devfn = PCI_DEVFN(device_id->device_num, device_id->func_num); - pdev = pci_get_domain_bus_and_slot(device_id->segment_num, - device_id->bus_num, devfn); - if (!pdev) - return; - - guard(device)(&pdev->dev); - if (pdev->driver != &cxl_pci_driver) - return; - - cxlds = pci_get_drvdata(pdev); + cxlds = get_cxl_dev(device_id->segment_num, device_id->bus_num, + device_id->device_num, device_id->func_num); if (!cxlds) return; @@ -1013,21 +1024,10 @@ static void cxl_handle_cper_event(enum cxl_event_type ev_type, static void cxl_handle_prot_err(struct cxl_cper_prot_err *p_err) { - struct pci_dev *pdev __free(pci_dev_put) = NULL; struct cxl_dev_state *cxlds; - unsigned int devfn; - devfn = PCI_DEVFN(p_err->device, p_err->function); - pdev = pci_get_domain_bus_and_slot(p_err->segment, - p_err->bus, devfn); - if (!pdev) - return; - - guard(device)(&pdev->dev); - if (pdev->driver != &cxl_pci_driver) - return; - - cxlds = pci_get_drvdata(pdev); + cxlds = get_cxl_dev(p_err->segment, p_err->bus, + p_err->device, p_err->function); if (!cxlds) return;