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Thu, 23 May 2024 18:49:33 -0500 From: Anatoliy Klymenko Date: Thu, 23 May 2024 16:49:28 -0700 Subject: [PATCH v2] drm: xlnx: zynqmp_dpsub: Enable plane in atomic update MIME-Version: 1.0 Message-ID: <20240523-dp-layer-enable-v2-1-d799020098fc@amd.com> X-B4-Tracking: v=1; b=H4sIAAjWT2YC/3WNQQqDMBBFryKz7pRM0NZ05T2Ki5iMNaBRkhIqk rs3dd/le/DfPyBycBzhUR0QOLnoVl9AXiowk/YvRmcLgxSyFo0UaDec9c4B2ethZrwPzY30KJX RLZTVFnh0n7P47AtPLr7XsJ8HiX72fysREho11C1JoYiaTi/2atYF+pzzF5PIuq+sAAAA To: Laurent Pinchart , Tomi Valkeinen , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Michal Simek CC: , , , Anatoliy Klymenko X-Mailer: b4 0.13.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD77:EE_|IA0PR12MB7697:EE_ X-MS-Office365-Filtering-Correlation-Id: 1e6e6c12-5028-431b-aa5b-08dc7b82ffca X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|7416005|376005|36860700004|82310400017|1800799015; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 May 2024 23:49:34.6579 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1e6e6c12-5028-431b-aa5b-08dc7b82ffca X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD77.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7697 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240523_165018_604616_0BDD1D22 X-CRM114-Status: GOOD ( 15.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Unconditionally enable the DPSUB layer in the corresponding atomic plane update callback. Setting the new display mode may require disabling and re-enabling the CRTC. This effectively resets DPSUB to the default state with all layers disabled. The original implementation of the plane atomic update enables the corresponding DPSUB layer only if the framebuffer format has changed. This would leave the layer disabled after switching to a different display mode with the same framebuffer format. Signed-off-by: Anatoliy Klymenko --- Changes in v2: - Added comment around DPSUB layer enablement explaining why it should be done unconditionally. - Link to v1: https://lore.kernel.org/r/20240520-dp-layer-enable-v1-1-c9b481209115@amd.com --- drivers/gpu/drm/xlnx/zynqmp_kms.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) --- base-commit: 673087d8b023faf34b84e8faf63bbeea3da87bab change-id: 20240520-dp-layer-enable-7b561af29ca8 Best regards, diff --git a/drivers/gpu/drm/xlnx/zynqmp_kms.c b/drivers/gpu/drm/xlnx/zynqmp_kms.c index 43bf416b33d5..0b57ab5451a9 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_kms.c +++ b/drivers/gpu/drm/xlnx/zynqmp_kms.c @@ -120,9 +120,13 @@ static void zynqmp_dpsub_plane_atomic_update(struct drm_plane *plane, zynqmp_disp_blend_set_global_alpha(dpsub->disp, true, plane->state->alpha >> 8); - /* Enable or re-enable the plane if the format has changed. */ - if (format_changed) - zynqmp_disp_layer_enable(layer); + /* + * Unconditionally enable the layer, as it may have been disabled + * previously either explicitly to reconfigure layer format, or + * implicitly after DPSUB reset during display mode change. DRM + * framework calls this callback for enabled planes only. + */ + zynqmp_disp_layer_enable(layer); } static const struct drm_plane_helper_funcs zynqmp_dpsub_plane_helper_funcs = {